JPH05326624A - Integrated circuit package - Google Patents

Abstract

PURPOSE:To suppress short circuit between adjacent pads and to enhance productivity. CONSTITUTION:A tape carrier package 1 has outer leads 3a, 3b being cut off alternately with two types of length and separated from a tape carrier. The outer leads 3a, 3b are shaped by bending, substantially 90 deg. at the tips thereof, toward the back metal face side of a semiconductor chip. The outer leads 3a, 3b are bent such that the tips thereof are flush with the back metal face of the semiconductor chip 2 or slightly thereunder. This package facilitates total reflow solding after mounting the tape carrier package on a printed board.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to an integrated circuit package, and more particularly to a mounting structure of a tape carrier package.

[0002]

2. Description of the Related Art Conventionally, in a tape carrier package, an outer lead 8 is bent near a suspender 6 of a tape carrier package 1, as shown in FIG.
The tips of the outer leads 8 are the pads 4 on the printed circuit board 5.
Is formed so as to come into contact with.

Solder is previously supplied to the pad 4 by solder plating or the like, and the tape carrier package 1 is mounted on the printed circuit board 5 by aligning the pad 4 and the tip of the outer lead 8. After that, the pad 4 and the outer lead 8 are solder-bonded by thermocompression bonding.

In such a conventional tape carrier package, when the pitch of the outer leads 8 becomes narrower,
There is a problem that defects due to a short circuit between the adjacent pads 4 rapidly increase during soldering.

Further, since the outer leads 8 of the tape carrier package 1 and the pads 4 of the printed circuit board 5 are solder-bonded by thermocompression bonding, the thermo-compression bonding is performed as compared with the printed circuit board which is conventionally solder-bonded by the batch reflow method. There is a problem that the number of processes is increased and the productivity is poor.

[0006]

SUMMARY OF THE INVENTION The present invention has been made to eliminate the above-mentioned problems of the prior art, and is capable of reducing defects due to a short circuit between adjacent pads and improving productivity. The purpose is to provide a circuit package.

[0007]

The integrated circuit package according to the present invention has a first outer lead connected to the integrated circuit chip and a second outer lead connected to the integrated circuit chip and shorter than the first outer lead. , The first and second outer leads are alternately arranged.

[0008]

An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a plan view of an embodiment of the present invention,
FIG. 2 is a sectional view taken along the line AA of FIG. In these figures, the tape carrier package 1 has 2
Outer leads 3a and 3b of different lengths are provided alternately. That is, the tape carrier package 1 is alternately cut into two kinds of lengths by the outer leads 3a and 3b,
It is separated from the tape carrier (not shown).

The shorter outer lead 3a has a length of about 0.8 mm from the outside of the suspender 6, and the longer outer lead 3b has a pitch equal to the pitch of the outer leads 3a, 3b rather than the length of the outer lead 3a. It will be cut at a long time.

The outer leads 3a and 3b are formed by bending them at an angle of about 90 degrees toward the back metal surface side of the semiconductor chip 2 at about 0.5 mm from the tips. At this time, the tips of the outer leads 3a, 3b are arranged at the same position as or slightly below the back metal surface of the semiconductor chip 2. As a result, the outer lead 3
The tips of a and 3b are arranged in a staggered pattern.

The pad 4 of the printed circuit board 5 is cut and separated from the tape carrier, and is arranged in accordance with the positions of the tips of the outer leads 3a and 3b molded as described above. The shape of these pads 4 is circular.

When the tape carrier package 1 is mounted on the printed circuit board 5, cream solder is first applied onto the pads 4 of the printed circuit board 5 by printing. After that, the pad 4 of the printed board 5 and the tip of the outer lead 3 of the tape carrier package 1 are aligned and mounted.

At this time, the back metal surface of the semiconductor chip 2 is brought into contact with the printed board 5, and the tips of the outer leads 3 of the tape carrier package 1 are attached to the printed board 5.
So that it is in the cream solder supplied on pad 4.

The printed circuit board 5 on which the tape carrier package 1 is mounted is mounted on the VPS (Vapor Phase So
Ledering) and infrared reflow can be used for soldering together with other parts by batch reflow.

Although the above-described solder bonding method shows an example in which the tape carrier package 1 is mounted face-up, it is also possible to mount the tape carrier package 1 face-down.

FIG. 3 shows the tape carrier package 1 of FIG.
It is a figure which shows the example which mounted by face down. In the figure, the structure is the same as that of the tape carrier package 1 shown in FIGS. 1 and 2, except that the tape carrier package 1 is mounted face down. In this case, since a space is created between the tape carrier package 1 and the printed board 5, it is possible to mount the chip type surface mount component 7 and the like in this space.

Here, the outer leads 3a and 3b are L-shaped in the face-up mounting of the tape carrier package 1 shown in FIGS. 1 and 2 and the face-down mounting of the tape carrier package 1 shown in FIG. Although molded, the outer leads 3a, 3b can be molded in the same manner as the outer lead 8 of the conventional example shown in FIG.

Thus, the tape carrier package 1
The outer leads 3a, 3b of the above are alternately cut into two types of lengths and separated from the tape carrier,
The tips of the outer leads 3a and 3b are arranged in a staggered manner by bending the tips of the respective 3b toward the back metal surface side of the semiconductor chip 2 to form an L-shape. It is possible to reduce defects due to a short circuit between the four. Moreover, after the tape carrier package 1 is mounted on the printed circuit board 5, solder joining can be easily performed by the batch reflow method.
Productivity can be improved.

Although the mounting structure of the tape carrier package 1 has been described in the embodiment of the present invention, it is obvious that it can be applied to other integrated circuit packages, and the present invention is not limited to this.

[0021]

As described above, according to the present invention, the first outer lead connected to the integrated circuit chip and the second outer lead connected to the integrated circuit chip and shorter than the first outer lead are alternately arranged. By arranging them in the above manner, it is possible to reduce defects due to short circuit between adjacent pads, and it is possible to improve productivity.

[Brief description of drawings]

FIG. 1 is a plan view of an embodiment of the present invention.

FIG. 2 is a sectional view taken along the line AA of FIG.

FIG. 3 is a diagram showing an example in which the tape carrier package of FIG. 2 is mounted face down.

FIG. 4 is a sectional view of a conventional example.

[Explanation of symbols]

 1 Tape Carrier Package 2 Semiconductor Chips 3a, 3b Outer Leads 4 Pads 5 Printed Circuit Board

Claims (2)

[Claims] 1. A first outer lead connected to an integrated circuit chip, and a first outer lead connected to the integrated circuit chip,
And a second outer lead shorter than the outer lead, and the first and second outer leads are alternately arranged. 2. The integrated circuit package according to claim 1, wherein the side shapes of the first and second outer leads are formed in an L shape.