JPH05315481A - Film carrier semiconductor device and manufacturing method thereof - Google Patents

Abstract

PURPOSE:To fix a multilayered wiring layer serving both as a heat sink base on a semiconductor chip surface for enhancing the thermal and electrical characteristics in the film carrier semiconductor device. CONSTITUTION:Within the film carrier semiconductor device whereto a semiconductor chip 2b is inner-lead bonded, a heat sink 17b fixing base 15b is fixed on the surface of the semiconductor chip 2b and a suspender 8b using an insulating high thermal conductive insulation bonding agent 13b. Furthermore, if necessary, junction electrodes 11b electrically and selectively connected via through holes are formed on the parts corresponding to respective leads 4b using the heat sink fixing base 15b as a multilayered wiring substrate to be connected by the leads 4b, anisotropical conductive sheet, etc., so that the film carrier semiconductor device having the multilayered wiring layer serving both as the heat sink fixing base 15b may be manufactured.

Description

Detailed Description of the Invention

[0001]

FIELD OF THE INVENTION This invention relates to film carrier semiconductors.

[0002]

2. Description of the Related Art As shown in FIGS. 6A and 6B, a conventional film carrier type semiconductor device has a sprocket hole 1a for carrying and positioning and a semiconductor chip 2a.
A metal foil such as Cu is adhered onto an insulating film such as polyimide having a device hole 3a which is a hole for a semiconductor chip, and a lead having a desired shape is formed by selectively etching the metal foil by a photoresist method or the like. 4a and a pad 5a for electrical selection and the like, a film carrier tape 6a plated with Au, Sn, solder or the like, and a semiconductor chip in which bumps 7a, which are metal projections, are previously provided on the electrode terminals. 2a, and then inner lead bonding (hereinafter referred to as ILB) of the leads 4a of the film carrier tape and the bumps 7a of the semiconductor chip by a thermocompression bonding method or a eutectic method, etc. This is completed by bringing a contactor into contact with 5a and performing electrical selection and a bias test.

Here, to prevent deformation of the lead 4a,
A suspender 8a, which is a frame of an insulating film, is provided in advance on the film carrier tape, and as shown in FIG. 6C, resin 9 is used to improve reliability and mechanical protection.
Resin sealing is often performed by a.

When mounting the above film carrier semiconductor device, the leads 4a are cut into desired lengths,
Then, as shown in FIG. 7, for example, the printed circuit board 10
After fixing the semiconductor chip 2a onto the a by the fixing material 12a,
The lead 4a is connected to the bonding pad 11 on the printed circuit board.
The outer lead bonding (hereinafter referred to as OLB) can be performed on a.

These film carrier semiconductor devices are
Since the bonding can be performed once regardless of the number of leads, the speed is fast, and the use of the film carrier tape has advantages such as easy automation of work.

A method of manufacturing a semiconductor device using such a film carrier method has been introduced in Japanese Patent Publication No. 47-3206.

[0007]

In the conventional film carrier semiconductor device described above, various problems have arisen with the recent high performance of semiconductor chips. For example,
There are many leads, higher power consumption, higher speed, etc. accompanying higher performance. These characteristics also have a great influence on the package performance of the semiconductor device, and it is becoming increasingly difficult to deal with high power consumption and high speed in particular.

With the increase in power consumption, the amount of heat generated by the semiconductor chip gradually increases. Due to this heat dissipation, the package of the semiconductor device is required to have a low thermal resistance. The methods commonly used to solve these problems are:
A method of attaching a heat sink and a method of attaching a dummy lead for heat diffusion are known. However, there is a limit to mounting dummy leads for heat dissipation in the vacant space of the insulating film, and it is not an exaggeration to say that mounting is not possible especially in the recent trend of multiple leads and narrow pitch. The situation. In addition, JP-A-1-13
As described in 219, etc., the method of attaching a heat sink to the back surface of the semiconductor chip has a problem that the heat dissipation effect is not sufficient because the heat sink is located away from the surface of the chip. Further, as shown in JP-B-61-49446, JP-B-63-186453 and JP-B-62-276862, there is a method of attaching a heat sink or a contact piece for heat transfer to the pellet surface. Effective only for those that have a structure that can support a heat sink, such as a ceramic package,
In the case of the film carrier semiconductor, there is nothing to support the heat sink other than the surface of the semiconductor chip, and there is a problem that there is a possibility that the inner lead joint portion and the surface of the semiconductor chip will be greatly damaged.

On the other hand, it is becoming difficult to cope with the increase in speed of semiconductor chips. That is, the lead pitch is reduced due to the large number of leads, and as a result, the lead width is reduced, but the reduction in the lead width causes an increase in the wiring resistance of the leads. On the other hand, in order to increase the speed of semiconductor chips, in order to maintain their performance, it is necessary to improve the electrical characteristics such as wiring capacitance, including lowering the wiring resistance and matching the characteristic impedance. We will ask the package side. In order to improve the electrical characteristics, basically, shortening the wiring length is an important measure, but, for example, even when the film carrier semiconductor device can be mounted on the printed circuit board with the minimum required lead length, If the wiring length up to the electrical selection pad existing on the film carrier semiconductor film carrier is long, the electrical selection of the film carrier semiconductor device before mounting cannot be sufficiently performed.

Generally, the film carrier semiconductor device O
Even if the lead pitch in LB is set to 0.1 to 0.2 mm and the lead length to the OLB portion is shortened, the electrical sorting pad has a limitation on the contact side when performing sufficient electrical sorting, Since the pitch is from 0.3 mm to 0.4 mm, in the case of a large number of leads, the wiring length from the leads of the OLB section to the electrical selection pads becomes long.

As an example for solving this, Japanese Patent Laid-Open No. 62-
As disclosed in Japanese Patent No. 46537, there is a method in which a film carrier semiconductor device is subjected to OLB on a substrate for electric selection having two or more layers with improved electric characteristics, and after performing electric selection, the printed board is further subjected to OLB. .. In this case, although the electric sorting is improved, there is no improvement in the film carrier semiconductor itself, defective OLB to the electric sorting substrate wastes expensive semiconductor chips, and OL to the electric sorting substrate is not used.
There is a defect that B is required.

As another method for improving the electric characteristics,
Electronic Packaging and
Production December 1988 issue 42-4
4p, etc., a ground plane that is a ground layer is formed on the surface of the insulating film portion of the film carrier tape opposite to the surface on which the leads are formed. Some have improved electrical characteristics by connecting to a ground plane through a hole. A film carrier tape with such a structure has two planes of ground plane tape or metal layers on both sides of the insulating film.
It is called a tape (two metal tape, hereinafter referred to as a two-metal tape) and is suitable for impedance matching. Furthermore, in order to improve the electrical characteristics, it is desirable to form the same power supply layer not only on the ground lead but also on several types of power supply leads, as described in the above-mentioned document. , 5 or more layers of 3 or more layers including the layers of the original signal leads are required. However, it is extremely difficult in the manufacturing process of the film carrier tape to provide three or more wiring layers in a structure in which the leads are projected in a cantilever state in the device hole of the film carrier tape, and it is technically possible. However, there is a drawback that the film carrier tape becomes expensive.

[0013]

A film carrier semiconductor device according to the present invention comprises a film carrier tape lead and a semiconductor chip having a lead of a desired shape on an insulating film having a sprocket hole, a device hole, an outer lead hole and a suspender. Of the multi-layer wiring board having a metal plate, a ceramic plate, or one or more wiring layers and bonding pads that are electrically connected to the wiring layers, and an adhesive is applied to at least the semiconductor chip surface and the suspender section. It has a structure in which the bonding pads of the multilayer wiring board and the specific leads of the film carrier semiconductor device are electrically connected to each other, if necessary.

[0014]

The present invention will be described below with reference to the drawings. FIG. 1 is a cross-sectional view after mounting a film carrier semiconductor according to an embodiment of the present invention. As in the past, semiconductor chip 2
The bump 7b formed on b and the lead 4b of the film carrier tape are bonded, and the semiconductor chip 2b is fixed to the printed circuit board 10b by the fixing material 12b. On the other hand, the other end of the lead 4b is outer lead bonded to the electrode 11b formed on the printed board 10b. A heat sink mounting base 15b is joined to the surface of the semiconductor chip 2b with a high thermal conductive insulating adhesive 13b, and is further fixed to the suspender portion 8b of the film carrier tape with an insulating adhesive 14b. 17b is a heat sink, which is a high thermal conductive adhesive 16
It is fixed to the heat sink mounting base 15b at b.

With this structure, the heat generated on the surface of the semiconductor chip not only escapes to the printed circuit board 10b through the adhesive 12b, but also is transferred to the heat sink 17b from the heat sink mounting pedestal 15b and radiated. Therefore, low thermal resistance can be achieved. Further, by fixing the heat sink not only on the surface of the semiconductor chip but also on the suspender portion of the film carrier tape, damage on the surface of the semiconductor chip and the inner lead bonding portion can be mitigated, leading to improvement in reliability. If the bonding portion is sealed with the resin 9b as shown in the figure, it is more effective.

FIG. 2 is a diagram for explaining the second embodiment of the present invention. In the first embodiment, the multilayer wiring board 18b is used instead of the heat sink mounting base. The other points are the same as in the first embodiment. This multilayer wiring board 18b
A bonding electrode 19b is formed on the periphery of the bottom surface of the.
Two or more wiring layers are formed on the multilayer wiring board 18b so as to selectively conduct with the joining electrode 19b, and the joining electrode 19b is connected to the lead 4b by the metal projection 20b or the like.
It is in continuity with. Thereby, for example, the power supply lead and the ground lead can be electrically connected to the power supply wiring layer and the ground wiring layer of the multilayer wiring board, respectively. Further, the multilayer wiring board 18b is made of an insulating and highly heat conductive adhesive 1
It is fixed to the surface of the semiconductor chip 2b by 3b.
If necessary, a thin polyimide film can be sandwiched between the semiconductor chip surface for protection, and the high thermal conductive resin can cover between the semiconductor chip 2b and the multilayer wiring board 18b.

With such a structure, a film carrier semiconductor having a multi-layered metal layer of three or more metals, which exceeds the conventional two-metal tape, can be obtained, and the thermal resistance characteristics can be greatly improved.

The sectional view of the product 3 is an example in which a ceramic substrate 21b incorporating a capacitor is attached instead of the multilayer wiring substrate used in the second embodiment, and of course, this ceramic substrate can also serve as a heat sink attachment base.

FIG. 4 is a sectional view showing a fourth embodiment of the present invention. The multilayer wiring board 18 used in the second embodiment.
Further, an electrode 22b electrically connected to a certain lead 4b is provided on b so that a terminating resistor and a capacitor 23b can be incorporated.

Next, a method of manufacturing the above-described film carrier semiconductor device will be described with reference to the drawings. FIG. 5A is a sectional view of a ceramic multilayer wiring board according to an embodiment of the present invention, and FIG. 5B is a plan view thereof. An electrode 19b is formed on the substrate so as to match the lead on the suspender. The electrode is, for example, a power source for the semiconductor chip 2b,
Each ground is connected to each board through a through hole. Further, a metal protrusion 20b such as solder is formed on the electrode 19b. FIG. 5C shows an example of attaching this ceramic substrate. A high thermal conductive insulating adhesive 13b is applied on the semiconductor chip 2b that has been subjected to inner lead bonding, and an anisotropic conductive sheet 14b 'is laid on a portion of the suspender that is electrically connected to the substrate electrode. .. Substrate protruding electrode 2
After the 0b and the lead 4b on the suspender are aligned, they are joined by thermocompression bonding. Thereafter, a sealing resin may be applied to the inner lead bonding portion as required, and a heat sink may be attached by applying a heat resistant adhesive on the multilayer wiring board 18b. When a simple heat sink mounting pedestal is melted in place of the multilayer wiring board 18b as in the first embodiment, it is not necessary to electrically connect the leads to each other, and the surface of the semiconductor chip is not electrically connected to the leads. Insulating heat resistant adhesive may be used.

[0021]

As described above, according to the present invention, in the film carrier semiconductor device, by providing the heat sink mounting base on the surface of the semiconductor chip and the suspender portion, the heat dissipation of the semiconductor chip can be performed more efficiently than before. Also, by using this heat sink mounting base as a multilayer wiring board and connecting the power supply lead and the ground lead to the wiring layer so as to have a common potential, the electrical characteristics can be greatly improved. Further, by holding the heat sink mounting base not only on the surface of the semiconductor chip but also on the suspender portion, it is possible to mount the heat sink not only on the surface of the film carrier semiconductor device, which has been impossible in the past. Further, it is possible to completely seal the semiconductor chip by using the multilayer wiring board as a resin dam, or to provide a wiring and an electrode pad on the multilayer wiring board and to attach a resistor and a capacitor thereon.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment of the present invention.

FIG. 2 is a sectional view of another embodiment of the present invention.

FIG. 3 is a sectional view of another embodiment of the present invention.

FIG. 4 is a sectional view of another embodiment of the present invention.

FIG. 5 is a manufacturing process chart of an embodiment of the present invention.

FIG. 6 is a manufacturing process chart of a conventional film carrier semiconductor device.

FIG. 7 is a mounting cross-sectional view of a conventional film carrier semiconductor device.

[Explanation of symbols]

 1a Sprocket hole 2a, 2b Semiconductor chip 3a Device hole 4a, 4b Lead 5a Sorting pad 6a Film carrier tape 7a Bump 8a, 8b Suspender 9a, 9b Resin 10a, 10b Printed board 11a, 11b Printed board electrode 12a, 12b Adhesive 13b High thermal conductive insulating adhesive 14b Insulating adhesive 14b 'Anisotropic conductive sheet 15b Heat sink mounting base 16b High thermal conductive adhesive 17b Heat sink 18b Multilayer wiring board 19b Electrode 20b Metal protrusion 21b Ceramic capacitor 22b Electrode 23b Resistor or capacitor

Claims (5)

[Claims] 1. A sprocket hole which is a hole for transporting and positioning, a device hole in which a semiconductor chip is inserted, an outer lead hole which surrounds the device hole and in which an outer lead is inserted, and between the device hole and the outer lead hole. A film carrier semiconductor device in which a lead of a film carrier tape having a lead of a desired shape and a bump provided on an electrode pad of a semiconductor chip are bonded on an insulating film having a suspender which is a film frame for supporting the lead. In the film carrier semiconductor device, the heat sink mounting pedestal, which is approximately the same size as the suspenders and is made of a high thermal conductive material, is adhered to the surface of the semiconductor chip and the suspenders with an electrically insulating and high thermal conductive adhesive. .. 2. A sprocket hole which is a hole for carrying and positioning, a device hole in which a semiconductor chip is inserted, an outer lead hole which surrounds the device hole and in which an outer lead is inserted, and between the device hole and the outer lead hole. A film carrier semiconductor device in which a lead of a film carrier tape having a lead of a desired shape and a bump provided on an electrode pad of a semiconductor chip are bonded on an insulating film having a suspender which is a film frame for supporting the lead. In (1), a wiring board made of ceramic or resin of about the same size as the suspender is adhered to the surface of the semiconductor chip and the suspender section with an electrically insulating and high thermal conductive adhesive, and a specific lead or semiconductor chip electrode is wired. Connected to the board pad A film carrier semiconductor device characterized in that 3. The film carrier semiconductor device according to claim 2, wherein a resistor and a capacitor are formed in the wiring board. 4. The film carrier semiconductor device according to claim 2, wherein a resistor component or a capacitor component is mounted on the wiring board. 5. A sprocket hole, a device hole,
A step of preparing a film carrier tape having leads of a desired shape and an electric selection pad on an insulating film having outer lead holes and suspenders; and a step of preparing a semiconductor chip having bumps formed on electrode pads in advance, and a film carrier In a method for manufacturing a film carrier semiconductor device, which comprises a step of bonding a tape lead and a bump of a semiconductor chip, and a step of bringing a contactor into contact with an electrical selection pad to perform electrical selection and a bias test, at least a film After the step of bonding the leads of the carrier and the bumps of the semiconductor chip,
A method of manufacturing a film carrier semiconductor device, comprising a step of adhering a heat sink mount or a multilayer wiring board to a semiconductor chip and a suspender section via an insulating and highly heat conductive adhesive.