JPH05314020A - Memory card device - Google Patents

Abstract

PURPOSE:To make the remaining recording capacity of an attribute area after the relief of a write failure and the remaining recording capacity of an actual data area coincide with each other by providing a control means to reduce the remaining recording capacity of attribute information. CONSTITUTION:In the case that the write failure occurs in the address B of the data area, relieving processing to write the data (b) to be written in the address B in another address C provided with a normal memory cell is executed. In this case, a data input/output control circuit subtracts the value of the sum of the capacity (b') of the address B and the capacity (c') of the address C from the remaining capacity (a') of the data area recorded in the address A of the attribute area on the basis of a fact that the write failure occurred in the address B and the address C is used for its relieving area, and records this subtracted result a'-(b'+c') in the address A of the attribute area as the remaining recording capacity of the actual data area.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a memory card device using an EEPROM (Electrically Erasable and Programmable Read Only Memory) as a semiconductor memory.

[0002]

As is well known, EEPROMs are currently
It has attracted attention as a data recording medium that replaces magnetic disks, and it does not require a backup battery for holding data and can reduce the cost of the chip itself. SRAM (static random access memory) ) Or D (dynamic) RAM has a unique advantage that it does not have, and therefore, development for use as a memory card has been actively conducted.

In this memory card, for example, an optical image of a photographed subject is converted into an electric image signal by using a solid-state image pickup device, the image signal is converted into digital image data, and recorded in a semiconductor memory. A memory card that is suitable for use in still cameras, etc., and has an EEPROM built into a card-shaped case that can be attached to and detached from the camera body, so that it can be handled equivalent to a film in a normal camera. It was made possible.

FIG. 4 shows a memory map of an EEPROM incorporated in such a memory card. That is, the address space of the EEPROM is divided into an attribute area and a data area. Among these, various attribute information is recorded in the attribute area for notifying the electronic still camera on the host side of the type of the memory card and the total recording capacity of the data area.
In this attribute area, an address A for storing data indicating the remaining recording capacity of the data area is set, and at the address A, data a indicating that the remaining recording capacity of the data area is a. 'Is recorded.

By the way, in the EEPROM, the memory cell is deteriorated according to the number of times data is written, read, erased, etc., and the number of times of use (tens of thousands to millions) is shorter than that of SRAM. However, there is an inconvenience that defective writing of data easily occurs. Therefore, conventionally, a relief measure has been considered in which data to be written in a memory cell in which a write failure has occurred is written in another normal memory cell to be relieved (for example, Japanese Patent Application No. 3-3171).
69). Specifically, this remedy is shown in FIG.
As shown in, when a write failure occurs at the address B of the data area, the data b to be written at the address B is written at the address C having another normal memory cell.

In this case, since the memory card is requested to write the data b to the address B, the content of the address A, that is, the remaining recording capacity of the data area is subtracted from the capacity b'of the address B. It is operated so as to be rewritten to a'-b '. However, in reality, since the data b is relieved to the address C because the writing failure occurs at the address B, the capacity b ′ + c ′ obtained by adding the capacity b ′ of the address B and the capacity c ′ of the address C. Is the remaining recording capacity a of the data area
It is said that the remaining recording capacity a′-b ′ recorded in the attribute area is different from the actual remaining recording capacity a ′-(b ′ + c ′) in the data area. The problem arises.

[0007]

As described above, in the conventional memory card, when the relief measure for writing the data to be written in the memory cell in which the write failure occurs into another normal memory cell, the attribute area However, there is a problem in that the remaining recording capacity recorded on the disk is different from the actual remaining recording capacity of the data area.

Therefore, the present invention has been made in consideration of the above circumstances, and the residual recording capacity of the attribute area and the actual residual recording capacity of the actual data area are made to coincide with each other even when a remedy against a write failure is taken. It is an object of the present invention to provide an extremely good memory card device.

[0009]

A memory card device according to the present invention has a semiconductor memory in which attribute information including the remaining recording capacity is recorded, and can output the remaining recording capacity in response to a request from the outside. Is intended for. Then, in the state where the write failure is detected in the area of the semiconductor memory to which the data writing is requested, a relief unit that writes the data to be written in the write defective area to another empty area, and an area in which the data is written by the relief unit And a control means for reducing the remaining recording capacity of the attribute information based on the capacity of the storage area and the capacity of the defective writing area.

[0010]

According to the above configuration, the remaining recording capacity of the attribute information is reduced based on the capacity of the area in which the data is written by the relief means and the capacity of the defective writing area. Even when a remedy against the above is taken, the remaining recording capacity of the attribute information can be matched with the actual remaining recording capacity.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to a memory card of an electronic still camera will be described in detail below with reference to the drawings. In FIG. 1, reference numeral 11 is a memory card main body, which is connected to an electronic still camera main body (not shown) via a connector 12 installed at one end thereof. The connector 12 is supplied with data to be written in the memory card body 11 and address data indicating the writing location from the electronic still camera body side.

Then, the data supplied to the connector 12 is taken in via a bus line 13 to a data input / output control circuit 14 having a CPU (not shown) built therein. The data input / output control circuit 14 has a built-in buffer memory (not shown) capable of high-speed writing and high-speed reading of data, and temporarily records the taken-in data in the buffer memory. After that, the data input / output control circuit 14 stores the data recorded in the buffer memory in the EEPROM of a plurality of chips (4 chips in the case shown) via the bus line 15.
It is read at a timing corresponding to the 16 write cycles and recorded in the EEPROM 16.

In this case, the data input / output control circuit 14 is
Each time data is written to the EEPROM 16, for example, in page units, the written page data is read from the EEPROM 16 and write verify is performed to determine whether or not the data matches the data recorded in the buffer memory. The data input / output control circuit 14
If the data read from the EEPROM 16 does not match the data recorded in the buffer memory,
When the data read from the EEPROM 16 and the data recorded in the buffer memory completely match each other while the operation is repeated for a predetermined number of times by transferring the data from the buffer memory to the EEPROM 16 again, writing is performed. Writing is completed.

Next, when the data is read from the EEPROM 16 to the outside of the memory card main body 11, the address that specifies the data to be read from the electronic still camera main body side via the connector 12 is the data input / output control circuit 1.
4 is supplied. Then, the data input / output control circuit 14
Reads data from the EEPROM 16 based on the input address and temporarily records the data in the buffer memory.
After that, the data input / output control circuit 14 outputs the data recorded in the buffer memory to the outside through the read connector 12, and the data is read there.

Therefore, according to the above configuration,
Since the data transfer between the electronic still camera body and the memory card body 11 is always performed via the buffer memory, the writing speed and the reading speed of data to the memory card body 11 seen from the electronic still camera body side are improved. Can be made

Here, the data input / output control circuit 14
As shown in FIG. 2, when a write failure occurs in the address B of the data area, the rescue process of writing the data b to be written in the address B into the address C having another normal memory cell is executed. In this case, the data input / output control circuit 14 determines that the data area recorded at the address A of the attribute area is based on the fact that the writing failure occurs at the address B and that the address C is used as the relief area. Remaining capacity a '
Is subtracted from the value obtained by adding the capacity b ′ of the address B and the capacity c ′ of the address C, and the subtraction result a ′ − (b ′ + c ′) is used as the remaining recording capacity of the actual data area, It operates to record at address A.

Therefore, according to the configuration of the above embodiment, the remaining recording capacity of the attribute area can be matched with the remaining recording capacity of the actual data area. By reading the contents of the address A, the remaining recording capacity of the data area can be accurately detected, and as a result of reading the contents of the address A of the attribute area by the electronic still camera as in the conventional case, the remaining recording capacity is still left. However, it is possible to prevent the inconvenience that data cannot be actually recorded in the data area.

FIG. 3 shows a modification of the above embodiment. That is, the case is shown in which the remaining recording capacity in the entire storage area including the attribute area and the data area is written in the address A of the attribute area, instead of the remaining recording capacity in the data area.
Even in this case, since the capacity of the attribute area is fixed in advance, it is substantially equivalent to writing the remaining recording capacity of the data area at the address A of the attribute area. In the example of FIG. 3, when d ′ is recorded in the address A of the attribute area,
This shows a state in which a write failure has occurred in address B and data b to be written in address B has been written in address C. The contents of address A are d'as is clear from the above description.
It is − (b ′ + c ′). The present invention is not limited to the above-described embodiments, but can be variously modified and implemented without departing from the scope of the invention.

[0019]

As described in detail above, according to the present invention,
It is possible to provide a very good memory card device in which the remaining recording capacity of the attribute area and the actual remaining recording capacity of the actual data area are made to match each other even when a remedy against write failures is taken.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a memory card device according to the present invention.

FIG. 2 is a diagram shown for explaining the operation of the embodiment.

FIG. 3 is a diagram shown for explaining the operation of a modified example of the embodiment.

FIG. 4 is a diagram showing a memory map of an EEPROM incorporated in a memory card.

FIG. 5 is a diagram shown for explaining a conventional problem.

[Explanation of Codes] 11 ... Memory card main body, 12 ... Connector, 13 ... Bus line, 14 ... Data input / output control circuit, 15 ... Bus line, 16 ... EEPROM.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Koji Maruyama 8 Shinsita-cho, Isogo-ku, Yokohama-shi, Kanagawa, Ltd. In the Institute of Visual Media Technology, Toshiba Corporation (72) Tomoyuki Maekawa 8 Shinsugita-cho, Isogo-ku, Yokohama, Kanagawa Incorporated company Toshiba Media & Video Technology Laboratories (72) Inventor Satoshi Sato 3-3-9 Shimbashi, Minato-ku, Tokyo Inside Toshiba Abu E., Ltd.

Claims (1)

[Claims] 1. In a memory card device having a semiconductor memory in which attribute information including a remaining recording capacity is recorded and capable of outputting the remaining recording capacity in response to a request from the outside, data writing to the semiconductor memory is required. A write-back failure area is detected, the data to be written to the write-failed area is written into another empty area,
A memory card device comprising: control means for reducing the remaining recording capacity of the attribute information based on the capacity of the area where data is written by the relief means and the capacity of the defective write area. ..