JPH0546488A - Memory card device - Google Patents

Abstract

PURPOSE:To easily discriminate whether a write fault is due to a verify fault or not and to suppress the generation of a verify fault of an electrically erasable and programmable ROM (EEPROM) by preventing data rewrite from concentrat ing in the specific storage area. CONSTITUTION:The memory card is provided with an EEPROM 16 whose storage area is divided into blocks with a constant capacity and having data area and data management area saving data management information saved in the data area for each block and a control means 14 writing the number of data recordings in the data management area corresponding to the data area where the data is saved each time data is saved in the data area of each block of this EEPROM 16.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a memory card device using an EEPROM (Electrically Erasable and Programmable Read Only Memory) as a semiconductor memory, and more particularly to a digital image of an optical image of a photographed subject. The present invention relates to a device suitable for use in an electronic still camera device or the like that converts data and records it in a semiconductor memory.

[0002]

2. Description of the Related Art As is well known, an electronic still which converts an optical image of a photographed object into an electric image signal by using a solid-state image pickup device, converts the image signal into digital image data, and records the digital image data in a semiconductor memory. Camera devices have been developed.
In this type of electronic still camera device, a memory card in which a semiconductor memory is built in a card-shaped case is configured to be detachable from the camera body so that it can be used as a film in a normal camera. Equivalent handling can be done.

The memory card of the electronic still camera device is currently being standardized, and the built-in semiconductor memory is required to have a large storage capacity for recording a plurality of digital image data. For example, SR
AM (Static Random Access Memory),
A mask ROM and an EEPROM capable of electrically writing and erasing data have been considered, and a memory card using an SRAM has already been commercialized.

By the way, the memory card using the SRAM has an advantage that it can correspond to a data structure of any format and has a high data writing speed and a high data reading speed, but holds the written data. Since it is necessary to store a backup battery in the memory card for this purpose, the storage capacity is reduced by the amount of the battery storage space and SR
There is a problem that the cost of AM itself is high and causes an economic disadvantage.

Therefore, in order to solve the problems of the SRAM, the EEPROM is now attracting attention as a semiconductor memory used for a memory card. This EEP
The ROM has been attracting attention as a recording medium that replaces the magnetic disk, and it does not require a backup battery for holding data and can reduce the cost of the chip itself, which is a unique advantage that SRAM does not have. Therefore, development for use as a memory card has been actively carried out.

Here, FIG. 3 shows the lengths of a memory card using an SRAM (SRAM card) and a memory card using an EEPROM (EEPROM card) in comparison. First, regarding the backup battery and the cost of the comparison items 1 and 2, the SRAM card needs the backup battery and the cost is high as described above, while the EEPROM card does not need the backup battery and the cost is high. Also has the advantage that it can be lowered.

Regarding the write speed and read speed of comparison items 3 and 4, random access common to SRAM and EEPROM is performed for writing and reading data to or from a byte or bit arbitrarily designated by an address. A mode and a page mode peculiar to the EEPROM, in which data is written and read collectively in page units by designating a page made up of a plurality of consecutive bytes (several hundred bytes), can be considered.

In the random access mode,
The SRAM has a high writing speed and a high reading speed, and the EEPROM has a low writing speed and a low reading speed. In addition, EEPROM
In the page mode, since a large amount of data for one page is written and read all at once, the data write speed and the data read speed are faster than in the random access mode.

Further, the erase (erase) mode of the comparison item 5 is a mode peculiar to the EEPROM, which is the SRAM.
Is a mode that does not exist in. That is, the EEPROM
When writing new data to the area where data has already been written, new data cannot be written unless the previously written data is erased. Therefore, when writing data, this erase mode Is to be executed.

Further, the write verify of the comparison item 6 is also a mode peculiar to the EEPROM and is not present in the SRAM. That is, the EEPROM is
When writing data, complete writing is not normally performed in one writing operation. Therefore, EEP
EEP every time one write operation is performed to ROM
It is necessary to read the written contents of the ROM and check whether or not they are correctly written, and this is the write verify.

Specifically, the data to be written in the EEPROM is recorded in the buffer memory, the data is transferred from the buffer memory to the EEPROM and written, and then,
The contents written in the EEPROM are read out and compared with the contents in the buffer memory to determine whether they match. Then, when it is determined as a result of the write verify that there is a mismatch (error), the operation of writing the contents of the buffer memory to the EEPROM again is repeated.

As is clear from the above comparison results, EE
The PROM does not require a backup battery, is low in cost, and is capable of writing and reading data in page units. It has unique advantages not found in SRAM, but on the other hand, it does not store data in the random access mode. There is also a disadvantage that the writing speed and the reading speed are slow and that a mode such as an erase mode and a write verify which is not in the SRAM is required.

Therefore, as the semiconductor memory used for the memory card, the EE is used instead of the currently used SRAM.
Considering the use of PROM, the problems of data write speed and read speed, the problem of needing erase mode and write verify, etc. can be solved, and it can be handled in the same manner as a memory card with built-in SRAM. As described above, that is, it is important to make various improvements in detail so that it can be used in an SRAM card-like manner.

In this case, the EEP is particularly problematic.
In the ROM, when the number of data rewrites exceeds a certain number, the memory cells are rapidly deteriorated, and a data write failure is likely to occur. That is, since the EEPROM is developed for recording program data and is intended to be able to rewrite data when the version of the program is upgraded, it is possible to support rewriting of data many times. Because it is not designed to. However, when the EEPROM is used as a substitute for the SRAM, it is naturally used that data is frequently rewritten, so that it is inevitable that the rate of occurrence of write defects is dramatically increased.

Regarding this write failure, conventionally, it is determined that the write failure occurs when the write verify processing described above is not correctly written even after repeating a predetermined number of times. However, in the past, EEPRO
When a writing failure occurs in M, the writing failure is
As described above, there is a problem that it is not possible to determine whether it is a so-called verification failure due to the increase in the number of times of rewriting data, a manufacturing failure of the EEPROM itself, or mechanical breakdown. In addition, EEPROM
If data is frequently rewritten in a particular storage area, the verification failure will occur in a very short period of time.

[0016]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
In the conventional memory card with built-in ROM, EEPRO
It is difficult to determine the cause of the write failure in M, and if the data is rewritten frequently in a specific storage area of the EEPROM, the verify failure occurs in a very short period of time. It has the problem of being lost.

Therefore, the present invention has been made in consideration of the above circumstances, and it is possible to easily determine whether or not the write failure is due to the verify failure, and thus the data rewriting concentrates on a specific storage area. To prevent that
It is an object of the present invention to provide an extremely good memory card device capable of suppressing the occurrence of verification failure of an EEPROM.

[0018]

In a memory card device according to the present invention, a storage area is divided into a plurality of blocks having a fixed capacity, and a data area and management information of data recorded in the data area are recorded in each block. And a control unit for writing the number of times of data recording to the data management area corresponding to the data area where the data is recorded every time the data is recorded in the data area of each block of the EEPROM. It is equipped with and.

[0019]

According to the above configuration, when a write failure occurs, it is possible to easily determine whether or not it is due to a verify failure by detecting the number of data recordings in the data management area. It is possible to prevent rewriting from concentrating on a specific block and suppress the occurrence of verify failure in the EEPROM.

[0020]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment in which the present invention is applied to an electronic still camera device will be described in detail below with reference to the drawings. In FIG. 1, 11 is a memory card main body, which is connected to an electronic still camera main body (not shown) via a connector 12 installed at one end thereof. The connector 12 is supplied with data to be written in the memory card body 11 and address data indicating the writing location from the electronic still camera body side.

The data supplied to the connector 12 is taken into the data input / output control circuit 14 via the bus line 13. This data input / output control circuit 14
Incorporates a buffer memory (not shown) capable of high-speed writing and high-speed reading of data, and temporarily records the taken-in data in the buffer memory. After that, the data input / output control circuit 14 outputs a plurality of data (4 bytes in the case shown in the drawing) to the data recorded in the buffer memory via the bus line 15.
The EEPROM 16 is read at a timing corresponding to the write cycle of the EEPROM 16 and recorded in the EEPROM 16.

In this case, the data input / output control circuit 14 is
Each time data is written to the EEPROM 16, the EEP
The written data is read from the ROM 16 and a write verify is executed to determine whether or not the data matches the data recorded in the buffer memory. Then, when the data read from the EEPROM 16 and the data recorded in the buffer memory do not match, the data input / output control circuit 14 again reads the EE from the buffer memory.
The data is transferred to the PROM 16 to be written,
While this operation is repeated a predetermined number of times, the EEPROM 1
When the data read from 6 and the data recorded in the buffer memory completely match, the data writing is completed.

Next, when the data is read from the EEPROM 16 to the outside of the memory card body 11, the address that specifies the data to be read from the electronic still camera body side via the connector 12 is the data input / output control circuit 1.
4 is supplied. Then, the data input / output control circuit 14
Reads data from the EEPROM 16 based on the input address and temporarily records the data in the buffer memory.
After that, the data input / output control circuit 14 outputs the data recorded in the buffer memory to the outside through the read connector 12, and the data is read there.

Therefore, according to the above configuration,
Since data transfer between the electronic still camera body and the memory card body 11 is always performed via the buffer memory, the data writing speed and the data reading speed can be improved, and the EEPROM 1
Since the write verify specific to 6 is also performed using the buffer memory, the memory card main body 11
As for the handling of, it can be used for SRAM card like.

Here, as shown in FIG. 2, the storage area of the EEPROM 16 is divided into a plurality of blocks 1 to N (one block is a few Kbytes) of a fixed capacity which is the minimum unit for erasing data. ing. Then, each of the blocks 1 to N is divided into a plurality of pages each having a certain capacity, which is the minimum unit for writing and reading data. Of these, pages 1 to M form a data area in which data is recorded, and page X forms a data management area in which management information of data recorded in the data area is recorded.

In the EEPROM 16, the address is externally designated by the data input / output control circuit 14 to repeatedly write and read data in page units of several hundred bytes, thereby freely writing data in block units. Writing and reading can be performed.

Here, in the page X which constitutes the data management area of each of the blocks 1 to M, the data input / output control circuit 14 is provided.
Of the block 1 to M to which the page X belongs by the control of
The number of times data is recorded is recorded. The number of times of data recording is determined by the data input / output control circuit 14 when the erase is executed for the blocks 1 to M.
It is updated under the control of.

For example, when the data already written in the block 5 is rewritten with new data, when the address data designating the block 5 is input from the outside through the connector 12, the data input / output control circuit 14 , EE
The data management information recorded on page X of block 5 is read from the PROM 16 and recorded in the buffer memory.

Then, the data input / output control circuit 14 erases the contents of the block 5 and updates the data management information recorded in the buffer memory so that the number of data recordings is incremented by one. After that, the data input / output control circuit 14
Writes data input from the outside through the connector 12 to pages 1 to M of the block 5 of the EEPROM 16, transfers updated data management information from the buffer memory to the EEPROM 16 and writes to page X of the block 5, At this point, the data rewriting for block 5 is completed.

Therefore, according to the configuration of the above embodiment, each block 1 to N in the storage area of the EEPROM 16 is
Page X that constitutes the data management area of
Since the number of times of data recording is written in the data area of the blocks 1 to N to which the data block belongs, the data input / output control circuit 14 belongs to the defective block even if a write failure occurs in any of the blocks 1 to N. By looking at the number of times of rewriting data recorded on page X, if it is more than a predetermined number of times, it is determined to be a verification failure, and if it is less than a predetermined number of times, it can be easily determined to be due to manufacturing failure or mechanical breakdown of the EEPROM 16. it can.

Further, the data input / output control circuit 14 records the data in page X of a plurality of blocks when it is requested to write data in any one of the blocks in a state where a plurality of erased blocks exist. The data rewriting frequency can be controlled so that the data rewriting frequency of each block 1 to N is averaged so that the data rewriting frequency is read and the data is written in the block having the smallest data recording frequency. Therefore, it is possible to prevent the verification failure of the EEPROM 16 from occurring. The present invention is not limited to the above-described embodiments, but can be variously modified and implemented without departing from the scope of the invention.

[0032]

As described in detail above, according to the present invention,
It is possible to easily determine whether or not the write failure is due to the verify failure, and thus it is possible to prevent the data rewrite from concentrating on a specific storage area and suppress the occurrence of the verify failure of the EEPROM. A good memory card device can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a memory card device according to the present invention.

FIG. 2 is a diagram showing a configuration of a storage area of an EEPROM in the embodiment.

FIG. 3 is a diagram showing the lengths of an SRAM and an EEPROM in comparison with each other.

[Explanation of symbols]

11 ... Memory card main body, 12 ... Connector, 13 ... Bus line, 14 ... Data input / output control circuit, 15 ... Bus line, 16 ... EEPROM.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Internal reference number FI Technical display location G11C 16/06 H04N 5/907 B 7916-5C (72) Inventor Koji Maruyama Isogo-ku, Yokohama-shi, Kanagawa Shin-Sugita-cho, 8th Incorporation company, Toshiba Visual Media Research Laboratories (72) Inventor Kazuo Konishi, 8th, Shinsugita-cho, Isogo-ku, Yokohama, Kanagawa Pref.

Claims (1)

[Claims] 1. An EEPROM having a storage area divided into a plurality of blocks having a fixed capacity, each block having a data area and a data management area for recording management information of data recorded in the data area; A memory card characterized by comprising control means for writing the number of times of data recording in a data management area corresponding to the data area where the data is recorded every time data is recorded in the data area of each block. apparatus.