JPH0527831B2 - - Google Patents
Info
- Publication number
- JPH0527831B2 JPH0527831B2 JP59171665A JP17166584A JPH0527831B2 JP H0527831 B2 JPH0527831 B2 JP H0527831B2 JP 59171665 A JP59171665 A JP 59171665A JP 17166584 A JP17166584 A JP 17166584A JP H0527831 B2 JPH0527831 B2 JP H0527831B2
- Authority
- JP
- Japan
- Prior art keywords
- address
- memory
- data
- pin
- test
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000015654 memory Effects 0.000 claims description 157
- 238000012360 testing method Methods 0.000 claims description 116
- 239000013598 vector Substances 0.000 claims description 21
- 230000004044 response Effects 0.000 claims description 14
- 238000003860 storage Methods 0.000 claims description 6
- 238000001514 detection method Methods 0.000 description 14
- 238000010586 diagram Methods 0.000 description 12
- 238000000034 method Methods 0.000 description 10
- 230000008569 process Effects 0.000 description 8
- 239000004065 semiconductor Substances 0.000 description 7
- 238000004891 communication Methods 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 230000006870 function Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 108010076504 Protein Sorting Signals Proteins 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 230000001351 cycling effect Effects 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012544 monitoring process Methods 0.000 description 1
- 238000005192 partition Methods 0.000 description 1
- 238000000638 solvent extraction Methods 0.000 description 1
- 230000036962 time dependent Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/56—External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31919—Storing and outputting test patterns
- G01R31/31921—Storing and outputting test patterns using compression techniques, e.g. patterns sequencer
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/3193—Tester hardware, i.e. output processing circuits with comparison between actual response and known fault free response
- G01R31/31935—Storing data, e.g. failure memory
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
- G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
- G11C29/36—Data generation devices, e.g. data inverters
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/317—Testing of digital circuits
- G01R31/3181—Functional testing
- G01R31/319—Tester hardware, i.e. output processing circuits
- G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
- G01R31/31926—Routing signals to or from the device under test [DUT], e.g. switch matrix, pin multiplexing
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Tests Of Electronic Circuits (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US564853 | 1983-12-19 | ||
| US06/564,853 US4639919A (en) | 1983-12-19 | 1983-12-19 | Distributed pattern generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60130839A JPS60130839A (ja) | 1985-07-12 |
| JPH0527831B2 true JPH0527831B2 (enExample) | 1993-04-22 |
Family
ID=24256161
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59171665A Granted JPS60130839A (ja) | 1983-12-19 | 1984-08-20 | テスト装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4639919A (enExample) |
| EP (1) | EP0149048B1 (enExample) |
| JP (1) | JPS60130839A (enExample) |
| DE (1) | DE3472839D1 (enExample) |
Families Citing this family (49)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0337023A1 (en) * | 1983-11-25 | 1989-10-18 | Giordano Associates, Inc. | Decompaction of stored test data in automatic test systems |
| KR900001976B1 (ko) * | 1984-11-01 | 1990-03-30 | 가부시끼가이샤 히다찌세이사꾸쇼 | 다수 개의 패턴 발생기를 포함하는 패턴 검사 장치 |
| DE3676377D1 (de) * | 1985-01-31 | 1991-02-07 | Hitachi Ltd | Generator fuer testmuster. |
| DE3515802A1 (de) * | 1985-05-02 | 1986-11-06 | Siemens AG, 1000 Berlin und 8000 München | Anordnung zur schnellen erzeugung von grossen pruefdatenwortmengen in einer pruefeinrichtung |
| JPH0750159B2 (ja) * | 1985-10-11 | 1995-05-31 | 株式会社日立製作所 | テストパタ−ン発生装置 |
| US4931723A (en) * | 1985-12-18 | 1990-06-05 | Schlumberger Technologies, Inc. | Automatic test system having a "true tester-per-pin" architecture |
| CA1251575A (en) | 1985-12-18 | 1989-03-21 | A. Keith Jeffrey | Automatic test system having a "true tester-per-pin" architecture |
| JPH0746127B2 (ja) * | 1986-05-20 | 1995-05-17 | 三菱電機株式会社 | 半導体試験装置 |
| DE3752280T2 (de) * | 1986-07-30 | 2000-02-03 | Hitachi, Ltd. | Mustergenerator |
| US4792951A (en) * | 1986-09-11 | 1988-12-20 | Grumman Aerospace Corporation | Apparatus and method of stimulating an equipment |
| US4773071A (en) * | 1986-10-02 | 1988-09-20 | Grumman Aerospace Corporation | Memory for storing response patterns in an automatic testing instrument |
| US5265101A (en) * | 1987-09-14 | 1993-11-23 | Texas Instruments Incorporated | Function array sequencing for VLSI test system |
| DE3827959A1 (de) * | 1988-08-17 | 1990-02-22 | Siemens Ag | Testgeraet zur funktionspruefung von elektroischen bausteinen |
| US5029171A (en) * | 1989-05-25 | 1991-07-02 | Hughes Aircraft Company | Test vector generation system |
| US5127011A (en) * | 1990-01-12 | 1992-06-30 | International Business Machines Corporation | Per-pin integrated circuit test system having n-bit interface |
| IL94115A (en) * | 1990-04-18 | 1996-06-18 | Ibm Israel | Dynamic process for creating pseudo-random test templates for pompous hardware design violence |
| US5200963A (en) * | 1990-06-26 | 1993-04-06 | The United States Of America As Represented By The Administrator, National Aeronautics And Space Administration | Self-checking on-line testable static ram |
| US5212443A (en) * | 1990-09-05 | 1993-05-18 | Schlumberger Technologies, Inc. | Event sequencer for automatic test equipment |
| US5225772A (en) * | 1990-09-05 | 1993-07-06 | Schlumberger Technologies, Inc. | Automatic test equipment system using pin slice architecture |
| US5293080A (en) * | 1990-10-09 | 1994-03-08 | Hewlett-Packard Company | Method and apparatus for generating test waveforms to be applied to a device under test |
| US5285453A (en) * | 1990-12-28 | 1994-02-08 | International Business Machines Corporation | Test pattern generator for testing embedded arrays |
| DE4305442C2 (de) * | 1993-02-23 | 1999-08-05 | Hewlett Packard Gmbh | Verfahren und Vorrichtung zum Erzeugen eines Testvektors |
| US5375091A (en) * | 1993-12-08 | 1994-12-20 | International Business Machines Corporation | Method and apparatus for memory dynamic burn-in and test |
| US5805471A (en) * | 1994-11-01 | 1998-09-08 | Pycon, Inc. | Driver board apparatus having SRAM and burn-in system and method using host computer |
| KR0157900B1 (ko) * | 1995-10-02 | 1999-03-20 | 문정환 | 집적 회로내의 입출력 장치 |
| DE69613560T2 (de) * | 1996-04-30 | 2002-03-14 | Agilent Technologies, Inc. | Ein Prüfgerät für elektronische Schaltkreise oder Platinen mit komprimierten Datenfolgen |
| US6381506B1 (en) * | 1996-11-27 | 2002-04-30 | Victor Grappone | Fail-safe microprocessor-based control and monitoring of electrical devices |
| US6014764A (en) * | 1997-05-20 | 2000-01-11 | Schlumberger Technologies Inc. | Providing test vectors with pattern chaining definition |
| US5794175A (en) * | 1997-09-09 | 1998-08-11 | Teradyne, Inc. | Low cost, highly parallel memory tester |
| US5825787A (en) * | 1997-11-25 | 1998-10-20 | Xilinx, Inc. | System and method for accessing a test vector memory |
| US6115763A (en) * | 1998-03-05 | 2000-09-05 | International Business Machines Corporation | Multi-core chip providing external core access with regular operation function interface and predetermined service operation services interface comprising core interface units and masters interface unit |
| GB9805054D0 (en) | 1998-03-11 | 1998-05-06 | Process Intelligence Limited | Memory test system with buffer memory |
| US6158032A (en) * | 1998-03-27 | 2000-12-05 | International Business Machines Corporation | Data processing system, circuit arrangement and program product including multi-path scan interface and methods thereof |
| JP2002131401A (ja) * | 2000-10-27 | 2002-05-09 | Ando Electric Co Ltd | データログ取得回路、及びデータログ取得方法 |
| US7062697B2 (en) * | 2000-12-07 | 2006-06-13 | Youngtek Electronics Corporation | Pre-stored digital word generator |
| US6515914B2 (en) * | 2001-03-21 | 2003-02-04 | Micron Technology, Inc. | Memory device and method having data path with multiple prefetch I/O configurations |
| US6779140B2 (en) * | 2001-06-29 | 2004-08-17 | Agilent Technologies, Inc. | Algorithmically programmable memory tester with test sites operating in a slave mode |
| JP3610978B2 (ja) * | 2002-06-13 | 2005-01-19 | 株式会社村田製作所 | モジュール試験装置 |
| US7103750B2 (en) * | 2003-03-20 | 2006-09-05 | International Business Machines Corporation | Method and apparatus for finding repeated substrings in pattern recognition |
| KR100557221B1 (ko) * | 2004-11-04 | 2006-03-07 | 삼성전자주식회사 | 메모리 모듈에서의 신호 무결성 테스트 방법 및 이를 위한메모리 모듈의 버퍼 |
| US8046655B2 (en) * | 2005-05-18 | 2011-10-25 | Stmicroelectronics Pvt. Ltd. | Area efficient memory architecture with decoder self test and debug capability |
| WO2007095996A1 (en) * | 2006-02-23 | 2007-08-30 | Mentor Graphics Corp. | Cross-bar switching in an emulation environment |
| KR20080069778A (ko) * | 2007-01-24 | 2008-07-29 | 삼성전자주식회사 | 멀티칩 테스트를 위한 반도체 메모리 장치의 테스트 회로및 그의 테스트 방법 |
| US8295182B2 (en) * | 2007-07-03 | 2012-10-23 | Credence Systems Corporation | Routed event test system and method |
| US7554858B2 (en) | 2007-08-10 | 2009-06-30 | Micron Technology, Inc. | System and method for reducing pin-count of memory devices, and memory device testers for same |
| US7779313B2 (en) * | 2008-03-30 | 2010-08-17 | Advantest Corporation | Testing apparatus and testing method |
| JP2011524039A (ja) * | 2008-05-21 | 2011-08-25 | ヴェリジー(シンガポール) プライベート リミテッド | 反復ビット値パターンを決定する方法及び装置 |
| KR102615807B1 (ko) * | 2016-08-23 | 2023-12-20 | 에스케이하이닉스 주식회사 | 래치회로를 테스트할 수 있는 테스트방법을 제공하는 반도체장치 |
| GB201711055D0 (en) * | 2017-07-10 | 2017-08-23 | Accelercomm Ltd | Electronic device with bit pattern generation, integrated circuit and method for polar coding |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US31056A (en) * | 1861-01-01 | Nut-machine | ||
| US3772595A (en) * | 1971-03-19 | 1973-11-13 | Teradyne Inc | Method and apparatus for testing a digital logic fet by monitoring currents the device develops in response to input signals |
| USRE31056E (en) | 1977-03-23 | 1982-10-12 | Fairchild Camera & Instrument Corp. | Computer controlled high-speed circuit for testing electronic devices |
| US4293950A (en) * | 1978-04-03 | 1981-10-06 | Nippon Telegraph And Telephone Public Corporation | Test pattern generating apparatus |
| US4195770A (en) * | 1978-10-24 | 1980-04-01 | Burroughs Corporation | Test generator for random access memories |
| JPS5585264A (en) * | 1978-12-23 | 1980-06-27 | Toshiba Corp | Function test evaluation device for integrated circuit |
| JPS5914840B2 (ja) * | 1979-10-19 | 1984-04-06 | 日本電信電話株式会社 | 半導体メモリ試験用パタ−ン発生装置 |
| US4369511A (en) * | 1979-11-21 | 1983-01-18 | Nippon Telegraph & Telephone Public Corp. | Semiconductor memory test equipment |
| US4370746A (en) * | 1980-12-24 | 1983-01-25 | International Business Machines Corporation | Memory address selector |
| FR2506045A1 (fr) * | 1981-05-15 | 1982-11-19 | Thomson Csf | Procede et dispositif de selection de circuits integres a haute fiabilite |
| US4517661A (en) * | 1981-07-16 | 1985-05-14 | International Business Machines Corporation | Programmable chip tester having plural pin unit buffers which each store sufficient test data for independent operations by each pin unit |
| US4493045A (en) * | 1981-10-19 | 1985-01-08 | Fairchild Camera & Instrument Corp. | Test vector indexing method and apparatus |
| US4493079A (en) * | 1982-08-18 | 1985-01-08 | Fairchild Camera & Instrument Corp. | Method and system for selectively loading test data into test data storage means of automatic digital test equipment |
| US4503537A (en) * | 1982-11-08 | 1985-03-05 | International Business Machines Corporation | Parallel path self-testing system |
-
1983
- 1983-12-19 US US06/564,853 patent/US4639919A/en not_active Expired - Fee Related
-
1984
- 1984-08-20 JP JP59171665A patent/JPS60130839A/ja active Granted
- 1984-11-14 EP EP84113727A patent/EP0149048B1/en not_active Expired
- 1984-11-14 DE DE8484113727T patent/DE3472839D1/de not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| EP0149048B1 (en) | 1988-07-20 |
| EP0149048A1 (en) | 1985-07-24 |
| DE3472839D1 (en) | 1988-08-25 |
| JPS60130839A (ja) | 1985-07-12 |
| US4639919A (en) | 1987-01-27 |
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