JPH0521252B2 - - Google Patents

Info

Publication number
JPH0521252B2
JPH0521252B2 JP61078633A JP7863386A JPH0521252B2 JP H0521252 B2 JPH0521252 B2 JP H0521252B2 JP 61078633 A JP61078633 A JP 61078633A JP 7863386 A JP7863386 A JP 7863386A JP H0521252 B2 JPH0521252 B2 JP H0521252B2
Authority
JP
Japan
Prior art keywords
data processing
processing device
virtual
save area
control program
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP61078633A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6231438A (ja
Inventor
Hisao Takane
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Publication of JPS6231438A publication Critical patent/JPS6231438A/ja
Publication of JPH0521252B2 publication Critical patent/JPH0521252B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1458—Protection against unauthorised use of memory or access to memory by checking the subject access rights
    • G06F12/1483—Protection against unauthorised use of memory or access to memory by checking the subject access rights using an access-table, e.g. matrix or list

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Mathematical Physics (AREA)
  • Computer Security & Cryptography (AREA)
  • Hardware Redundancy (AREA)
JP7863386A 1985-04-16 1986-04-04 仮想計算機システム Granted JPS6231438A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8081585 1985-04-16
JP60-80815 1985-04-16

Publications (2)

Publication Number Publication Date
JPS6231438A JPS6231438A (ja) 1987-02-10
JPH0521252B2 true JPH0521252B2 (OSRAM) 1993-03-23

Family

ID=13728950

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7863386A Granted JPS6231438A (ja) 1985-04-16 1986-04-04 仮想計算機システム

Country Status (2)

Country Link
JP (1) JPS6231438A (OSRAM)
FR (1) FR2580415B1 (OSRAM)

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3858182A (en) * 1972-10-10 1974-12-31 Digital Equipment Corp Computer program protection means
GB1601956A (en) * 1978-03-02 1981-11-04 Marconi Co Ltd Multiprocessor data processing systems
JPS59167756A (ja) * 1983-01-31 1984-09-21 Nec Corp 仮想計算機のデイスパツチ制御方式

Also Published As

Publication number Publication date
JPS6231438A (ja) 1987-02-10
FR2580415A1 (fr) 1986-10-17
FR2580415B1 (fr) 1989-12-01

Similar Documents

Publication Publication Date Title
US7225119B2 (en) System and method for the logical substitution of processor control in an emulated computing environment
US5437033A (en) System for recovery from a virtual machine monitor failure with a continuous guest dispatched to a nonguest mode
EP0093267B1 (en) Method for switching the control of central processing units in a data processing system, and apparatus for initiating the switching of cpu control
JPS6313223B2 (OSRAM)
JP2005122334A (ja) メモリダンプ方法、メモリダンプ用プログラム及び仮想計算機システム
JP4316882B2 (ja) エミュレートされるコンピューティング環境におけるプロセッサ制御の論理的置換のためのシステムおよび方法
US5018064A (en) Virtual computer system
JPH0521252B2 (OSRAM)
JP3317361B2 (ja) メモリのバッテリバックアップ制御方式
JPH0731609B2 (ja) Ｖｍモード変更装置
JPS6049352B2 (ja) デ−タ処理装置
US5813039A (en) Guest execution control system, method and computer process for a virtual machine system
JPS6339933B2 (OSRAM)
JPH0552535B2 (OSRAM)
JPS61184643A (ja) 仮想計算機の起動制御方式
JPH04227548A (ja) 情報処理装置
JPH03265027A (ja) 計算機システムの初期化装置
JPS61204703A (ja) エンジン制御コンピユ−タシステムの開発装置
JPH0438011B2 (OSRAM)
JPH0157374B2 (OSRAM)
JPS6139135A (ja) 仮想計算機システムにおけるインタバル・タイマ割り込み制御装置
JPH0573518A (ja) メモリマツプドｃｐｕシステム
JPH0336633A (ja) 仮想計算機の割り込み直接実行方式
JPH05165624A (ja) 常駐モジュールの修正方式
JPS60193046A (ja) 命令例外検出方式

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees