JPH05211272A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPH05211272A JPH05211272A JP4011491A JP1149192A JPH05211272A JP H05211272 A JPH05211272 A JP H05211272A JP 4011491 A JP4011491 A JP 4011491A JP 1149192 A JP1149192 A JP 1149192A JP H05211272 A JPH05211272 A JP H05211272A
- Authority
- JP
- Japan
- Prior art keywords
- diode
- island
- lead
- lead frame
- overvoltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体装置のリードフレ
ームに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device lead frame.
【０００２】[0002]
【従来の技術】従来のリードフレームは、半導体チップ
を載置するアイランドとこのアイランドから離して、ア
イランドの周辺に配置された複数のリードから成り、過
電圧印加による半導体ペレットの破壊防止を行なう機能
はついていなかった。2. Description of the Related Art A conventional lead frame is composed of an island on which a semiconductor chip is mounted and a plurality of leads arranged around the island away from the island. The lead frame has a function of preventing destruction of a semiconductor pellet by applying an overvoltage. It wasn't on.
【０００３】[0003]
【発明が解決しようとする課題】外部より印加される過
電圧に対して半導体ペレット内部の素子を保護する。The element inside the semiconductor pellet is protected against an overvoltage applied from the outside.
【０００４】[0004]
【課題を解決するための手段】本発明のリードフレーム
は、一態レベル以上の電圧はクランヴするダーイオード
を備えている。The lead frame of the present invention is provided with a diode that clamps a voltage of one level or more.
【０００５】[0005]
【実施例】次に本発明について図面を参照して説明す
る。The present invention will be described below with reference to the drawings.
【０００６】図１（ａ）は本発明の一実施例の平面図で
（ｂ）は（ａ）のＡ部の拡大図、（ｃ）は（ｂ）の側面
図である。図１のリードフレームは、アイランド２がＧ
ＮＤピン１Ｇに接続している例で、アイランド２の周辺
に複数のリード１を備えている。この点は従来と同じで
ある。この実施例は、図１に示すように、電源に接続す
るリード１ａとアイランド２をツェナーダイオード３に
てつなげる。FIG. 1A is a plan view of an embodiment of the present invention, FIG. 1B is an enlarged view of part A of FIG. 1A, and FIG. 1C is a side view of FIG. In the lead frame of FIG. 1, the island 2 is G
In the example in which it is connected to the ND pin 1G, a plurality of leads 1 are provided around the island 2. This point is the same as the conventional one. In this embodiment, as shown in FIG. 1, a lead 1a connected to a power source and an island 2 are connected by a Zener diode 3.
【０００７】図２（ａ），（ｂ），（ｃ），（ｄ），
（ｅ）は、第２の実施例を示す図で、（ａ）は平面図、
（ｂ）は（ａ）のＡ部分の拡大図、（ｃ）は（ｂ）の側
面図、（ｄ）は（ａ）のＢ部分の拡大図、（ｅ）は
（ｄ）の側面図である。この実施例は、電源に接続する
リード１ａの先端部１ｂでアイランド２を囲み、図２に
示すように、ＧＮＤピン１Ｇと先端部１ｂをツェナーダ
イオード３で接続し、半導体ペレットの端子に接続する
リード１もツェナーダイオード３で先端部１ｂと接続
し、さらに、アイラド２に電圧クランプ用ダイオード４
で接続している。2 (a), (b), (c), (d),
(E) is a figure which shows a 2nd Example, (a) is a top view,
(B) is an enlarged view of A part of (a), (c) is a side view of (b), (d) is an enlarged view of B part of (a), (e) is a side view of (d). is there. In this embodiment, a tip 1b of a lead 1a connected to a power supply surrounds an island 2 and, as shown in FIG. 2, a GND pin 1G and a tip 1b are connected by a zener diode 3 and connected to a terminal of a semiconductor pellet. The lead 1 is also connected to the tip portion 1b by the Zener diode 3, and further the voltage clamping diode 4 is connected to the eyerad 2.
Are connected with.
【０００８】[0008]
【発明の効果】以上説明したように本発明は、電圧クラ
ンプ用ダイオードをリードフレーム上に搭載したので、
一定電圧以上は、半導体ペレット内部に印加されず、半
導体ペレット内部素子の破壊を防ぐという効果を有す
る。As described above, according to the present invention, since the voltage clamping diode is mounted on the lead frame,
A voltage above a certain level is not applied to the inside of the semiconductor pellet, and has the effect of preventing damage to the elements inside the semiconductor pellet.
【図１】本発明の一実施例の概略図である。FIG. 1 is a schematic view of an embodiment of the present invention.
【図２】本発明の第２の実施例の概略図である。FIG. 2 is a schematic diagram of a second embodiment of the present invention.
１ リード ２ アイランド ３ ツェナーダイオード ４ ダイオード 1 Lead 2 Island 3 Zener diode 4 Diode
Claims (1)
いることを特徴とするリードフレーム。1. A lead frame comprising a diode for preventing overvoltage application.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4011491A JPH05211272A (en) | 1992-01-27 | 1992-01-27 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4011491A JPH05211272A (en) | 1992-01-27 | 1992-01-27 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05211272A true JPH05211272A (en) | 1993-08-20 |
Family
ID=11779516
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4011491A Withdrawn JPH05211272A (en) | 1992-01-27 | 1992-01-27 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05211272A (en) |
-
1992
- 1992-01-27 JP JP4011491A patent/JPH05211272A/en not_active Withdrawn
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A300 | Withdrawal of application because of no request for examination |
Free format text: JAPANESE INTERMEDIATE CODE: A300 Effective date: 19990408 |