JPH05206646A - Printed wiring board with low resistance included in internal layer - Google Patents
Printed wiring board with low resistance included in internal layerInfo
- Publication number
- JPH05206646A JPH05206646A JP4014210A JP1421092A JPH05206646A JP H05206646 A JPH05206646 A JP H05206646A JP 4014210 A JP4014210 A JP 4014210A JP 1421092 A JP1421092 A JP 1421092A JP H05206646 A JPH05206646 A JP H05206646A
- Authority
- JP
- Japan
- Prior art keywords
- wiring board
- printed wiring
- resistor
- internal layer
- low resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、プリント配線板の内層
部分に低抵抗である抵抗体の層を形成したプリント配線
板に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printed wiring board in which a resistor layer having a low resistance is formed on an inner layer portion of the printed wiring board.
【０００２】[0002]
【従来の技術】従来、プリント配線板と抵抗部品は、個
別の部品であった。そのため、電子製品の小型化を図る
ためには、部品の小型化と部品実装を高精度で行なう技
術が必要不可欠であった。さらに、プリント配線板に部
品を実装する上で、形状や配置で制約を受けていた。2. Description of the Related Art Conventionally, a printed wiring board and a resistance component are separate components. Therefore, in order to miniaturize electronic products, a technique for miniaturizing components and mounting components with high accuracy has been indispensable. Furthermore, there are restrictions on the shape and arrangement of the parts when they are mounted on the printed wiring board.
【０００３】また、これまでの内層抵抗では、抵抗値の
制御において、抵抗値を低くするには問題があった。例
えば、厚さを一定で長さが一定の抵抗部を設ける場合、
ある抵抗値の半分の値を実現する場合には、幅が２倍必
要となっていた。例えば、もとの抵抗で幅が０．８mmで
あったものを、抵抗値を半分にするためには幅が１．６
mm必要であった。Further, in the conventional inner layer resistance, there is a problem in lowering the resistance value in controlling the resistance value. For example, when providing a resistance part with a constant thickness and a constant length,
In order to realize a half of a certain resistance value, the width needs to be doubled. For example, if the original resistance was 0.8 mm and the width was 0.8 mm, the width would be 1.6
mm was needed.
【０００４】[0004]
【発明が解決しようとする課題】上述したように、従来
のプリント配線板で、小型化を目指していく際プリント
配線板では、回路パターンの細線化、部品の小型化が技
術的な課題となっていた。さらに、それぞれの部品どう
しを高精度で実装する技術が必要であった。また、実装
の際に半田を使用しており、実装後の信頼性にも難点が
あった。また、抵抗値制御の点で、課題があった。As described above, in the conventional printed wiring board, when aiming for downsizing, in the printed wiring board, it is a technical subject to make the circuit pattern finer and to reduce the size of parts. Was there. Furthermore, a technology for mounting each component with high accuracy was required. Further, since solder is used for mounting, there is a problem in reliability after mounting. Further, there is a problem in controlling the resistance value.
【０００５】[0005]
【課題を解決するための手段】本発明は、従来技術が持
つ以上のような問題点を解決するために、プリント配線
板の内層部分の高抵抗体の上に導電率の高い金属薄膜を
形成した構造を内層回路層と絶縁層との間にはさみ込む
ようにしたものである。In order to solve the above-mentioned problems of the prior art, the present invention forms a metal thin film having a high conductivity on a high resistance body in an inner layer portion of a printed wiring board. The above structure is sandwiched between the inner circuit layer and the insulating layer.
【０００６】[0006]
【実施例】次に本発明について図面を参照して説明す
る。The present invention will be described below with reference to the drawings.
【０００７】図１は、本発明を実施した４層基板の例で
ある。図２は、内層パターンと抵抗部の接続を示した図
であり、実施例の平面図である。図３は、実施例に関す
る図２の直線Ｘ−Ｙにおける縦断面図である。図１で
は、抵抗の層を内層回路層２と絶縁層３との間にはさみ
込むような層構成となっている。実際の構造は、図２，
図３に示したように、抵抗を設けたい部分のパターンの
間を覆うように構成する。つまり図３において高抵抗部
５の上に、内層パターン６が走るような構造にする。さ
らにその上に導電率の高い金属薄膜７を形成した構造に
する。例えば、抵抗体の厚さ及び回路パターンの厚さを
それぞれ３５μm とし、抵抗体をニッケル、金属薄膜を
銅であるとすると、抵抗値を半分にするためには薄膜の
厚さを５μm 程度にすればよい。FIG. 1 is an example of a four-layer substrate embodying the present invention. FIG. 2 is a diagram showing the connection between the inner layer pattern and the resistor portion, and is a plan view of the embodiment. FIG. 3 is a vertical cross-sectional view taken along the line XY of FIG. 2 regarding the embodiment. In FIG. 1, the resistor layer is sandwiched between the inner circuit layer 2 and the insulating layer 3. The actual structure is shown in Figure 2.
As shown in FIG. 3, it is configured to cover between the patterns of the portion where the resistance is desired to be provided. That is, in FIG. 3, the structure is such that the inner layer pattern 6 runs on the high resistance portion 5. Further, a metal thin film 7 having a high conductivity is formed on the structure. For example, if the thickness of the resistor and the thickness of the circuit pattern are 35 μm, the resistor is nickel, and the metal thin film is copper, the thickness of the thin film should be about 5 μm in order to halve the resistance value. Good.
【０００８】また、次のようにすることもできる。抵抗
体の厚さ及び回路パターンの厚さがそれぞれ３５μm と
する。抵抗体をニッケルとし、金属薄膜を銀であるとす
ると抵抗値を半分にする場合、薄膜の厚さは約５μm 程
度である。また、同様の条件で、金属薄膜を金で構成す
ると、薄膜の厚さは約７μm 程度である。Further, the following is also possible. The thickness of the resistor and the thickness of the circuit pattern are each 35 μm. If the resistance is nickel and the metal thin film is silver, the thickness of the thin film is about 5 μm when the resistance value is halved. If the metal thin film is made of gold under the same conditions, the thickness of the thin film is about 7 μm.
【０００９】[0009]
【発明の効果】以上説明したように、本発明は、プリン
ト配線板の内層部分に、抵抗物質の層を形成することに
よって、基板の内部に抵抗を実装したことと同様な働き
を示すものである。これにより、実装部品の点数が削減
されるので、設計においても自由度が増す。As described above, the present invention has the same function as mounting a resistor inside a substrate by forming a layer of a resistive material on the inner layer portion of a printed wiring board. is there. As a result, the number of mounted components is reduced, and the degree of freedom in design is increased.
【００１０】さらに、低抵抗の抵抗体を作製する上で薄
膜を形成することにより抵抗値を制御することができ
る。これは、抵抗値を低くするための課題が薄膜で実現
できるため、薄型化において有効な手段であると考えら
れる。以上のことから、電子製品の小型化・薄型化の要
求に対し有用である。Furthermore, the resistance value can be controlled by forming a thin film in the production of a low resistance resistor. This is considered to be an effective means for reducing the thickness, because the problem of reducing the resistance value can be realized with a thin film. From the above, it is useful to meet the demand for smaller and thinner electronic products.
【図１】本発明における実施例の４層基板の層構成であ
る。FIG. 1 is a layer structure of a four-layer substrate according to an embodiment of the present invention.
【図２】内層パターンと抵抗部の接続を示した平面図で
ある。FIG. 2 is a plan view showing a connection between an inner layer pattern and a resistance portion.
【図３】本実施例に関する図２の直線Ｘ−Ｙにおける縦
断面図である。FIG. 3 is a vertical cross-sectional view taken along a line XY in FIG. 2 relating to this embodiment.
１ 外層回路層 ２ 内層回路層 ３ 基材（絶縁層） ４ 内層抵抗層 ５ 高抵抗部 ６ 内層パターン ７ 低抵抗金属薄膜 1 outer layer circuit layer 2 inner layer circuit layer 3 base material (insulating layer) 4 inner layer resistance layer 5 high resistance part 6 inner layer pattern 7 low resistance metal thin film
Claims (1)
金属薄膜を形成した構造を内層回路層と絶縁層との間に
はさみ込んだプリント配線板。1. A printed wiring board having a structure in which a metal thin film having high conductivity is formed on a high-resistor in an inner layer portion and sandwiched between an inner circuit layer and an insulating layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4014210A JPH05206646A (en) | 1992-01-29 | 1992-01-29 | Printed wiring board with low resistance included in internal layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4014210A JPH05206646A (en) | 1992-01-29 | 1992-01-29 | Printed wiring board with low resistance included in internal layer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH05206646A true JPH05206646A (en) | 1993-08-13 |
Family
ID=11854743
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4014210A Pending JPH05206646A (en) | 1992-01-29 | 1992-01-29 | Printed wiring board with low resistance included in internal layer |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH05206646A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS617697A (en) * | 1984-06-22 | 1986-01-14 | 富士通株式会社 | Multilayer circuit board and method of producing same |
| JPS6262501A (en) * | 1985-09-12 | 1987-03-19 | 株式会社東芝 | Thick film substrate unit |
| JPS6489393A (en) * | 1987-09-29 | 1989-04-03 | Kyocera Corp | Multilayer interconnection board |
-
1992
- 1992-01-29 JP JP4014210A patent/JPH05206646A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS617697A (en) * | 1984-06-22 | 1986-01-14 | 富士通株式会社 | Multilayer circuit board and method of producing same |
| JPS6262501A (en) * | 1985-09-12 | 1987-03-19 | 株式会社東芝 | Thick film substrate unit |
| JPS6489393A (en) * | 1987-09-29 | 1989-04-03 | Kyocera Corp | Multilayer interconnection board |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 19980603 |