JP2581253B2 - Hybrid integrated circuit board - Google Patents
Hybrid integrated circuit boardInfo
- Publication number
- JP2581253B2 JP2581253B2 JP2079241A JP7924190A JP2581253B2 JP 2581253 B2 JP2581253 B2 JP 2581253B2 JP 2079241 A JP2079241 A JP 2079241A JP 7924190 A JP7924190 A JP 7924190A JP 2581253 B2 JP2581253 B2 JP 2581253B2
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- circuit board
- integrated circuit
- component mounting
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Parts Printed On Printed Circuit Boards (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Manufacturing Of Printed Wiring (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は混成集積回路基板に関し、特に面実装部品を
半田や他の合金で接合する場合に回路基板上の導体回路
が半田に食われることを防ぐ導体構造に関する。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a hybrid integrated circuit board, and particularly to a case where a conductor circuit on a circuit board is eroded by solder when a surface mount component is joined with solder or another alloy. A conductor structure that prevents
〔従来の技術〕 従来、この主の混成集積回路基板は、第５図，第６図
に示す様に基板１上の面実装部品搭載ランド部はAgPd等
の導体パッド上に設けられ、その表面が配線導体４と同
一金属（Au）の薄膜や厚膜の導体２で連続的におおわれ
ている。又、部品搭載ランド部５からロウ材が流れ出さ
ないように流れ止め７を配線導体４の部品搭載ランド部
５の外側の導体２上に設けた構造になっていた。[Prior Art] Conventionally, as shown in FIGS. 5 and 6, the main hybrid integrated circuit board has a surface mounting component mounting land portion on a substrate 1 provided on a conductive pad such as AgPd. Are continuously covered with a thin-film or thick-film conductor 2 of the same metal (Au) as the wiring conductor 4. In addition, the flow stopper 7 is provided on the conductor 2 outside the component mounting land 5 of the wiring conductor 4 so that the brazing material does not flow out of the component mounting land 5.
チップ部品等の面実装部品６はこの部品搭載ランド部
５に半田付等のロウ材８で取り付けられていた。A surface mounting component 6 such as a chip component is attached to the component mounting land portion 5 with a brazing material 8 such as soldering.
上述した従来の混成集積回路基板は、部品搭載ランド
部５の表面が配線導体部４と同一金属の導体２になって
いるので、部品搭載ランド部５に面実装部品６をロウ材
８を用いて高温に加熱してロウ付けするとロウ材８が配
線導体部４に流れ出し、配線導体部４と部品搭載ランド
部５との境目の配線導体部４の導体２が断線するという
欠点がある。In the above-described conventional hybrid integrated circuit board, the surface of the component mounting land portion 5 is the conductor 2 of the same metal as the wiring conductor portion 4. Therefore, the surface mounting component 6 is used for the component mounting land portion 5 using the brazing material 8. If the brazing material 8 is heated to a high temperature and brazed, the brazing material 8 flows into the wiring conductor portion 4, and the conductor 2 of the wiring conductor portion 4 at the boundary between the wiring conductor portion 4 and the component mounting land portion 5 has a defect.
本発明によれば、回路基板上の部品搭載ランド部に第
１の金属の導体パッドを有し、この導体パッド上をおお
って配線導体が回路基板上に延在せしめられており、導
体パッドは部品搭載ランド部からそれに続く配線導体下
に延長形成されている混成集積回路基板を有する。According to the present invention, a first metal conductor pad is provided on a component mounting land on a circuit board, and a wiring conductor is extended over the circuit board over the conductor pad. A hybrid integrated circuit board is formed extending from the component mounting land below the wiring conductor that follows.
次に、図面を参照して本発明をより詳細に説明する。 Next, the present invention will be described in more detail with reference to the drawings.
第１図は、本発明の一実施例を示す斜視図であり、第
２図はその断面図である。混成集積回路基板１は、面実
装部品搭載ランド部５からそれに続く配線導体部４の一
部の下にAgPd等の導体パッド３を有しており、この部分
において導体パッド３とAu等の導体２との多層構造にな
っている。さらに導体パッド３上の配線導体部４内で部
品搭載ランド部５近傍の導体パッド３上の導体２にロウ
材流れ止め７を付けている。ロウ材８は上層部の導体２
と合金を作り、下層部の導体パッド３を形成している導
体材料AgPdとさらに合金を作るが、AgPdはロウ材との合
金を作る率が小さいため、ロウ材８は配設導体部４に流
れ出す。そして、ロウ材流れ止め７により、ロウ材８の
流れは阻止される。しかし、この部分までAgPd等の導体
パッド３とAu等の導体２との二層構造になっているの
で、ロウ材８は導体部４を切断することはない。FIG. 1 is a perspective view showing an embodiment of the present invention, and FIG. 2 is a sectional view thereof. The hybrid integrated circuit board 1 has a conductor pad 3 such as AgPd under a part of the wiring conductor portion 4 following the surface mounting component mounting land portion 5, and in this portion, the conductor pad 3 and a conductor such as Au are provided. 2 and a multilayer structure. Further, a brazing material flow stop 7 is attached to the conductor 2 on the conductor pad 3 near the component mounting land 5 in the wiring conductor 4 on the conductor pad 3. The brazing material 8 is a conductor 2 in the upper layer.
And an alloy with the conductive material AgPd forming the lower conductive pad 3. However, since AgPd has a low rate of forming an alloy with the brazing material, the brazing material 8 Flow out. Then, the flow of the brazing material 8 is stopped by the brazing material flow stopper 7. However, since this portion has a two-layer structure of the conductor pad 3 such as AgPd and the conductor 2 such as Au, the brazing material 8 does not cut the conductor portion 4.
第３図は本発明の他の実施例を示す斜視図であり、第
４図はその断面図である。FIG. 3 is a perspective view showing another embodiment of the present invention, and FIG. 4 is a sectional view thereof.
本実施例の混成集積回路基板は面実装部品搭載ランド
部５及びそれに続く配線導体部４の一部がAgPd等の導体
パッド３とAu等の導体２との２重構造になっている。部
品搭載ランド部５の近傍の配線導体部４上にはろう材流
れ止め７を有しておらず、配線導体部４下の導体パッド
３の部品搭載ランド部５から延在する距離l2は面実装部
品搭載ランド部の幅l1以上として、ロー材８が流れ出す
範囲に導体パッド３を存在せしめている。In the hybrid integrated circuit board of this embodiment, the surface mounting component mounting land portion 5 and a part of the wiring conductor portion 4 following the surface mounting component mounting portion 5 have a double structure of a conductor pad 3 such as AgPd and a conductor 2 such as Au. There is no brazing material stop 7 on the wiring conductor 4 near the component mounting land 5, and the distance l 2 extending from the component mounting land 5 of the conductor pad 3 below the wiring conductor 4 is the width l 1 or more surface mount component mounting land portion, are allowed to be present contact pads 3 in a range brazing material 8 flows out.
以上説明した様に、本発明は面実装部品搭載ランド部
５に素子を取り付けるロー材８の流れる部分を構成する
導体材料に異った２種類以上の導体材料を積層すること
によりろう材による配線材料食われを防止し、回路の切
断を防止することができる効果がある。As described above, according to the present invention, two or more kinds of conductive materials different from the conductive material constituting the flowing portion of the brazing material 8 for attaching the element to the surface mounting component mounting land portion 5 are laminated to form the wiring by the brazing material. This has the effect of preventing material erosion and cutting of the circuit.
第１図は本発明の一実施例の斜視図、第２図は第１図の
断面図である。 第３図は本発明の他の実施例の斜視図、第４図は第３図
の断面図である。 第５図は従来例の斜視図、第６図は従来例の断面図であ
る。 １……基板、２……導体、３……導体パッド、４……配
線導体部、５……面実装部品搭載部、６……面実装部
品、７……ろう材流れ止め、８……ロウ材、l1……面実
装部品搭載ランド幅、l2……任意の導体部距離。FIG. 1 is a perspective view of one embodiment of the present invention, and FIG. 2 is a sectional view of FIG. FIG. 3 is a perspective view of another embodiment of the present invention, and FIG. 4 is a sectional view of FIG. FIG. 5 is a perspective view of a conventional example, and FIG. 6 is a sectional view of the conventional example. DESCRIPTION OF SYMBOLS 1 ... board | substrate 2, ... conductor, 3 ... conductor pad, 4 ... wiring conductor part, 5 ... surface mounting component mounting part, 6 ... surface mounting component, 7 ... brazing material stop, 8 ... Brazing material, l 1 … land width for mounting surface-mounted components, l 2 …… distance of any conductor.
Claims (2)
る導体パッドを有し、該導体パッドを被覆して配線部上
に延在する第２の金属の導体層を有し、前記導体パッド
は前記部品搭載部から前記配線部に延在して形成されて
いることを特徴とする混成集積回路基板。A conductive layer made of a first metal on a component mounting portion on a circuit board, a conductive layer of a second metal covering the conductive pad and extending over a wiring portion; The hybrid integrated circuit board, wherein the conductive pad is formed to extend from the component mounting portion to the wiring portion.
金属はAuであることを特徴とする請求項（１）記載の混
成集積回路基板。2. The hybrid integrated circuit substrate according to claim 1, wherein said first metal is AgPd, and said second metal is Au.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2079241A JP2581253B2 (en) | 1990-03-28 | 1990-03-28 | Hybrid integrated circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2079241A JP2581253B2 (en) | 1990-03-28 | 1990-03-28 | Hybrid integrated circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH03278588A JPH03278588A (en) | 1991-12-10 |
| JP2581253B2 true JP2581253B2 (en) | 1997-02-12 |
Family
ID=13684363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2079241A Expired - Fee Related JP2581253B2 (en) | 1990-03-28 | 1990-03-28 | Hybrid integrated circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2581253B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3922551B2 (en) * | 2002-07-16 | 2007-05-30 | 株式会社住友金属エレクトロデバイス | High-frequency transmission line substrate |
-
1990
- 1990-03-28 JP JP2079241A patent/JP2581253B2/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JPH03278588A (en) | 1991-12-10 |
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