JPH05198854A - Insulated channel type dielectric base transistor - Google Patents

Abstract

PURPOSE:To obtain a dielectric base transistor wherein a base current is reduced, a base voltage is largely biased, and the ON-resistance can be decreased by increasing the current of a transistor. CONSTITUTION:On one side of a dielectric base substrate 1 turning to a region where carriers run, which region is composed of oxide containing any of Sr, Ti, K, Ta, Sn, Zr and Nb or dielectric substance being KTa1-xNbxO3 of high dielectric constant, an emitter electrode 3 like Ta is formed via a first barrier layer 2 like Si and SiO2 having dielectric constant lower than that of the dielectric base substrate 1. A collector electrode 5 like Ta is formed via the similar second barrier layer 4 having dielectric constant lower than that of the dielectric base substrate 1. On the other side of the dielectric base substrate 1, a base electrode 7 is formed, via a third barrier layer 6 like SiO2 and TiO2 which layer has barrier height and width capable of forbiddening the transfer of carriers.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an insulating channel type dielectric base transistor used for amplifying or switching an electric signal.

In the field of information processing electronic devices represented by computers, transistors for amplifying and switching electric signals play an important role.

Therefore, improving the characteristics of the transistors used in these information processing electronic devices is of primary importance in improving the characteristics of the electronic devices. In particular, the improvement of the switching speed of the transistor directly leads to the improvement of the processing speed of the electronic device using the transistor.

Conventionally, various proposals have been made from various directions as means for realizing a high speed transistor, but the basis thereof is miniaturization or downsizing of the element size of the transistor. When the element size is reduced,
Along with that, the electrostatic capacitance and the inductance formed there are reduced, which is effective for increasing the speed.

As described above, in addition to miniaturizing the size of a transistor using a conventionally used semiconductor material as much as possible, the transistor is made of metal, oxide,
If a metal superconductor or an oxide superconductor can be used, a transistor with unique characteristics can be realized, the application range of the transistor can be expanded, and it is considered industrially useful.

[0006]

2. Description of the Related Art As a transistor which meets such requirements, a so-called dielectric base transistor has been previously proposed. The dielectric base transistor is a general term for transistors using a dielectric material in the base region, and has a structure in which an emitter electrode and a collector electrode are in contact with a high dielectric constant dielectric base through a thin tunnel barrier.

8A and 8B are explanatory views of a conventional dielectric base transistor. 8A is a schematic configuration diagram thereof, and FIG. 8B is a current-voltage characteristic diagram of this transistor. In this figure, 91 is a dielectric base substrate, 92 and 94 are barrier layers, 93 is an emitter electrode, and 9 is an emitter electrode.
Reference numeral 5 is a collector electrode, 96 is an insulating layer, 97 is an emitter wiring, 98 is a collector wiring, and 99 is a base electrode.

In this conventional dielectric base transistor, an emitter electrode 93 is formed on a dielectric base substrate 91 made of SrTiO ₃ having a high dielectric constant via a barrier layer 92 made of Si having a thickness of 60Å. Thickness 60Å
Collector electrode 95 through the barrier layer 94 made of Si
Is formed, the emitter wiring 97 and the collector wiring 98 are connected through the contact hole of the insulating layer 96, and the base electrode 99 is formed on the other side of the dielectric base substrate 91.

In this device, when the potential of the dielectric base substrate 91 is changed by the voltage applied to the base electrode 99, the dielectric base substrate 91 is moved from the emitter electrode 93.
Since the amount of carriers (electrons) injected by tunneling through the barrier layer 92 changes to the current, the current flowing between the emitter electrode 93 and the collector electrode 95 changes, and transistor operation such as amplification and switching operation occurs. It will be.

The characteristic of such a dielectric base transistor is that the potential of the dielectric base substrate is controlled by electrostatic induction from the base electrode, and therefore there is no punch-through or short channel effect and the channel length is extremely long. It is expected that it can be shortened and high-speed operation will be possible. The dielectric base transistor described here is a planar type in which the emitter and collector electrodes are formed in contact with the same surface of the dielectric base substrate.

FIG. 8B shows an example of current-voltage characteristics of the conventional dielectric base transistor, and a voltage gain of about 2 is obtained.

When the voltage applied to the base electrode is low to some extent, electrons do not flow into the base electrode, so that the base current does not flow, so that the current gain becomes extremely high. In other words, the conventional dielectric base transistor shown here has F as long as the base voltage is small.
Like ET, it has a characteristic of having an extremely large current gain.

[0013]

However, if the base electrode is biased to a positive voltage above a certain threshold value, the base current will flow. Therefore, a large positive voltage is applied to the base electrode to cause a gap between the emitter and collector. There is an upper limit to the current that can be obtained even if an attempt is made to increase the current.

FIG. 9 is an energy band diagram of a conventional dielectric base transistor. Reference numerals in this figure are shown in
It is the same as that used in (A). Although this figure is for the case where the carrier is an electron, the same explanation can be applied when the carrier is a hole.

This figure shows the energy band structure of the emitter electrode-barrier layer-dielectric base substrate-base electrode. The dielectric band is shown in FIGS. 8A and 8B and this energy band diagram. The operation of the body base transistor and the reason why current flows through the base electrode will be described.

The carriers (electrons) e are emitted from the emitter electrode 93.
Is tunneled through the barrier layer 92 to be injected into the dielectric base substrate 91. However, when a positive voltage is applied to the base electrode 99, the potential of the channel, which is a current passage, changes as shown in the figure (arrow). , The amount of carriers (electrons) e injected from the emitter electrode 93 into the dielectric base substrate 91 is controlled.

The dielectric constant of the dielectric base substrate 91 is selected to be sufficiently larger than the dielectric constants of the barrier layers 92 and 94, and most of the voltage applied to the base electrode 99 is the potential change of the channel, so that the voltage gain is high. can do.

The carriers (electrons) e injected into the dielectric base substrate 91 as described above are collector side barrier layers 94.
To tunnel to the collector electrode 95. In this way, the current flowing between the emitter electrode 93 and the collector electrode 95 is controlled by the voltage applied to the dielectric base substrate 91.

On the other hand, regarding the base current, in this dielectric base transistor, at the contact portion between the dielectric base substrate 91 and the base electrode 99, the bottom of the conduction band of the dielectric base substrate 91 is the base electrode 99. It becomes higher than the Fermi level by the height of the Schottky barrier between the dielectric base substrate 91 and the base electrode 99, and a kind of Schottky junction is formed. When this junction is reverse-biased, almost no base current flows, but when forward-biased, the potential on the base electrode side drops as indicated by the broken line, and carriers (electrons) e that should flow in the channel are base. An electric field that attracts toward the electrode 99 is generated, so that a base current flows. An object of the present invention is to provide a dielectric base transistor with reduced base current.

[0020]

In an insulated channel type dielectric base transistor according to the present invention, a base region in which carriers made of a dielectric material having a high dielectric constant travel, and the base region on one side of the base region. Via an emitter electrode formed through a first barrier layer having a lower dielectric constant than the dielectric material forming the base region and a second barrier layer having a lower dielectric constant than the dielectric material forming the base region. What is claimed is: 1. A dielectric base transistor comprising a formed collector electrode and a base electrode formed on the other side of the base region, wherein the movement of carriers is substantially prohibited between the base region and the base electrode. A structure in which a third barrier layer having a barrier height and a thickness is inserted is adopted.

In this case, the dielectric constant of the third barrier layer is the first.
The structure selected is higher than the dielectric constants of the barrier layer and the second barrier layer.

In this case, the dielectric material forming the base region, the third barrier layer and the base electrode are thin films formed on the insulating substrate in contact with each other.

Further, in this case, the structure in which the base electrode is made conductive by introducing some impurities into the dielectric material forming the base region or shifting the constituent elements from the stoichiometric value is adopted. did.

Further, in this case, at least one of the emitter electrode, the collector electrode, the base electrode and the like is made of a metal or oxide material having superconductivity.

In this case, the dielectric material forming the base region is an oxide containing any of Sr, Ti, K, Ta, Sn, Zr and Nb.

In this case, the dielectric material forming the base region is KTa _1-x Nb _x O ₃ , and the temperature at which the dielectric constant is maximized is adjusted by the composition ratio of Nb.

[0027]

The principle of the present invention will be described. 1 (A), (B)
[FIG. 3] is a diagram illustrating the principle of the present invention. FIG. 1A is a schematic configuration diagram of a dielectric base transistor of the present invention, and FIG. 1B is an energy band structure diagram between its emitter and base. In this figure, 1 is a dielectric base substrate, 2, 4,
6 is a barrier layer, 3 is an emitter electrode, 5 is a collector electrode,
Reference numeral 7 is a base electrode.

In this dielectric base transistor, a barrier layer 2 made of a thin insulator on which carriers can tunnel is formed on the upper surface of a dielectric base substrate 1 having an insulating band structure which serves as a carrier traveling channel of the transistor.
A conductive emitter electrode 3 made of a metal, a semiconductor, a metal or an oxide superconductor, etc., and a collector electrode 5 are formed via the substrate 4, and carriers (electrons) are formed on the lower surface of the dielectric base substrate 1. A conductive base electrode 7 is formed through a barrier layer 6 for blocking the flow of the.

In the dielectric base transistor of the present invention, as described above, the barrier layer 6 that blocks the flow of carriers (electrons) between the base electrode 7 and the dielectric base substrate 1.
Is placed, the current flowing from the base electrode 7 to the dielectric base substrate 1 can be made zero under all bias conditions.

Therefore, since the base electrode can be biased in a sufficiently positive direction so that the carrier density of the channel becomes high, there is an advantage that the current of the transistor can be increased and the on-resistance can be reduced. If the barrier layer 6 is sufficiently thin, the voltage drop there is small, so that the controllability similar to that of the conventional dielectric base transistor without the barrier layer 6 can be obtained.

Looking at this in the energy band structure diagram between the emitter and the base of FIG. 1B, when a large positive voltage is applied to the base electrode 7, the potential on the base electrode side drops as shown by the broken line. Also has the potential barrier of the barrier layer 6,
Outflow of carriers (electrons) to the base electrode 7 is completely blocked.

[0032]

EXAMPLES Examples of the present invention will be described below.

(First Embodiment) FIG. 2 is a diagram for explaining the structure of the dielectric base transistor of the first embodiment. In this figure, 11 is a SrTiO ₃ substrate, 12 and 14 are SiO ₂
A barrier layer, 13 is a Ta emitter electrode, 15 is a Ta collector electrode, 16 is a SiO ₂ insulating layer, 17 is a Ta emitter wiring, 18 is a Ta collector wiring, 19 is a SiO ₂ barrier layer, and 20 is a Ta base electrode.

In the dielectric base transistor of this embodiment, the SrTiO ₃ substrate 11 has an upper surface with a thickness of 2 nm.
With a thickness of 300 nm through the SiO ₂ barrier layer 12 of
The emitter electrode 13 made of a is formed, and the thickness is 2
nm through the SiO ₂ barrier layer 14 with a thickness of 300 nm
Collector electrode 15 made of Ta is formed, an SiO ₂ insulating layer 16 is formed on the entire surface thereof, and Ta emitter wiring 17 and Ta collector wiring 18 are formed through the contact holes formed in the SiO ₂ insulating layer 16, and SrTi
A SiO ₂ barrier layer 1 having a thickness of 4 nm is formed on the back surface of the O ₃ substrate 11.
A base electrode 20 made of Ta is formed via 9.

The base substrate in this embodiment is
In addition to the above SrTiO ₃ , Sr, Ti, K, Ta, S
A perovskite-based dielectric material made of an oxide containing any of n, Zr, and Nb can be used.

(Second Embodiment) FIG. 3 is an explanatory view of the structure of a dielectric base transistor of the second embodiment. In this figure, 21 is an SrTiO ₃ substrate, 22 and 24 are SiO ₂
A barrier layer, 23 is a Ta emitter electrode, 25 is a Ta collector electrode, 26 is a SiO ₂ insulating layer, 27 is a Ta emitter wiring, 28 is a Ta collector wiring, 29 is a TiO ₂ barrier layer, and 30 is a Ta base electrode.

The difference between this embodiment and the first embodiment is that the SrTiO ₃ substrate 21 serving as the base layer and the Ta base electrode 3 are formed.
The barrier layer between 0 and 0 is the TiO ₂ barrier layer 29. This TiO ₂ has a relative dielectric constant of about 400 and Si
For 10 times the O ₂ is a high dielectric constant material, TiO ₂
There is an advantage that the electric drop in the barrier layer 29 becomes small and the voltage gain becomes high.

(Third Embodiment) FIG. 4 is a diagram for explaining the structure of the dielectric base transistor of the third embodiment. In this figure, 31 is a LaAlO ₃ insulating substrate, 32 is a Ta base electrode, 33 is a SiO ₂ barrier layer, 34 is a SrTiO ₃ base layer, 35 and 37 are SiO ₂ barrier layers, 36 is a Ta emitter electrode, and 38 is a Ta collector. Electrode, 39 is SiO ₂
An insulating layer, 40 is a Ta emitter wiring, 41 is a Ta collector wiring, and 42 is a Ta base wiring.

This embodiment is different from the first embodiment in that the SrTiO ₃ base substrate 11 of the first embodiment is SrT.
It becomes the iO ₃ base layer 34 and becomes the LaAlO ₃ insulating substrate 31.
A Ta base electrode 32, a SiO ₂ barrier layer 33,
The point is that the SrTiO ₃ base layer 34 is sequentially deposited. The Ta base electrode 32 has a thickness of 100 nm and Sr.
The thickness of the TiO ₃ base layer 34 is 1 μm. The advantage of this embodiment is that, unlike the first embodiment, a plurality of transistors can be integrated on one insulating substrate.

(Fourth Embodiment) FIG. 5 is a diagram showing the structure of a dielectric base transistor of the fourth embodiment. In this figure, 51 is a SrTiO ₃ substrate, 52 and 54 are SiO ₂
A barrier layer, 53 is a Ta emitter electrode, 55 is a Ta collector electrode, 56 is a SiO ₂ insulating layer, 57 is a Ta emitter wiring, 58 is a Ta collector wiring, 59 is a SiO ₂ barrier layer, and 60 is a SrTiO ₃ : Nb base electrode. is there.

The difference between this embodiment and the first embodiment is that a SrTiO ₃ : Nb base electrode 60 doped with 0.05 wt% of Nb to be made conductive is used as the base electrode. The feature of this embodiment is that since both sides of the SiO ₂ barrier layer 59 are SrTiO ₃ , the barrier material and the S
Since the position of the conduction band of the dielectric base layer comes close to the Fermi surface regardless of the value of the band offset from rTiO ₃ , there is an advantage that the base voltage for turning on the transistor becomes a very small value.

As the base electrode, as described above,
In addition to using Nb-doped SrTiO ₃ : Nb as a base electrode as a base electrode, it is also possible to use one in which conductivity is imparted by shifting the constituent elements of the dielectric material forming the base region from the stoichiometric value. ..

(Fifth Embodiment) FIG. 6 is an explanatory view of the structure of a dielectric base transistor of the fifth embodiment. In this figure, 61 is a SrTiO ₃ substrate, and 62 and 64 are YAlO.
₃ barrier layer, 63 is YBa ₂ Cu ₃ O _x emitter electrode,
65 is YBa ₂ Cu ₃ O _x collector electrode, 66 is YAl
O ₃ insulating layer, 67 is YBa ₂ Cu ₃ O _x emitter wiring,
68 is YBa ₂ Cu ₃ O _x collector wiring, 69 is TiO
_{The two} barrier layer 70 is a YBa ₂ Cu ₃ O _x base electrode.

In the dielectric base transistor of this embodiment, YAlO _{3 is formed on} the upper surface of the SrTiO ₃ substrate 61.
A YBa ₂ Cu ₃ O _x emitter electrode 63 is formed via the barrier layer 62, and a YBa ₂ Cu ₃ O _x collector electrode 65 is also formed via the YAlO ₃ barrier layer 64, and YAlO ₃ insulation is formed on the entire surface thereof. The layer 66 is formed, and the YBa ₂ Cu ₃ O _x emitter wiring 67 and the YBa ₂ C are formed through the contact holes formed in the YAlO ₃ insulating layer 66.
The u ₃ O _x collector wiring 68 is formed, and YBa is formed on the back surface of the SrTiO ₃ substrate 61 via the TiO ₂ barrier layer 69.
_{A 2} Cu ₃ O _x base electrode 70 is formed.

In this embodiment, YBa _{2 is} applied to each electrode.
By using a superconductor made of Cu ₃ O _x, there is an advantage that the electrode resistance becomes zero at a liquid nitrogen temperature of about 77 K, and a superconducting current can flow between the emitter and collector electrodes. There is.

In the first embodiment, the barrier layers between the base layer and the emitter electrode and between the base layer and the collector electrode are SiO _2.
However, YAlO ₃ is used in this embodiment because the reason is SiO ₂
Does not allow these materials to be used next to each other because they react with YBa ₂ Cu ₃ O _x , and YBa
_This is because YAlO ₃ is suitable as a material that does not react with ₂ Cu ₃ O _x and functions as a barrier layer. Although the high temperature oxide superconductor is used in this example, it is also possible to use a metal superconductor such as Nb or Pb alloy.

(Sixth Embodiment) FIG. 7 is a diagram showing the structure of a dielectric base transistor of the sixth embodiment. In this figure, 71 is a KTa _1-x Nb _x O ₃ substrate, 72 and 74 are SiO ₂ barrier layers, 73 is a Ta emitter electrode, and 75 is T.
a collector electrode, 76 an SiO ₂ insulating layer, 77 Ta emitter wiring, 78 Ta collector wiring, 79 SiO ₂
The barrier layer 80 is a Ta base electrode.

In this embodiment, a KTa _1-x Nb _x O ₃ substrate is used as a substrate for the carrier traveling channel, and the temperature at which the dielectric constant becomes maximum is adjusted by changing the ratio x of Nb. be able to. For example, YBa ₂
When a Cu ₃ O _x superconductor material is used as an electrode, x is adjusted so that the dielectric constant is maximized at the critical temperature of liquid nitrogen, and a dielectric base transistor with good characteristics is designed. be able to. As an example of the relationship between x and the dielectric constant, when x = 0.05, the relative dielectric constant at the liquid nitrogen temperature reaches tens of thousands.

[0049]

As described above, according to the present invention,
Since the barrier layer that blocks the flow of carriers is interposed between the base electrode and the dielectric base region, the current flowing from the base electrode to the dielectric base region can be blocked under all bias conditions, so that the carrier density of the channel is reduced. The base electrode can be sufficiently biased so as to be high, and as a result, the transistor current can be increased and the on-resistance can be reduced, which greatly contributes to the practical use of the dielectric base transistor.

[Brief description of drawings]

1A and 1B are explanatory views of the principle of the present invention.

FIG. 2 is an explanatory diagram of a configuration of a dielectric base transistor of the first embodiment.

FIG. 3 is a structural explanatory view of a dielectric base transistor of a second embodiment.

FIG. 4 is a structural explanatory view of a dielectric base transistor of a third embodiment.

FIG. 5 is a structural explanatory view of a dielectric base transistor of a fourth embodiment.

FIG. 6 is a structural explanatory view of a dielectric base transistor of a fifth embodiment.

FIG. 7 is a structural explanatory view of a dielectric base transistor of a sixth embodiment.

8A and 8B are explanatory views of a conventional dielectric base transistor.

FIG. 9 is an energy band diagram of a conventional dielectric base transistor.

[Explanation of symbols]

11 SrTiO ₃ substrate 12, 14 SiO ₂ barrier layer 13 Ta emitter electrode 15 Ta collector electrode 16 SiO ₂ insulating layer 17 Ta emitter wiring 18 Ta collector wiring 19 SiO ₂ barrier layer 20 Ta base electrode

Claims (7)

[Claims] 1. A base region in which a carrier made of a dielectric material having a high dielectric constant travels, and one side of the base region has a dielectric constant lower than that of the dielectric material forming the base region.
The emitter electrode formed via the barrier layer, the collector electrode formed via the second barrier layer similarly having a lower dielectric constant than the dielectric material forming the base region, and the other side of the base region. And a third barrier layer having a barrier height and a thickness that substantially inhibits carrier movement between the base region and the base electrode. An insulating channel type dielectric base transistor characterized by being inserted. 2. The insulating channel type dielectric according to claim 1, wherein the dielectric constant of the third barrier layer is selected to be higher than the dielectric constants of the first barrier layer and the second barrier layer. Base transistor. 3. A dielectric material forming a base region and a third layer.
2. The insulating channel type dielectric base transistor according to claim 1, wherein the barrier layer and the base electrode are thin films formed on the insulating substrate in contact with each other. 4. The base electrode is provided with conductivity by introducing some kind of impurities into the dielectric material forming the base region or shifting the constituent elements from the stoichiometric value. An insulating channel type dielectric base transistor according to claim 1. 5. The insulating channel type dielectric base transistor according to claim 1, wherein at least one of the emitter electrode, the collector electrode, the base electrode and the like is made of a metal or oxide material having superconductivity. .. 6. The dielectric material forming the base region is S
The insulating channel type dielectric base transistor according to claim 1, which is an oxide containing any one of r, Ti, K, Ta, Sn, Zr, and Nb. 7. The dielectric material forming the base region is KT.
_3. The insulated channel type dielectric base transistor according to claim 1, wherein the temperature is a _1-x Nb _x O ₃ , and the temperature at which the dielectric constant is maximized is adjusted by the composition ratio of Nb.