JPH0677547A - Three terminal element capable of handling superconductor - Google Patents

Abstract

PURPOSE:To provide a superconductor capable of handling three terminal element having amplification capacity. CONSTITUTION:In a three terminal element having a base layer 2 comprising a superconductor, an emitter layer 3 implanting superconductive electrons in the base layer 2 and a collector layer 1 to arrest the super conductive electrons from the base layer 2 as well as using the superconductive tunnel phenomenon between the base layer 2 and the emitting layer 3, a tunnel barrier 5 is also provided between the base layer 2 and the collector layer 1. In such a constitution, a bias voltage is implanted in the space between the collector layer 1 and the emitter layer 3 while input signal voltage is also impressed in the space between the collector layer 1 and the base layer 2. Furthermore, the collector layer 1 is provided with a barrier 6 comprising a depletion layer to control the superconductive electrons.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a superconductor-compatible three-terminal element. 2. Description of the Related Art In recent years, in the field of electronics technology such as computers, it has been expected that a superconductor-compatible three-terminal element such as a superconducting transistor will be put into practical use as an electronic element that can operate at high speed with low power consumption.

[0002]

2. Description of the Related Art Conventionally, a superconductor-compatible three-terminal element such as a superconducting base transistor utilizing the behavior of electrons in a superconductor has been known. FIG. 5 is a diagram illustrating the structure of a conventional superconducting base transistor.

In this figure, 41 is a semiconductor substrate, and 42 is a semiconductor substrate.
Is a superconductor layer, 43 is a tunnel barrier, 44 is a superconductor layer, 45 is a collector electrode, 46 is a base electrode, and 47 is an emitter electrode.

In this conventional superconducting base transistor, a superconductor layer 42 is formed on a semiconductor substrate 41, a tunnel barrier 43 is formed on it, and a superconductor layer 44 is formed on it. A collector electrode 45 is formed on the semiconductor substrate 41, a base electrode 46 is formed on the superconductor layer 42, and an emitter electrode 47 is formed on the superconductor layer 44.

FIG. 6 is an energy band diagram of a conventional superconducting base transistor. The reference numerals described in this figure are the same as those described in FIG. The operation of the conventional superconducting base transistor will be described with reference to this energy band diagram.

In this superconducting base transistor, a bias voltage is applied between the semiconductor substrate 41 serving as the collector and the superconductor layer 44 serving as the emitter, and the superconductor layer 42 serving as the base and the superconductor layer serving as the emitter. An input signal is applied between the conductor layers 44, and the potential of the superconductor layer 42 serving as the base and the superconductor layer 44 serving as the emitter with the tunnel barrier 43 interposed therebetween causes the superconductor layer 44 serving as the emitter. The amount of movement of the quasi-particles is controlled so that the electrons passing through the tunnel barrier 43 are collected by the semiconductor substrate 41.

[0007]

In this conventional superconducting base transistor, an input signal is applied between the superconducting layer 42 serving as the base and the superconducting layer 44 serving as the emitter, and is formed between them. The tunnel phenomenon of the quasi-particles in the tunnel barrier 43 is controlled, and the semiconductor substrate 41 serving as the collector and the superconductor layer 42 serving as the base are directly coupled to each other, and the semiconductor substrate at the interface between the two is formed. The barrier blocks the flow of electrons.

Attempts have been made to form a double barrier layer in this region in order to solve this problem, but no significant improvement effect is obtained and the amplifying action as a transistor has not been realized. An object of the present invention is to realize a superconductor-compatible three-terminal element having an amplifying action.

[0009]

In a superconductor-compatible three-terminal device according to the present invention, a base layer made of a superconductor, an emitter layer for injecting superconducting electrons into the base layer, and the base layer. A three-terminal device using a superconducting tunnel phenomenon between the base layer and the emitter layer, having a collector layer for trapping superconducting electrons from It was adopted.

In this case, it is possible to employ a structure in which the collector layer has a barrier composed of a depletion layer for controlling superconducting electrons.

[0011]

1 (A) to 1 (D) are explanatory views of the principle of the superconductor-compatible three-terminal element of the present invention. The superconductor-compatible three-terminal element of the present invention will be described with reference to the principle explanatory diagram using this band model. In this figure, 1 is a collector, 2
Is a base, 3 is an emitter, 4 is a superconducting tunnel barrier,
5 is a tunnel barrier, 6 is a depletion layer barrier, 7 and 8
Is an energy gap (2Δ), and 9 is a junction potential.
The collector 1 is a semiconductor or Nb-doped Sr.
It is composed of a conductive dielectric such as TiO ₃ ,
Reference numeral 3 is made of a superconductor such as Nb, and reference numerals 4 and 5 are made of an insulating film such as SiO ₂ .

A feature of the present invention is that the tunnel barrier 5 is formed as an intermediate layer between the collector 1 and the base 2, or
The barrier 6 is formed by a depletion layer in the vicinity of the tunnel barrier 5 in the collector 1, and the barrier 6 by the depletion layer is especially provided for controlling the current.

The operation of the superconductor-compatible three-terminal element of the present invention will be described with reference to this drawing. 1. FIG. 1A shows a collector 1, a base 2, and an emitter 3.
It shows a state in which no voltage is applied to. In this state, the energy gap (2Δ) 7 of the emitter 3 and the energy gap (2Δ) of the base 2 which sandwich the superconducting tunnel barrier 4 are equal in height, and the barrier 6 due to the depletion layer is formed on the tunnel barrier 5 side of the collector 1. Are formed.

2. FIG. 1B shows a state in which a bias voltage is applied between the collector 1 and the emitter 3.
In this state, as compared with the energy band shown in FIG. 1A, the energy band of the base 2 is pushed higher than the energy band of the collector 1 by the bias voltage applied between the collector 1 and the emitter 3. ,
The energy band of the emitter 3 is pushed higher than the energy band of the base 2. In this state, the junction potential 9 applied between the base 2 and the emitter 3 is smaller than the energy gaps (2Δ) 7 and 8, and the top of the valence band of the emitter 3 is within the energy gap (2Δ) of the base 2. Therefore, a tunnel of superconducting electrons from the emitter 3 to the base 2 does not occur through the superconducting tunnel barrier 4, and therefore an output current does not occur in this superconductor-compatible three-terminal element.

3. FIG. 1C shows a state in which a bias voltage is applied between the collector 1 and the emitter 3 and a small input voltage is applied between the collector 1 and the base 2. In this state, due to the input voltage applied between the collector 1 and the base 2, the energy band of the base 2 becomes relatively higher than the energy band of the collector 1, and the top of the valence band of the emitter 3 of the base 2. To enter the valence band, a tunnel of superconducting electrons from the emitter 3 to the base 2 occurs through the superconducting tunnel barrier 4. However, since the barrier 6 due to the depletion layer formed in the collector 1 adjacent to the base 2 via the tunnel barrier 5 is high, this superconducting electron cannot tunnel through the tunnel barrier 5. Therefore, no output current is generated in this superconductor-compatible three-terminal element.

4. FIG. 1D shows a state in which a bias voltage is applied between the collector 1 and the emitter 3 and a large input voltage is applied between the collector 1 and the base 2. In this state, as in FIG. 1C, the base 2 is changed by the input voltage applied between the collector 1 and the base 2.
Has a relatively higher energy band than the energy band of the collector 1, the top of the valence band of the emitter 3 enters the valence band of the base 2, and the superconducting electron from the emitter 3 to the base passes through the superconducting tunnel barrier 4. The tunnel to 2 is ready to happen. Then, since the barrier 6 due to the depletion layer in the collector 1 adjacent to the base 2 and formed through the tunnel barrier 5 is lowered, the superconducting electrons can tunnel through the tunnel barrier 5 and pass therethrough. An output current is generated in this superconductor-compatible three-terminal element.

In the superconductor-compatible three-terminal element of the present invention, the use of superconductors for the base 2 and the emitter 3 makes it possible to utilize the tunneling phenomenon due to superconducting electrons between the emitter 3 and the base 2. In addition, since the electronic state inside the superconductor is condensed, the leak current can be suppressed, and a small change in the input voltage causes a large change in the output current during operation.

These features are different from the conventional superconducting transistor shown in FIGS. 5 and 6 in that the barrier between the base 42 and the emitter 44 is used for controlling the current. In the present invention, as shown in FIG. 1, a tunnel barrier 5 is formed between the collector 1 and the base 2, and a barrier 6 is newly provided inside the collector 1 by a depletion layer to control the current. It is obtained as a result of using it.

That is, the tunnel barrier 5 formed between the collector 1 and the base 2 reduces the reverse bias voltage applied to the depletion layer, and the base voltage can be made higher than the depletion layer potential, thereby increasing the collector current. Cause

Further, a barrier 6 formed by a depletion layer newly formed inside the collector 1 sets a threshold value for the base-collector voltage at which electrons tunnel from the base 2 to the collector 1 to greatly change the output current with respect to the base potential. Produces the effect of Further, by adopting such a configuration, the operating voltage of the superconductor-compatible three-terminal element can be set by the doping amount of impurities into the collector 1, so that the degree of freedom in design is increased. Then, by controlling the barrier by the depletion layer of the collector 1, the superconducting electrons are effectively controlled and the input voltage can be amplified.

[0021]

EXAMPLES Examples of the present invention will be described below. (First Embodiment) FIG. 2 is a structural explanatory view of a superconductor-compatible three-terminal element of the first embodiment. In this figure, 11 is an Nb-doped SrTiO ₃ substrate, 12 is a depletion layer barrier, 1
3 is a SiO ₂ tunnel barrier, 14 is a Nb superconductor layer,
15 is an Al layer, 16 is an AlO _x superconducting tunnel barrier,
Reference numeral 17 is an Nb superconductor layer, 18 is a collector electrode, 19 is a base electrode, and 20 is an emitter electrode.

In the superconductor-compatible three-terminal element of this embodiment, the CV is formed on the Nb-doped SrTiO ₃ substrate 11.
The SiO ₂ tunnel barrier 13 having a thickness of 3 nm is formed by the D method.
And a Nb superconductor layer 14 having a thickness of 50 nm is formed thereon.
And a 7 nm thick Al layer 15 is deposited thereon, the surface is oxidized by 3 nm to form an AlO _x superconducting tunnel barrier 16, and a 100 nm thick Nb superconductor layer 17 is formed thereon. Forming Nb-doped SrTiO ₃ substrate 1
1, the collector electrode 18 is formed on the Nb superconductor layer 14, the base electrode 19 is formed on the Nb superconductor layer 14, and the emitter electrode 20 is formed on the Nb superconductor layer 17. In this structure, Nb-doped SrTiO ₃
A depletion layer barrier 12 is formed on the substrate 11.

In this embodiment, Nb-doped SrT
Since the iO ₃ substrate 11 is used, the height of the depletion layer barrier in the collector, which is also the substrate, is adjusted by changing the doping amount of Nb to set the threshold value of this superconductor-compatible three-terminal element. And the Nb superconductor layers 14 and 17 formed thereon have good compatibility with each other, and high carrier mobility allows high-speed operation characteristics to be obtained.

Further, since the Al—AlO _x superconducting tunnel barrier 16 is used, it has good compatibility with the Nb superconducting layers 14 and 17, and an extremely thin tunnel barrier without pinholes is formed, resulting in a good Josephson junction. Has become.

The energy band of the superconductor-compatible three-terminal element of this embodiment is as shown in the principle explanatory view of FIG. 1, and its operation is also the same as the operation principle described above.

(Second Embodiment) FIG. 3 is an explanatory view of a superconductor-compatible three-terminal element of the second embodiment. In this figure, 21 is an Nb-doped SrTiO ₃ substrate, 22 is a depletion layer barrier, 23 is a CeO ₂ tunnel barrier, and 24 is YBC.
O superconductor layer, 25 is a CeO ₂ superconducting tunnel barrier,
26 is a YBCO superconductor layer, 27 is a collector electrode, 28
Is a base electrode and 29 is an emitter electrode.

In the superconductor-compatible three-terminal element of this embodiment
In addition, Nb-doped SrTiO 3₃Ce on the substrate 21
O₂A tunnel barrier 23 is formed, and YBaCu is formed on the tunnel barrier 23.
An O (YBCO) superconductor layer 24 is formed, and Ce is formed thereon.
O₂Superconducting tunnel barrier 25 is formed and YB is formed on it.
A CO superconductor layer 26 is formed, and Nb-doped SrTiO 3 is formed. ₃
The collector electrode 27 is provided on the substrate 21 and the YBCO superconductor layer 2 is provided.
4 to the base electrode 28 and the YBCO superconductor layer 26 to the emitter.
The contact electrode 29 is formed. In this configuration, Nb
SrTiO₃A depletion layer barrier 22 is formed on the substrate 11.
To be done.

In this embodiment, Nb-doped SrT
Since the carrier mobility of the iO ₃ substrate 21 is high, high-speed operation characteristics can be obtained, and the Nb-doped SrTiO ₃
Since the substrate 21 is used, YBCO which is an oxide superconductor
The superconductor layers 24 and 26 can be stably deposited.

By using YBCO which is an oxide superconductor, the operating temperature of the device can be raised to the liquid nitrogen temperature. Further, since the CeO ₂ tunnel barrier 23 and the CeO ₂ superconducting tunnel barrier 25 are used, thermal diffusion of the semiconductor material is reduced, and Nb-doped SrTi is used.
The conformity with the O ₃ substrate 21 and the YBCO superconductor layers 24 and 26 is improved. Note that NdGaO ₃ , LaAlO _3, or the like can be used instead of CeO ₂ which is an insulator.

The energy band of the superconductor-compatible three-terminal element of this embodiment is as shown in the principle explanatory view of FIG. 1, and its operation is also the same as the operation principle described above.

(Third Embodiment) FIG. 4 is an explanatory view of a superconductor-compatible three-terminal element of a third embodiment. In this figure, 31 is InSb substrate, 32 is the depletion layer barrier 33 is InSb oxide tunnel barrier, 34 Nb superconductor layer 35 is Al layer, 36 AlO _X superconducting tunnel barrier, 37 Nb superconducting Body layer, 38 is collector electrode, 39
Is a base electrode and 40 is an emitter electrode.

In the superconductor-compatible three-terminal element of this embodiment, the InSb oxide tunnel barrier 33 is formed on the InSb substrate 31, and the Nb superconductor layer 34 is formed thereon.
And depositing an Al layer 35 thereon, and then oxidizing the surface to form an AlO _x superconducting tunnel barrier 36, forming an Nb superconducting layer 37 thereon, and collecting an InSb substrate 31 on the collector. The electrode 38, the base electrode 39 on the Nb superconductor layer 34, and the emitter electrode 4 on the Nb superconductor layer 37.
Form 0. In this structure, the depletion layer barrier 32 is formed on the InSb substrate 31.

In this embodiment, since the InSb substrate 31 serving as the collector electrode is used, InSb has a high mobility, the operating speed can be increased, and the lattice matching with Nb is excellent. There is. The energy band of the superconductor-compatible three-terminal element of this example is as shown in the principle explanatory view of FIG. 1, and its operation is also the same as the operation principle described above.

[0034]

As described above, according to the present invention,
The three-terminal element can be made to have a superconducting state with an amplifying effect, and by using an oxide superconductor, it can be used at a temperature higher than liquid nitrogen temperature, and the element structure is simple. There is a big contribution in the technical field related to.

[Brief description of drawings]

1A to 1D are explanatory views of the principle of a superconductor-compatible three-terminal element of the present invention.

FIG. 2 is a structural explanatory view of a superconductor-compatible three-terminal element of the first embodiment.

FIG. 3 is an explanatory diagram of a superconductor-compatible three-terminal element according to a second embodiment.

FIG. 4 is an explanatory diagram of a superconductor-compatible three-terminal element according to a third embodiment.

FIG. 5 is an explanatory diagram of a configuration of a conventional superconducting base transistor.

FIG. 6 is an energy band diagram of a conventional superconducting base transistor.

[Explanation of symbols]

 1 collector 2 base 3 emitter 4 superconducting tunnel barrier 5 tunnel barrier 6 barrier due to depletion layer 7,8 energy gap (2Δ) 9 junction potential

Claims (2)

[Claims] 1. A base layer made of a superconductor, an emitter layer for injecting superconducting electrons into the base layer, and a collector layer for trapping superconducting electrons from the base layer. A three-terminal device using a superconducting tunnel phenomenon between layers, characterized in that it also has a tunnel barrier between the base layer and the collector layer. 2. The superconductor-compatible three-terminal element according to claim 1, wherein the collector layer has a barrier made of a depletion layer for controlling superconducting electrons.