JPH05185018A - Method for applying flux for solder leveler of printed circuit board - Google Patents

Method for applying flux for solder leveler of printed circuit board

Info

Publication number
JPH05185018A
JPH05185018A JP34124591A JP34124591A JPH05185018A JP H05185018 A JPH05185018 A JP H05185018A JP 34124591 A JP34124591 A JP 34124591A JP 34124591 A JP34124591 A JP 34124591A JP H05185018 A JPH05185018 A JP H05185018A
Authority
JP
Japan
Prior art keywords
flux
solder
board
printed wiring
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP34124591A
Other languages
Japanese (ja)
Inventor
Kazuyasu Minagawa
一泰 皆川
Hiroshi Kusama
宏 草間
Kunio Kawaguchi
邦雄 川口
Yoshinori Shimada
吉徳 島田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP34124591A priority Critical patent/JPH05185018A/en
Publication of JPH05185018A publication Critical patent/JPH05185018A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457—Solder materials or compositions; Methods of application thereof
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3489—Composition of fluxes; Methods of application thereof; Other methods of activating the contact surfaces

Landscapes

  • Application Of Or Painting With Fluid Materials (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

PURPOSE:To adjust the applying amt. of flux and to prevent solder bridging and defective solder coating in the solder leveling of a printed circuit board by dipping the board in a flux vessel and then passing the board between the squeeze rolls with the gap controlled. CONSTITUTION:When a solder of a printed circuit board 1 is leveled, the board 1 is dipped in a flux vessel 2, then the board 1 is pulled up, and the surplus flux 4 is removed by a couple of squeeze rolls 3. In this case, the gap between the rolls 3 is adjusted, and the flux applying amt. is controlled. The gap between the rolls 3 is preferably equalized with the thickness of the board 1, and the weight of the flux 4 applied on the board 1 is controlled to 200-500g/m<2>. The applying amt. of flux is rationalized in this way.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、プリント配線板のソル
ダーレベラー用フラックスの塗布方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for applying a flux for a solder leveler of a printed wiring board.

【０００２】[0002]

【従来の技術】プリント配線板のソルダーレベラー処理
において、フラックス塗布はプリント配線板をフラック
ス槽に浸漬し、引き上げる際にしぼりロールによって過
剰なフラックスをしぼり取るという方法で行われるのが
一般的である。フラックスの塗布状態については、
（１）多過ぎるとプリント配線板をはんだ槽に浸漬して
も銅とはんだが接触せず、はんだによる被覆が不完全に
なること。 （２）フラックスの節約のために薄く均一になることに
主眼が置かれていた。 一方、表面実装用のプリント配線板では、表面実装端子
のサイズやその間隔が狭小化している。このため、この
ようなプリント配線板では、ソルダーレベラー時に表面
実装端子間ではんだブリッジが発生しやすくなった。は
んだブリッジの発生には、ソルダーレベラー装置の条
件、はんだの組成の他にフラックスの塗布量が関係して
いる。フラックスの塗布量を多くすると、プリント配線
板をはんだ槽から引き上げる際に、エアナイフによって
吹き飛ばされたはんだの粒子がプリント配線板の実装端
子等に再付着するのを防止する効果がある。ただし、フ
ラックスの塗布量が多過ぎると上記したようにプリント
配線板の銅とはんだが接触しにくくなり、はんだによる
被覆が不完全になる心配がある。このため、フラックス
の塗布量を適正に制御する必要が出てきた。フラックス
の塗布方法としては、フラックスしぼりロールの材質を
スポンジにしたり、特開昭５５−１６５２７６号公報に
示されるように、フラックスを泡立てて、その中にプリ
ント配線板を通過させる方法等がある。2. Description of the Related Art In the solder leveler process of a printed wiring board, flux is generally applied by dipping the printed wiring board in a flux tank and squeezing out excess flux by a squeezing roll when pulling it up. .. For the applied state of flux,
(1) If the amount is too large, the copper and solder do not come into contact with each other even when the printed wiring board is immersed in the solder bath, and the coating with the solder is incomplete. (2) The main focus was on thinning and uniforming to save flux. On the other hand, in the printed wiring board for surface mounting, the size of the surface mounting terminals and the space between them are narrowed. Therefore, in such a printed wiring board, a solder bridge is likely to occur between the surface mount terminals during the solder leveler. The generation of the solder bridge is related to the condition of the solder leveler device, the composition of the solder, and the amount of flux applied. Increasing the amount of flux applied has an effect of preventing the solder particles blown off by the air knife from reattaching to the mounting terminals of the printed wiring board when the printed wiring board is pulled up from the solder bath. However, if the amount of flux applied is too large, it becomes difficult for the copper of the printed wiring board and the solder to come into contact with each other as described above, and there is a concern that the coating with the solder will be incomplete. Therefore, it has become necessary to properly control the amount of flux applied. As a method for applying the flux, there is a method in which the material of the flux squeezing roll is sponge, or as shown in JP-A-55-165276, the flux is bubbled and the printed wiring board is passed through it.

【０００３】[0003]

【発明が解決しようとする課題】しかしながら、しぼり
ロールの材質をスポンジにした場合、寿命が短いという
問題がある。また、特開昭５５−１６５２７６号公報に
示される方法の場合、フラックスの塗布量の調整が困難
であるという課題がある。However, when the material of the squeezing roll is sponge, there is a problem that the life is short. Further, the method disclosed in JP-A-55-165276 has a problem that it is difficult to adjust the coating amount of the flux.

【０００４】本発明は、高密度な表面実装端子パターン
を有するプリント配線板のソルダーレベラー処理におい
て、はんだブリッジの発生を防止し、かつ銅表面のはん
だ被覆が不完全となるのを防止するために適正な量のフ
ラックスを塗布する方法を提供することを目的とする。According to the present invention, in the solder leveler process of a printed wiring board having a high-density surface-mounting terminal pattern, in order to prevent the occurrence of solder bridges and prevent incomplete solder coating on the copper surface. It is an object to provide a method for applying a proper amount of flux.

【０００５】[0005]

【課題を解決するための手段】上記目的を達成するため
に、本発明はプリント配線板１をフラックス槽２に浸漬
し、次に間隔を調整したしぼりロール３の間を通すこと
が特徴である。さらに、このようにしてプリント配線板
１に塗布されたフラックス４の重量が２００〜５００g/
m2であることを特徴とする。プリント配線板に塗布され
たフラックスの塗布重量が２００g/m2未満の場合、ソル
ダーレベラー時のはんだブリッジが多発し、５００g/m2
より多い場合は、銅表面のはんだ被覆が不完全な部分が
発生し易くなる。In order to achieve the above object, the present invention is characterized in that a printed wiring board 1 is dipped in a flux tank 2 and then passed between squeezing rolls 3 whose intervals are adjusted. .. Further, the weight of the flux 4 thus applied to the printed wiring board 1 is 200 to 500 g /
It is characterized by being m 2 . If the applied weight of the flux applied to the printed wiring board is less than 200 g / m 2 , solder bridges frequently occur at the solder leveler and 500 g / m 2
If the amount is larger than the above range, incomplete solder coating on the copper surface is likely to occur.

【０００６】[0006]

【作用】上記の手段により、ソルダーレベラー時のはん
だブリッジの発生や銅表面のはんだ被覆が不完全となる
問題を防止するために、適正な量のフラックスを安定に
塗布可能となる。By the above means, it is possible to apply a proper amount of flux in a stable manner in order to prevent problems such as the generation of solder bridges during solder leveling and the incomplete solder coating on the copper surface.

【０００７】[0007]

【実施例】【Example】

実施例１ 以下、本発明に係るソルダーレベラー用フラックスの塗
布方法について、添付図面を参照しながら詳細に説明す
る。大日本スクリーン製ソルダーレベラー装置（ＨＳＣ
−６０１）において、プリント配線板の板厚と同じ値に
しぼりロール３の間隔を設定する。しぼりロール３の間
隔をこれ以上広げる場合にのみエアシリンダーの圧力が
かかる状態となる。フラックスはメック製Ｗ２２１を用
い、温度は３０〜４０℃に設定する。プリント配線板１
を約５秒間フラックス４の中に浸漬した後、板厚と同じ
間隔のしぼりロール３の間を通して引き上げる。フラッ
クス塗布量は約３００g/m2であった。５〜１８０秒の後
にはんだ槽に約５秒間浸漬し、エアナイフによって余分
なはんだを吹き飛ばしながらプリント板を引き上げる。
この場合のはんだブリッジおよび銅表面のはんだ被覆不
良は共に１％未満であった。Example 1 Hereinafter, a method for applying a flux for a solder leveler according to the present invention will be described in detail with reference to the accompanying drawings. Dainippon Screen Solder Leveler (HSC
-601), the interval between the rolls 3 is set to the same value as the thickness of the printed wiring board. The pressure of the air cylinder is applied only when the interval between the squeezing rolls 3 is increased. W221 manufactured by MEC is used as the flux, and the temperature is set to 30 to 40 ° C. Printed wiring board 1
Is immersed in the flux 4 for about 5 seconds, and then pulled up between the squeezing rolls 3 having the same spacing as the plate thickness. The amount of flux applied was about 300 g / m 2 . After 5 to 180 seconds, it is dipped in a solder bath for about 5 seconds and the printed board is pulled up while blowing off excess solder with an air knife.
In this case, the solder bridge and the defective solder coating on the copper surface were both less than 1%.

【０００８】実施例２ 実施例１と同様のソルダーレベラー装置において、しぼ
りロールの間隔をはさみ板５をしぼりロールの両端には
さむことにより、プリント配線板の板厚と同じ間隔に調
整する。この後、実施例１と同様の条件でソルダーレベ
ラー作業を行ったところ、フラックス塗布量は約３００
g/m2であり、はんだブリッジおよび銅表面のはんだ被覆
不良は共に１％未満であった。Example 2 In the same solder leveler apparatus as in Example 1, the spacing between the pressing rolls is adjusted to the same spacing as the thickness of the printed wiring board by sandwiching the sandwiching plate 5 at both ends of the pressing roll. After that, when the solder leveler work was performed under the same conditions as in Example 1, the flux coating amount was about 300.
It was g / m 2 , and the solder bridge and the solder coating failure on the copper surface were both less than 1%.

【０００９】[0009]

【発明の効果】以上に説明した通り、本発明に係るソル
ダーレベラー用フラックスの塗布方法は、フラックスし
ぼりロールの間隔を調整することにより、フラックス塗
布量を調整することができる。従って、ソルダーレベラ
ー処理の際、はんだブリッジや銅表面のはんだ被覆不良
を防止できるという効果を有する。As described above, in the method for applying the flux for the solder leveler according to the present invention, the flux application amount can be adjusted by adjusting the interval between the flux squeezing rolls. Therefore, during the solder leveler treatment, there is an effect that it is possible to prevent a solder bridge or a defective solder coating on the copper surface.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施例を示すソルダーレベラー用フ
ラックスの塗布装置の断面図である。FIG. 1 is a cross-sectional view of a solder leveler flux applicator showing an embodiment of the present invention.

【図２】本発明の一実施例を示すソルダーレベラー用フ
ラックスの塗布装置の断面図である。FIG. 2 is a cross-sectional view of a solder leveler flux applicator showing an embodiment of the present invention.

【符号の説明】[Explanation of symbols]

１ プリント配線板 ２ フラックス槽 ３ しぼりロール ４ フラックス ５ しぼりロール間隔調整用はさみ板 1 Printed wiring board 2 Flux tank 3 Squeezing roll 4 Flux 5 Squeezing roll spacing scissors

───────────────────────────────────────────────────── フロントページの続き (72)発明者 島田 吉徳 茨城県下館市大字小川1500番地 日立化成 エレクトロニクス株式会社内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Yoshinori Shimada 1500 Ogawa, Shimodate City, Ibaraki Prefecture Hitachi Chemical Electronics Co., Ltd.

Claims (2)

【特許請求の範囲】[Claims] 【請求項１】プリント配線板のソルダーレベラー処理に
おいて、プリント配線板１をフラックス槽２に浸漬し、
次に間隔を調整したしぼりロール３の間を通すことを特
徴とするプリント配線板のソルダーレベラー用フラック
スの塗布方法。1. In a solder leveler treatment of a printed wiring board, the printed wiring board 1 is immersed in a flux tank 2,
Next, a method for applying a flux for a solder leveler of a printed wiring board, which comprises passing between the squeezing rolls 3 whose intervals are adjusted. 【請求項２】前記ソルダーレベラー処理のはんだ槽浸漬
前に、プリント配線板１に塗布されたフラックス４の重
量が２００〜５００g/m2であることを特徴とする請求項
１に記載のプリント配線板のソルダーレベラー用フラッ
クスの塗布方法。2. The printed wiring according to claim 1, wherein the weight of the flux 4 applied to the printed wiring board 1 is 200 to 500 g / m 2 before being dipped in the solder bath of the solder leveler treatment. How to apply flux for board solder levelers.
JP34124591A 1991-12-24 1991-12-24 Method for applying flux for solder leveler of printed circuit board Pending JPH05185018A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP34124591A JPH05185018A (en) 1991-12-24 1991-12-24 Method for applying flux for solder leveler of printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP34124591A JPH05185018A (en) 1991-12-24 1991-12-24 Method for applying flux for solder leveler of printed circuit board

Publications (1)

Publication Number Publication Date
JPH05185018A true JPH05185018A (en) 1993-07-27

Family

ID=18344530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP34124591A Pending JPH05185018A (en) 1991-12-24 1991-12-24 Method for applying flux for solder leveler of printed circuit board

Country Status (1)

Country Link
JP (1) JPH05185018A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002232151A (en) * 2001-01-30 2002-08-16 Sony Corp System and method for processing substrate
CN110854641A (en) * 2019-11-19 2020-02-28 常州市都威电子有限公司 Data line automatic weld machine

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002232151A (en) * 2001-01-30 2002-08-16 Sony Corp System and method for processing substrate
JP4626062B2 (en) * 2001-01-30 2011-02-02 ソニー株式会社 Substrate processing apparatus and substrate processing method
CN110854641A (en) * 2019-11-19 2020-02-28 常州市都威电子有限公司 Data line automatic weld machine

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