JPH05184169A - Oscillatory wave motor driving circuit - Google Patents

Abstract

PURPOSE:To make it possible to reduce a original oscillation frequency by making a driving circuit which has the same effect as it is driven at a middle frequency of the minumum variation range of a driving frequency which is changed by changing a counting value of a counter for dividing by +/-1 every one cycle of the driving frequency. CONSTITUTION:A reverse cycle of an output of a D flip-flop 17 is so set as it repeats becoming longer or shorter by one cycle of oscillation of an oscillating circuit 1 every cycle. An oscillatory wave motor 26 is so structured as to be driven by a signal which changes its frequency every cycle. Since the oscillatory wave motor 26 has a response speed very much slower than the driving frequency, it rotates in the same condition as it is driven at a middle frequency between the two frequencies which vary every cycle. Even if a variation of the oscillatory wave motor 26 driving frequency is large, the same effect as the motor is driven at a middle frequency is obtained and therefore an original oscillation frequency can be made low.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a drive circuit for a so-called vibration wave motor which frictionally drives a moving body which is in contact with a vibrating body by a progressive vibration wave generated in the vibrating body.

[0002]

2. Description of the Related Art A first example of a conventional oscillatory wave motor drive circuit is shown in FIG. Reference numeral 101 is a microcomputer for controlling the drive of the vibration wave motor, 102 is a D / A converter for converting a digital signal output from the microcomputer 101 into an analog signal, and 103 is an oscillation frequency according to an output voltage from the D / A converter 102. Is controlled by a variable frequency oscillator (VCO), 104 is a D-flip flop for dividing the output signal from the variable frequency oscillator (VCO) 103 by two, and 105 and 106 are phases for driving the vibration wave motor. D-flip-flop for producing signals of different same frequency, 107 is EXCLUSIVE- for changing the rotation direction of the vibration wave motor
OR circuits, 108 and 109 are AND circuits for controlling driving and stopping of the vibration wave motor, 110 is a high-voltage power supply for driving the vibration wave motor, 111 and 112 are power amplifiers for driving the vibration wave motor, 113 and 114 are matching coils for driving the vibration wave motor, and 115
Is the main body of the vibration wave motor.

Next, the operation will be described according to the above circuit. The relationship between the drive frequency and the rotation speed of the vibration wave motor is shown in FIG.
It has the characteristics as shown in, and normally the drive frequency is f3.
To the lower side, and when the predetermined number of rotations between N1 and N2 is reached, the frequency scanning is stopped. Further, when the frequency is scanned up to f0, the rotation speed becomes maximum, but when the frequency becomes smaller than f0, the rotation speed suddenly drops. In order to rotate such a vibration wave motor, the microcomputer 1
01 first outputs 00h to the output ports of PD0 to PD7. The output of the D / A converter at this time becomes the minimum as shown in FIG.

The output of this D / A converter is input to a variable frequency oscillator (VCO) 103 and oscillates at a frequency four times the drive frequency f3 as shown in FIG. This oscillating signal is input to a 90-degree phase shift circuit composed of D-flip-flops 104, 105 and 106 to generate a vibration wave motor drive signal having the same frequency f3 and a phase difference of 90 degrees as shown in FIG. Of the two signals, the output signal of the D-flip-flop 106 delayed by 90 degrees in phase is E.
It is input to the XCLUSIVE-OR circuit 107. EX
A rotation direction signal is output from the DIR terminal of the microcomputer 101 to the CLUSIVE-OR circuit 107,
EXCLUSIVE-OR when DIR output is Low
The circuit 107 outputs a signal whose phase is delayed by 90 degrees,
When the terminal is High, a signal having a phase advanced by 90 degrees is output to switch the driving direction of the vibration wave motor.

The vibration wave motor drive signal generated up to this point is input to AND circuits 108 and 109, respectively, and when the ON terminal of the microcomputer 101 is High, a vibration wave motor drive signal is output. This signal is input to a power amplifier that uses the high-voltage power supply 110 as a power source, amplified to the power necessary to drive the vibration wave motor, and is supplied to the respective piezoelectric elements 115a of the vibration wave motor 115 via the matching coils 113 and 114. 115b is applied.
Since the frequency applied here is f4, the vibration wave motor does not rotate at the rotational speed of 0 as shown in FIG.

Next, the microcomputer 101 is PD
The output of 0 to PD7 is changed from 00h to 01h. As a result, the output voltage of the D / A converter 102 slightly rises as shown in FIG. 12, and the variable frequency oscillator (VCO)
The oscillation frequency of 103 becomes slightly smaller. For this reason, the drive frequency applied to the vibration wave motor is slightly reduced to f3 shown in FIG. 11, so that the vibration wave motor 115 starts rotating at the rotation speed of N3 as shown in FIG.
The microcomputer 101 sequentially changes the output data of PD0 to PD7 so as to increase, and changes the oscillation frequency of the variable frequency oscillator (VCO) in the decreasing direction.

As a result, the driving frequency applied to the vibration wave motor 115 is gradually scanned in a smaller direction, and the rotation speed of the vibration wave motor 115 increases as shown in FIG. When the rotation speed of the vibration wave motor 115 reaches the target rotation speed N1, the microcomputer 101 stops scanning the data to be output to PD0 to PD7 and outputs certain data. The drive frequency applied to the vibration wave motor at this time is f1. After that, the microcomputer 101 keeps the rotation speed of the vibration wave motor 115 constant, so that the rotation speed detection means (not shown) detects the rotation speed of the vibration wave motor 115, and the vibration wave motor 11
The output voltage of the A / D converter 102 and the oscillating frequency of the variable frequency oscillator (VCO) are changed by changing the output data of PD0 to PD7 so that the rotation speed of No. 5 falls within the target speed range N1 to N2. Let Thus, the drive frequency applied to the vibration wave motor 115 is controlled to control the rotation speed of the vibration wave motor 115 to fall within the target speed range.

A crystal oscillator or the like is used to oscillate a high frequency signal higher than the vibration wave motor drive frequency, and a counter circuit or the like is used to generate the vibration wave motor drive frequency to change the count number of the counter. The applicant has proposed a drive circuit that drives the vibration wave motor by changing the drive frequency of the vibration wave motor. On the other hand, in the conventional oscillatory wave motor drive circuit, when an object is driven by the oscillatory wave motor and some signal sound is generated, as shown in FIG.
A converter 202, variable frequency oscillator 203, vibration wave motor drive logic circuit 204, high voltage power supply 205, amplification circuits 206 and 207, matching coils 208 and 2
09 to drive the vibration wave motor 210,
Using the microcomputer 201 and buzzer 212,
It used the means of generating a signal tone.

[0009]

However, in the above conventional example, the D / A converter and the variable frequency oscillator (VC) are used.
O) and other analog circuits are required. Therefore, it is necessary to adjust the oscillation frequency of the D / A converter or the variable frequency oscillator (VCO) with high accuracy, and since it is an analog signal, it is weak against noise and is affected by the ambient temperature change. In order to configure these circuits with an IC, Bi
Since the digital circuit and the analog circuit must be configured by using a complicated process such as a CMOS process or a linear CMOS process, the circuit becomes complicated and expensive.

Further, in the circuit proposed by the present applicant, when the frequency for driving the vibration wave motor is finely changed, the oscillation frequency of the oscillation circuit becomes very high. Therefore, a logic circuit such as a counter circuit is used. It had to operate at high speed, which had the drawback of increasing costs.

On the other hand, the conventional vibration wave motor drive circuit shown in FIG. 19 requires a sounding means such as a buzzer in addition to the circuit for operating the vibration wave motor, which leads to an increase in the number of parts and an increase in cost. There was a drawback that it would end up.

Accordingly, it is an object of the present invention to provide an oscillatory wave motor drive circuit which does not have the above mentioned drawbacks.

[0013]

The oscillatory wave motor drive circuit according to the present invention is basically based on an oscillation source that is highly accurate and highly resistant to temperature changes such as a crystal oscillation of a signal having a frequency higher than the drive frequency of the oscillatory wave motor. Oscillate and divide it with a divider such as a counter, and change the number of divisions to create a drive signal for driving the vibration wave motor and alternate the drive signal frequency between two frequencies. It is configured so that it is possible to obtain the same effect as that of driving the vibration wave motor at a frequency intermediate between these two frequencies by changing the frequency. Therefore, even if the amount of frequency change for driving the vibration wave motor is rough, the same effect as the intermediate frequency can be obtained, and the original oscillation frequency can be lowered. Also, by changing the ratio for selecting these two frequencies from 1 to 3 or 3 to 1 instead of 1 to 1 as described above, the middle of the two vibration wave motor driving frequencies is expressed as a plurality of frequencies. Therefore, the original oscillation frequency can be further lowered. In this way, the vibration wave motor drive signal is created using only the digital circuit of the counter and the magnitude comparator for data comparison, and noise is generated by changing the vibration wave motor drive frequency at a speed extremely faster than the response speed of the vibration wave motor. It is resistant to environmental changes such as temperature, has a low original oscillation frequency, and can be configured only by the CMOS process when integrated into an IC.

On the other hand, in the vibration wave motor drive circuit of the present invention, a circuit for dividing the frequency signal for driving the vibration wave motor is provided so that the signal applied to the vibration wave motor has an audible frequency and a frequency at which the vibration wave motor does not rotate. By generating a sound of the applied frequency from the vibration wave motor by doing so, it is possible to eliminate a sounding body such as a buzzer and provide a simple frequency dividing circuit
A signal tone can be generated.

[0015]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of a first embodiment of the present invention. In the figure, 1 is a signal generator that generates a fixed high frequency signal, 2 is a counter circuit that receives the high frequency signal generated in 1, and 3 and 4 are inverter circuits, 5 and 6
Is a 2-input NAND circuit, and an RS flip-flop is constituted by 5 and 6. 7 is a 2-input AND circuit, 8 is a 7-bit counter connected to the 2-input AND circuit, 9 is a microcomputer for controlling the drive of the vibration wave motor, and 10 is 7-bit data and INC input from IP0 to IP6. An addition circuit that adds 1-bit data input to and outputs a value of 7 bits from OP0 to OP6, 11 is a 2-input AND circuit, and 12 is a magnitude that compares the data input from the addition circuit 10 and the 7-bit counter 8. The comparator, 13 is the output of the magnitude comparator 12 and the RST of the microcomputer 9.
An OR circuit which receives the output of the terminal as an input, 14 and 15 and 16 and 17 are D-flip flops, and 18 is EXCLUSIV
E-OR circuits, 19 and 20 are 2-input AND circuits, 21 is a high-voltage power supply for driving the vibration wave motor, 22 and 23 are power amplifiers for driving the vibration wave motor, and 24 and 25.
Is a matching coil for driving a vibration wave motor, and 26 is a vibration wave motor.

The operation of the vibration wave motor drive circuit of the present embodiment having the above structure will be described. The signal generator 1 starts oscillating when the circuit is powered on. The oscillation frequency here is 36 MHz, and this signal is input to the 8-bit counter circuit and AND circuit 7 through the signal line 31 in FIG. When a high signal is output from the microcomputer 9 for controlling the vibration wave motor to the RST terminal as a reset signal, the signal line 32 passes through the OR circuit 13 to the 8-bit counter circuit 2, the RS flip-flops 5 and 6 and the 7-bit counter circuit. Reset signal sent, 8
The count values of the bit counter 2 and the 7-bit counter 8 are reset to 0, and the output of the NAND circuit 5 forming the RS flip-flop becomes Low. The state of each signal at this time is shown by A in FIG. Next, the reset signal RST from the microcomputer 9
Becomes low and the signal from the signal generator 1 rises from low to high, the 8-bit counter circuit 2 starts counting and continues counting until the count value reaches 255. At this time, since the output 34 of the RS flip-flop circuit is Low, the output of the AND circuit 7 is Lo.
Since it is w, and the clock is not input to the 7-bit counter 8, the count value of the 7-bit counter remains 0. The state at this time is shown in FIG. 2B.

Next, the count value of the 8-bit counter is 2
The case where the signal 31 from the signal generator 1 changes from Low to High at 55 will be described. The signal input from the signal generator 1 to the 8-bit counter changes from Low to H
When it changes to high, the 8-bit counter overflows and outputs the carry signal 33 to the signal line. This signal is positive logic. This carry signal 33 passes through the inverter circuit 3 to form an N flip-flop circuit.
When input to the AND circuit 5, the output signal 34 of the inverter circuit 7 forming the RS flip-flop changes to High. Therefore, the output of the AND circuit 7 is the signal generator 1
The output signal 31 from the signal generator is ANDed with the output signal 34 of the AND circuit 7 forming the RS flip-flop, and thus the same signal as the output signal 31 of the signal generator 1 is output to the signal line 35 and input to the 7-bit counter circuit 8. To be done. The state at this time is shown by C in FIG. The 7-bit counter circuit 8 starts counting because the clock signal for counting is input. A count value is output from the 7-bit counter circuit 8 in 7-bit parallel and is input to the magnitude comparator 12. The state at this time is shown by D in FIG.

Now, assuming that the output value of PD0 to PD7 of the microcomputer 9 for controlling the vibration wave motor is 46, the output of PD0 is Low, so the AND circuit 11
Of the output value 46 of the PD0 to PD7 of the microcomputer 9 is 7 bits.
The values of PDQ to PD7 are input to IP0 to IP6.
At this time, the value input to IP0 to IP6 is 23, which is half the output value 46 of PD0 to PD7 of the microcomputer 9, and the input of INC is Low.
Therefore, the adder circuit 10 outputs 23, which is the same value as that input to IP0 to IP6.

At this time, when the count value of the 7-bit counter 8 reaches 23, the two inputs of the magnitude comparator 12 (from the 7-bit counter 8 and from the adder circuit 10) become equal, indicating that the data match. The signal is output to the signal line 36. This signal has a positive logic, and the level of the signal changes from Low to high when the data match. The state at this time is shown by the state E in FIG. When the signal line 36 changes from Low to High, the 8-bit counter circuit 2, 7-bit counter circuit 8 and RS flip-flop circuit are reset through the OR circuit 13, and the 8-bit counter 2, 7-bit counter 8 and RS flip-flop circuit are controlled by the microcomputer 9. The same initial state as when the reset signal is output is restored, and the rising signal is input to the clock terminal of the D-flip-flop circuit 14. The state at this time is shown by F in FIG. In this way, the circuit described so far repeats the states from B to F in FIG.
Each time the count value of the it counter circuit 8 matches the data output from the microcomputer 9 to PD0 to PD6, the output of the magnitude comparator 12 changes from Low to High, and the rising clock is input to the clock input of the D-flip-flop 14. To do.

Next, the D-flip-flops 14, 15,
The operation of 16 will be described with reference to the timing chart of FIG. The D-flip-flop 13 receives Q (1 in FIG. 3) every time a rising signal is input to the clock signal terminal CLK.
4Q output timing) and / Q (14 / Q output timing in FIG. 3) outputs are inverted. Therefore, the rising clocks are alternately input to the clock input terminals CLK of the D-flip-flops 15 and 16, and each time the rising clocks are input, the respective output Qs are output as shown at 15Q output and 16Q output in FIG. And / Q are inverted. Here, the 15Q output and the 16Q output are signals with the same frequency and a phase difference of 15Q delayed by 90 degrees with respect to 15Q. At this time, the output of the DIR terminal of the microcomputer 9 is L
If it is ow, the output of the EXCLUSIVE-OR circuit 18 becomes the same as the Q output of the D-flip-flop 16, and if the output of the DIR terminal of the microcomputer 9 is High, the output of the EXCLUSIVE-OR circuit 18 becomes D-.
An inverted signal of the Q output of the flip-flop 16 (a signal having the same frequency as the signal of the D-flip-flop 15 as shown in FIG. 3 but advanced in phase by 90 degrees) is output. Next, these two signals with the same frequency and a phase of ± 90 degrees are
It is input to the ND circuits 19 and 20. If the ON terminal of the microcomputer 9 outputs High, the AND circuits 19 and 20 transmit the signal as they are, and the ON terminal is Low.
At the time of, the outputs of the AND circuits 19 and 20 are Low.

Two signals output from the AND circuits 19 and 20 and having the same frequency but different phases are supplied to the high voltage power source 21 (about 3
It is input to a power amplifier having a power source of 0 V) and is amplified to the power required to drive the vibration wave motor 26. The amplified signals having the same frequency but different phases are applied to the piezoelectric elements 26a and 26b for driving the vibration wave motor through the matching coils 24 and 25 for driving the vibration wave motor, and the frequency of this signal drives the vibration wave motor 26. If the frequency is possible, the vibration wave motor 26 rotates.

In order to control the drive of the vibration wave motor 26, the rotation frequency must be changed by changing the drive frequency applied to the vibration wave motor as shown in FIG.

Next, a method of controlling the frequency applied to the vibration wave motor 26 in the circuit described above will be described. When the oscillation frequency of the signal generator 1 is 36 MHz, the period of the signal is about 27.778 nS. Therefore, it takes about 7.08 μS for the 8-bit counter 2 to count 255 and output the overflow signal to the signal line 33. Here, if the output value of PD0 to PD7 of the microcomputer 9 is 2, the output of the adder circuit 10 becomes 1, and the magnitude comparator 12 outputs a signal indicating that the data match when the count value of the 7-bit counter becomes 1. Since it outputs to the line 36, the 8-bit counter 2 outputs an overflow signal to the signal line 33 and then outputs about 27.778.
At nS, the magnitude comparator 11 outputs to the signal line 36 a signal indicating that the data match.

Therefore, after the 8-bit counter has started counting after resetting, the state of E in FIG. 2 is reached at 7.1111 μS, and a signal is input to the clock terminal CLK of the D-flip-flop 14 at a cycle of 7.1111 μS to output Q.
And / Q are inverted. Since this output is inverted every 7.1111 μS, the frequency is about 70.3125 KHz,
The frequency of the drive signal applied to the vibration wave motor 26 is about 35.156 KHz, which is ½ of this frequency.

Next, PD0 of the microcomputer 9
When the output value of PD7 is 4, the 8-bit counter 2 is 2
Every time the 7-bit counter 8 counts 2 after counting 55, the clock terminal CL of the D-flip-flop 14
The clock signal is input to K, and the cycle is 7.1389.
μS, the frequency of the output signal of the D-flip-flop 14 becomes about 70.039 KHz, and the vibration wave motor 26
The frequency of the drive signal applied to is about 35.019KHz
Becomes

Next, PD0 of the microcomputer 9
When the output value of PD7 is 130, 8-bit counter 2
, The clock signal is input to the clock terminal CLK of the D-flip-flop 13 every time the 7-bit counter 8 counts 65, and the cycle is 8.9.
167 μS, the frequency of the output signal of the D-flip-flop 13 is about 56.075 KHz, and the frequency of the drive signal applied to the vibration wave motor 26 is about 28.037.
It becomes KHz.

In this way, the PD of the microcomputer 9
By changing the output values of 0 to PD6, the cycle of the clock input to the clock terminal CLK of the D-flip-flop 14 can be changed to change the drive frequency applied to the vibration wave motor.

Up to this point, the PD of the microcomputer 9
Although the case where the 0 output is 0 (Low) has been described,
Next, the PD0 output of the microcomputer 9 is 1 (Hi
The case of gh) will be described with reference to FIG. Now, the output values of PDP to PD7 of the microcomputer 9 are 47
And the / Q output of the D-flip-flop 17 is 0 (L
ow) (state of A in FIG. 4), the output of the AND circuit 11 becomes 0 (Low) regardless of the state of the PD0 output of the microcomputer 9, so that the addition circuit 10 includes the microcomputer 9 Since 23, which is a half of the output value of PD0 to PD7, is input to IP0 to IP6 and 0 (Low) is input to INC, OP to
The output value of O6 is 23, and the operation at this time is PD0 to PD0 of the microcomputer 9 described previously with reference to FIG.
The operation is the same as when the output value of the PD 7 is 46, the signal of 1 (High) is output to the signal line 36, and the state of A of FIG. 4 shifts to the state of B of FIG.

Since the / Q output of the D-flip-flop 17 is 0 (Low) even in the state of B of FIG. 4, when the value of the 7-bit counter becomes 23 as in the previous case, the state of the state of B of FIG. 4 is changed to the state of C, and the same thing is repeated until it is changed to the state of E of FIG. At the time of E in FIG. 4, the output of / Q of the D-flip-flop 17 is 1 (H
PD) of the microcomputer 9
Since the output of 0 is 1 (High), the output of the AND circuit 11 is 1 (High), and the IP0 of the adder circuit 10
23, which is 1/2 of the output value 47 of the microcomputer 9, is input to the IP6 input, and 1 is input to INC.
Since (High) is input, O of the addition circuit 10
The output value of P0 to OP6 is 24.

The operation at this time is shown by E and F in FIG.
It is the state of. In this state, when the output of the 7-bit counter 8 becomes 24, a rising signal is output to the signal line 36. Therefore, the time until the Q output and / Q output of the D-flip-flop 14 are inverted is only one cycle of oscillation of the oscillation circuit 1 than when the / Q output of the D-flip-flop 17 is 0 (Low). It will be reversed in a long cycle. The state of the inversion period which is longer by one clock continues for four cycles from the state of E of FIG. 4 to the state of H of FIG. 4 and changes to the state of A of FIG. Therefore, the cycle of the Q output and / Q output of the D-flip-flop 17 is one cycle of the oscillation of the oscillation circuit 1 for each cycle.
It becomes longer and shorter by the period. Since the output of the D-flip-flop 17 is the same as the frequency of the signal that drives the vibration wave motor 26, the vibration wave motor 26 is driven by a signal whose frequency changes every cycle. Since the response speed of the vibration wave motor 26 is sufficiently slower than this drive frequency, the vibration wave motor 26 is driven in the same state as when the vibration wave motor 26 is driven at an intermediate frequency between two frequencies in which the cycle changes every cycle. You can do it.

Next, a method of controlling the frequency applied to the vibration wave motor 26 in the circuit described so far will be described. As described above, the oscillation frequency of the signal generator 1 is 3
Since it is 6 MHz, the period of the signal is about 27.778 nS, and if the output value of PD0 to PD7 of the microcomputer 9 is 3, the / Q output of the D-flip-flop is 0.
When it is (Low), the magnitude comparator 12
The period in which the rising signal is output to the signal line 36 is 7.1389 μ
In S, the frequency of the Q and / Q outputs of the D-flip-flop 15 for driving the vibration wave motor 26 is 35.019K.
Hz, and / Q output of D-flip-flop 17 becomes 1
When it is (High), the magnitude comparator 1
2 outputs a rising signal to the signal line 36 at a cycle of 7.1667
In the frequency of μS, the frequency for driving the vibration wave motor 26 is 3
It becomes 4.884 KHz.

Therefore, the vibration wave motor 26 has 35.0
Since the drive signals of 19 KHz and 34.884 KHz are alternately applied, the vibration wave motor 26 is substantially at an intermediate frequency between these two frequencies, that is, about 34.952 KH.
This is the same as when the z drive signal is given. The output of PD0 to PD7 of the microcomputer 9 is 131
In the case of, the drive frequency of the vibration wave motor 26 is given a drive frequency which repeats 28.037 KHz and 27.950 KHz in each cycle as in the case described above, and substantially drives the vibration wave motor 26 at 27.994 KHz. It will be.

In this way, the vibration wave motor drive frequency can be changed by changing the output values of the output terminals PD0 to PD7 of the vibration wave motor drive control microcomputer 9, so that the vibration wave motor drive control can be performed. The microcomputer 9 detects the driving speed of the vibration wave motor 25 by using the rotation speed detecting means of the vibration wave motor (not shown), and controls the speed of the vibration wave motor by changing the output values of PD0 to PD7. Can be done.

Another Embodiment FIG. 6 shows the configuration of the second embodiment of the present invention.
In the figure, 51 is a fixed high frequency signal generator and 52 is 5
Counter circuit that receives high-frequency signal generated in 1 as input 5
3 and 54 are inverter circuits. 55 and 56 are 2-input NA
In the ND circuit, 55 and 56 form an RS flip-flop. 57 is a 2-input AND circuit, and 58 is a 2-input A
A 6-bit counter connected to the ND circuit 57, 59 is a microcomputer for controlling the drive of the vibration wave motor, and 60 is the addition of 6-bit data input to IP0 to IP5 and 1-bit data input to INC. An adder circuit that outputs a value to OP0 to OP5 in 6 bits, 6
1 is DP0 according to the data input to AP0 and AP1
, And a data selection circuit for selecting the data of DP1 and outputting it to INCOUT, 62 compares the data input from the addition circuit 60 and the data input from the 6-bit counter 58, and if they match, H
a magnitude comparator that outputs a high signal,
Reference numeral 63 is an O which receives the output of the magnitude comparator 62 and the output of the RST terminal of the microcomputer 59.
R circuit, 64, 65, 67 and 68 D-flip flops, 69 EXCLUSIVE-OR circuits, 70 and 71
Is a two-input AND circuit, 72 is a high voltage power supply for driving the vibration wave motor, 73 and 74 are power amplifiers for driving the vibration wave motor, 75 and 76 are matching coils for driving the vibration wave motor, and 77 is a vibration. A wave motor.

The operation of the vibration wave motor drive circuit of the present embodiment having the above structure will be described. Similar to the first embodiment, the signal generator 5 is activated when the circuit is powered on.
1 starts oscillation. The oscillation frequency here is 18 MHz, which is half the oscillation frequency of the first embodiment. When a High signal is output from the microcomputer 59 to the RST terminal as a reset signal, the RS flip-flop composed of the 7-bit counter 52 and the NAND circuits 55 and 56 and the 6-bit counter circuit 58 are reset, and the count value of each counter is It becomes 0. Next, when the RST terminal of the microcomputer 59 becomes Low, the reset is released, and the 7-bit counter 52 starts counting and 7-bi as in the first embodiment.
The t-counter 52 counts until the count value reaches 127, and when it further counts by 1, it overflows and outputs a carry signal to the signal line 83. NA
The RS flip-flop formed by the ND circuits 55 and 56 is inverted, the clock is supplied to the 6-bit counter 58, the 6-bit counter starts counting and outputs the count value in 6-bit parallel, and this output value is output to the magnitude comparator 62. Is entered.

Next, the operation of the data selection circuit 61 will be described. The internal configuration of the data selection circuit 61 is shown in FIG. 7, and the timing chart is shown in FIG. The data selection circuit 61 is composed of an inverter, an AND circuit, and an OR circuit,
When the inputs AP0 and AP1 are both 0 (Low) (0 in decimal notation), the output INCOUT is 0 (Low) regardless of the inputs of DP0 and DP1. Next, if AP0 is 1 and AP1 is 0 (decimal 1), DP
Output INC only when both 0 and DP1 are 1 (High)
OUT becomes 1 (High), and becomes 0 in other cases. Next, when AP0 is 0 and AP1 is 1 (2 in decimal notation), the input of DP1 is output as it is INCOU
It is output to T. Next, both AP0 and AP1 are 1 (High
In the case of h) (3 in decimal notation), DP0, DP
Output INCOUT when any of 1 is 1 (High)
Becomes 1 (High).

Now, the output value of the output terminals of PD0 to PD7 of the vibration wave motor control microcomputer 59 is 48.
, AP0, AP1 of the data selection circuit 61
Since the input of each is 0 (Low), INCOUT
The output is always 0 (Low). Therefore, the adder circuit 60
INC input terminal is 0 (Low), and IP0 to IP
5 inputs PD0 to PD of the microcomputer 59
Since 12 which is a 1/4 value of 7 outputs is input, the output values of the output terminals of OP0 to OP5 of the adder circuit 60 become 12 and are input to the magnitude comparator 62, so that the count value of the 6-bit counter 58 is 12. Then, in the same manner as described in the first embodiment, the rising signal is output to the signal line 86 to invert the output of the D-flip-flop 64, and the 7-bit counter 52 and the NAND circuits 55 and 5 are connected.
The RS flip-flop composed of 6 and the 6-bit counter 58 are reset.

By repeating this operation, the D-flip-flop 6 has a frequency twice as high as the vibration wave motor driving frequency.
4 and outputs a vibration wave motor drive signal which is 90 degrees out of phase by the D-flip-flops 65 and 66. The EXCLUSIVE-OR circuit 69 generates the vibration wave motor according to the state of the DIR terminal of the vibration wave motor control microcomputer 59. Drive direction is determined, the ON terminal of the vibration wave motor control microcomputer 59 is 1 (High)
If so, the AND circuit 70 and 71 amplifies the vibration wave motor drive signal from the high-voltage power supply 72 for driving the vibration wave motor to power enough to drive the vibration wave motor by the power amplification circuits 73 and 74, and the matching coil 75 And 76 are applied to the electrodes 77a and 77b of the vibration wave motor 77,
The vibration wave motor 77 rotates.

Next, when the output value of PD0 to PD7 of the vibration wave motor control microcomputer 9 is 49, the AP0 input of the data selection circuit 61 becomes 1 (High) and the AP1 input becomes 0 (Low). , DP0,
The INCOUT output becomes 1 (High) only when both DP1 are 1 (High). If the output terminals Q of the D-flip-flops 67 and 68 are 0 (Low), both DP0 and DP1 of the data selection circuit 61 are 0.
Therefore, the output INCOUT becomes 0, and the adder circuit 60
Is input to INC, and IP0 to IP5 inputs are input with 12 which is a quarter of PD0 to PD7 output of the microcomputer 59. Therefore, OP0 to OP5 of the adder circuit 60 are input.
Since the output value of the output terminal is 12 and is input to the magnitude comparator 62, when the count value of the 6-bit counter 58 becomes 12, a rising signal is output to the signal line 86 and the output of the D-flip-flop 64 is inverted. When this is repeated for 3 cycles, D-flip-flops 67 and 68
When the output terminals Q of the respective switches become 1 (High), the INCOUT output of the data selection circuit 61 becomes 1 (High), the outputs of OP0 to OP5 of the addition circuit 60 become 13, and the count value of the 6-bit counter 58 becomes 13. Since the rising signal is output to the signal line 86 and the output of the D-flip-flop 64 is inverted, the period of the vibration wave motor drive signal is lengthened by one period of the oscillation signal of the oscillation circuit 51 and the frequency is lowered. When the inversion of the D-flip-flop 64 is repeated four times, the output terminals Q of the D-flip-flops 67 and 68 become 0 respectively. Assuming that the operation up to this point is one cycle, the driving frequency of the vibration wave motor is high by 3/4 of this, and the driving frequency of the vibration wave motor is lowered by 1/4, and the vibration wave motor 77 is substantially one of these two frequencies. In the meantime, the same operation as driving at a frequency lower than 3/4 is performed.

Next, when the output value of PD0 to PD7 of the vibration wave motor control microcomputer 9 is 50, the AP0 input of the data selection circuit 61 becomes 0 (Low) and the AP1 input becomes 1 (High). DP1 is 1
Only when (High), INCOUT output is 1 (High
h). Now, assuming that the output terminal Q of the D-flip-flop 68 is 0 (Low), the data selection circuit 61
DP1 is 0, the output INCOUT becomes 0,
0 is added to INC in the adder circuit 60, and 1/0 of PD0 to PD7 output of the microcomputer 60 is input to IP0 to IP5.
12, which is the value of 4, is input. Therefore, the adder circuit 6
The output value of the output terminal of OP0 to OP5 of 0 is 12,
6b because it is input to the magnitude comparator 62
When the count value of the it counter 58 reaches 12, the signal line 8
A rising signal is output to 6 to invert the output of the D-flip-flop 64. When this is repeated for two cycles, the output terminal Q of the D-flip-flop 68 becomes 1 (High), so the INCOUT output of the data selection circuit 61 becomes 1 (High).
h). Therefore, the outputs of OP0 to OP5 of the adding circuit 60 become 13, and when the count value of the 6-bit counter 58 becomes 13, a rising signal is output to the signal line 86 and the output of the D-flip-flop 64 is inverted.

In this way, the cycle of the vibration wave motor drive signal is lengthened by two cycles of the oscillation signal of the oscillation circuit 51 and the frequency is lowered. Invert the D-flip-flop 64 to 4
When repeated, the output terminal Q of the D-flip-flop 68 becomes 0. Assuming that the operation up to this point is one cycle, the driving frequency of the vibration wave motor is high by 1/2, and
The vibration wave motor drive frequency is lowered by 2, and the vibration wave motor 77 operates substantially as if it were driven at an intermediate frequency between these two frequencies.

Next, when the output value of PD0 to PD7 of the vibration wave motor control microcomputer 9 is 51, the AP0 and AP1 inputs of the data selection circuit 61 are 1 (Hi.
gh), and either DP0 or DP1 is 1 (High
In the case of h), the INCOUT output becomes 1 (High).
Now, assuming that the output terminals Q of the D-flip-flops 67 and 68 are 0 (Low), the data selection circuit 6
Since both DP0 and DP1 of 1 are 0, the output INCOU
T becomes 0, and 0 is added to INC and IP0 to IP0 in the adder circuit 60.
PD0 to P of the microcomputer 59 for IP5 input
12 which is a value of 1/4 of the D7 output is input.

Therefore, the output value of the output terminals of OP0 to OP5 of the adder circuit 60 becomes 12, and it is inputted to the magnitude comparator 62. Therefore, when the count value of the 6-bit counter 58 becomes 12, a rising signal is output to the signal line 86 and D- The output of the flip-flop 64 is inverted. When this is repeated for one cycle, either one of the output terminals Q of the D-flip-flops 67 and 68 becomes 1 (High), the INCOUT output of the data selection circuit 61 becomes 1 (High), and the addition circuit 60 outputs OP0 to OP5. The output is 13. Therefore, the count value of the 6-bit counter 58 is 1
When it becomes 3, the rising signal is output to the signal line 86 and the output of the D-flip-flop 64 is inverted, so that the cycle of the vibration wave motor drive signal is lengthened by one cycle of the oscillation signal of the oscillation circuit 51 and the frequency is lowered. D-flip-flop 6
When the inversion of 4 is repeated four times, the output terminals Q of the D-flip-flops 67 and 68 become 0 respectively. If the operation up to this point is one cycle, the driving frequency of the vibration wave motor is high by 1/4 of this, and the driving frequency of the vibration wave motor is lowered by 3/4, and the vibration wave motor 77 is substantially the same as these two frequencies. In the meantime, the same operation as driving at a frequency lower than about 1/4 is performed.

Up to this point, the description has been given for the case where the PD0 to PD7 outputs of the vibration wave motor control microcomputer 9 are 48 to 51. However, even when another value is output, the vibration wave motor drive is substantially driven. The frequency changes according to the output value. Therefore, as shown in FIG.
When the output value of PD7 is small, the vibration wave motor drive frequency becomes high, and when the output value is large, the vibration wave motor drive frequency becomes low. Therefore, the speed control of the vibration wave motor is performed by changing the output values of PD0 to PD7. be able to.

FIG. 15 is a schematic diagram showing the configuration of the third embodiment of the present invention. In the figure, 301 is a microcomputer for controlling the vibration wave motor, 302 is an 8-bit D / A converter which is connected to the microcomputer 301 and converts an 8-bit digital signal from the microcomputer into a 256-stage analog voltage signal. , 30
3 is connected to the 8-bit D / A converter 302 and is 8 bi
A variable frequency oscillator VCO (hereinafter abbreviated as VCO) whose oscillation frequency changes according to an input voltage from the tD / A converter, 304 is connected to the VCO 303 to connect to the VCO 303.
Frequency divider for dividing the oscillating frequency from
Is an inverter connected to the microcomputer 301 for inverting an output signal from the microcomputer, 306 is connected to the VCO 303 and the inverter 304, and the VCO 30 is connected when the output of the inverter 304 is High.
A NAND circuit 307 for inverting and outputting the signal from 3;
Is a NAN that is connected to the frequency divider 304 and the microcomputer 301 and inverts the signal from the frequency divider 304 and outputs it when the signal from the microcomputer is High.
D circuit, 308 is connected to NAND circuit 306 and is NAN
H when either D circuit 306 or 307 is Low
NAN forming a negative logic OR that outputs a high signal
D circuit.

Inverter 305 and NAND circuit 306-
A signal from the microcomputer 301 is L
Signal from VCO 303 depending on whether it is ow or High 4
A signal selection circuit that selects and outputs the signal from the frequency divider 304 is configured. A NAND circuit 30 is connected to the NAND circuit 308 and the microcomputer 301.
A vibration wave motor drive logic circuit for converting the signal from 8 into a signal for driving the vibration wave motor in accordance with the signal from the microcomputer 301, and 310 is a high voltage (about 30 V) necessary for driving the vibration wave motor. The voltage sources 311 and 312 for generating the voltage are connected to the vibration wave motor drive logic circuit 309 and the voltage source 310, and amplify the signals from the vibration wave motor drive logic circuit to the necessary level to drive the vibration wave motor. Circuits 313 and 314 are connected to the amplifier circuits 311 and 312, respectively, and matching coils for forming the signals from the amplifier circuits 311 and 312 into a form necessary for driving the vibration wave motor,
A vibration wave motor 315 is connected to the matching coils 313 and 314 to form a progressive vibration wave by signals from the matching coils 313 and 314. Electrodes A, 315 connected to a piezoelectric to create waves
Reference numeral b denotes an electrode B connected to a piezoelectric body for producing a progressive vibration wave necessary for driving, and 315c is connected to a sensor piezoelectric body for detecting the state of the progressive vibration wave generated on the vibration wave motor. The sensor electrode 315d is connected to the GND electrode GND, the reference electrode 316 is connected to the sensor electrode 315c of the vibration wave motor 315, and is used to convert an analog signal from the sensor electrode into a binary digital signal. Is.

FIG. 16 is a diagram showing the inside of the divide-by-4 frequency divider 304 of FIG. Reference numerals 317 and 318 denote D-flip-flops, and their inverted outputs / Q are connected to their respective data input terminals D. In addition, the signal before frequency division is input to the clock terminal, and one D-flip-flop outputs two signals.
It is configured to be divided.

FIG. 17 is a diagram showing the configuration of the vibration wave motor drive logic circuit 309 of FIG. 320 is a D-flip-flop for dividing the input signal by two, and 321 is D
-The signal divided by 2 in the flip-flop 320 is 90.
D-flip-flops 322 for forming signals of the same frequency with different phases are inverters 323 to 325 are NAND circuits. The inverter 322 and the NAND circuits 323 to 325 form a signal selection circuit, and operate or do not operate depending on whether the output of the D-flip-flop 321 is a normal output or an inverted output. AND circuits 326 and 327 are respectively connected to the D-flip flop 320 and the NAND circuit 325, and when the ON signal is High, the D-flip flop 3
20 and the output of the NAND circuit 325 are AO respectively.
Output to UT and BOUT.

Next, the operation of this embodiment having the above-mentioned structure will be described. In order to drive an oscillatory wave motor, generally, as shown in FIG.
An ultrasonic wave having a frequency higher than the audible frequency band, such as the vibration wave motor drive frequency band shown in FIG. 8, is used. This is for maximizing the characteristic of not driving noise, which is one of the characteristics of the vibration wave motor when the vibration wave motor is driven. The microcomputer outputs 8-bit data of the driving frequency to PD0 to PD7 in order to drive the vibration wave motor. This data is input to the D / A converter 302 and converted into an analog voltage, and this analog voltage is input to the variable frequency oscillator 303. The variable frequency oscillator 303 is an oscillator whose oscillation frequency changes according to the input voltage. The oscillation frequency increases when the analog input voltage is high, and the oscillation frequency decreases when the analog input voltage is low.

As shown in FIG. 18, the vibration wave motor has the characteristic that the higher the frequency in the specific drive frequency band, the lower the rotational speed, and the lower the frequency, the higher the rotational speed. 301 outputs data so that it changes from a high frequency to a low frequency. When the vibration wave motor is driven, the output of PC0 of the microcomputer is Low. Therefore, the vibration wave motor driving frequency signal generated by the variable frequency oscillator 303 is generated by the inverter 305 and the NAND circuits 306-3.
It is input to the vibration wave motor driving logic circuit 309 through a data selector circuit composed of 08 and. The oscillation signal from the data selector, the oscillation wave motor drive direction signal from PC1 of the microcomputer, and the oscillation wave motor drive ON / OFF signal from PC2 are input to the oscillation wave motor drive logic circuit 309, and the oscillation wave motor drive ON / OFF signal is input.
OFF signal is High and vibration wave motor drive direction signal is H
When it is in the high state, a signal having a frequency 1/4 of the oscillation frequency of the variable frequency oscillator 303 is output to AOUT.
A signal which is output from BOUT and which has the same frequency as this output and which has a phase advanced by 90 degrees is output from BOUT to generate a signal for driving the vibration wave motor in the forward direction. Also, vibration wave motor drive ON /
OFF signal is High and vibration wave motor drive direction signal is L
When it is ow, AOUT outputs a signal having a frequency of 1/4 of the oscillation frequency, and BOUT outputs a signal having the same frequency as the output of AOUT but delayed by 90 degrees in phase,
Generates a signal that drives the oscillatory wave motor in the reverse direction. The two signals having a 90-degree phase difference generated here are amplified by the amplifier circuits 311 and 312 to a voltage required to drive the vibration wave motor, and the matching coils 313 and 3 are generated.
It is applied to the vibration wave motor 315 through 14 to form a progressive vibration wave on the vibration wave motor to rotate the vibration wave motor.

Next, a case where a signal sound is generated using the vibration wave motor 315 will be described. As in the case of driving the vibration wave motor, the microcomputer 301 is PD0
~ PD7 outputs 8-bit data of signal sound. The 8-bit data is input to the D / A converter 302, converted into an analog voltage, and output. This analog signal is input to the variable frequency oscillator 303 and oscillates a frequency in the same frequency band as when the vibration wave motor is driven. The signal generated here is input to the divide-by-four circuit 304, and the frequency is set to 1
Make a / 4 signal. When the signal sound is generated, the output of PC0 of the microcomputer 301 is High, and the inverter 305 and the NAND circuits 306 to 3 are used.
The signal select circuit composed of 08 and
The signal from No. 4 is selected and input to the vibration wave motor driving logic circuit 309. The frequency of this signal is 1/4 of the frequency when driving the vibration wave motor. This signal is input to the vibration wave motor drive logic circuit 309.
The vibration wave motor drive logic circuit 309 is connected to a vibration wave motor ON / OFF signal output PC1 and a vibration wave motor rotation direction signal output PC2 of the microcomputer 301. Vibration wave motor ON / OFF signal output When the PC1 is High, the vibration wave motor drive logic circuit 309
In AOUT and BOUT, AOUT and BOU have a frequency ¼ of the frequency of the signal input from the signal select circuit.
Signals whose phases between T are different by 90 degrees are output.

The frequency of this signal is a quarter of the frequency when driving the vibration wave motor, and as shown in FIG. 18, the frequency is set so that the vibration wave motor drive frequency is driven in the vicinity of 30 KHz. If set in advance, it will be around 7.5 KHz. This signal is amplified by the amplifier circuits 311 and 312 and applied to the vibration wave motor 315 via the matching coils 313 and 314.

When an audible frequency is applied to the vibration wave motor 315, the vibration wave motor 315 vibrates at the applied frequency to generate an audible sound. The frequency at this time does not rotate the vibration wave motor as shown in FIG. Therefore, by controlling the vibration wave motor ON / OFF signal of the microcomputer 1, a signal sound is generated without driving the vibration wave motor.

[0054]

As described above, a signal having a frequency higher than the driving frequency of the vibration wave motor is oscillated as a basic by a highly accurate oscillation source such as a crystal oscillation that is strong against temperature changes, and this is divided by a counter or the like. The frequency is divided by a frequency divider, and the number of frequency divisions is changed to create a drive signal for driving the vibration wave motor, and the frequency of the drive signal is changed by alternating two frequencies for each cycle. Since it is possible to obtain the same effect as when the vibration wave motor is driven at the intermediate frequency, even if the frequency change amount for driving the vibration wave motor is rough, the same effect as this intermediate frequency can be obtained. Therefore, the original oscillation frequency can be lowered.

Further, by changing the ratio for selecting these two frequencies from 1 to 3 or 3 to 1 instead of 1 to 1 as described above, a plurality of intermediate frequencies of the two vibration wave motor drive frequencies can be obtained. Since it can be expressed in frequency, the original oscillation frequency can be further lowered. In this way, the vibration wave motor drive signal is created using only the digital circuit of the counter and the magnitude comparator for data comparison, and noise is generated by changing the vibration wave motor drive frequency at a speed extremely faster than the response speed of the vibration wave motor. It is resistant to environmental changes such as temperature, has a low original oscillation frequency, and can be configured only by the CMOS process when integrated into an IC.
Further, in the drive circuit of the present invention, a signal frequency can be easily output from the vibration wave motor by providing a circuit that divides the vibration wave motor drive frequency to an audible frequency and applying it to the vibration wave motor. Further, if the frequency dividing circuit is integrated into an IC together with the oscillatory wave motor driving logic, the cost is hardly increased, so that another signal sound generating means such as a buzzer is not required unlike the conventional case, and the number of parts is reduced.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a vibration wave motor drive circuit embodying the present invention.

FIG. 2 is a diagram showing the timing from the signal generator to the magnitude comparator when the PD0 output of the microcomputer 9 is 0 in the vibration wave motor drive circuit embodying the present invention.

FIG. 3 is a diagram showing the timing from the output of a magnitude comparator to the generation of a vibration wave motor drive signal in the vibration wave motor drive circuit embodying the present invention.

FIG. 4 is a diagram showing the timing when the PD0 output of the microcomputer 9 in the vibration wave motor drive circuit embodying the present invention is 1.

FIG. 5 is a diagram showing the timing from the signal generator to the magnitude comparator when the PD0 output of the microcomputer 9 is 1 in the vibration wave motor drive circuit according to the present invention.

FIG. 6 is a configuration diagram of a second vibration wave motor drive circuit embodying the present invention.

FIG. 7 is a configuration diagram of an internal data select circuit of a second vibration wave motor drive circuit embodying the present invention.

FIG. 8 is a diagram showing a timing of a second vibration wave motor drive circuit embodying the present invention.

FIG. 9 is a diagram showing the relationship between the output values of PD0 to PD7 of the microcomputer 9 of the second vibration wave motor drive circuit embodying the present invention and the vibration wave motor drive frequency.

FIG. 10 is a configuration diagram of a conventional vibration wave motor drive circuit.

FIG. 11 is a diagram showing the frequency of the drive signal applied to the vibration wave motor and the rotation speed of the vibration wave motor.

FIG. 12 is a diagram showing inputs and outputs of a D / A converter of a conventional vibration wave motor drive circuit.

FIG. 13 is a diagram showing an input and an output of a variable frequency oscillator (VCO) of a conventional vibration wave motor drive circuit.

FIG. 14 is a diagram showing a timing of a conventional vibration wave motor drive circuit.

FIG. 15 is a configuration diagram of a vibration wave motor drive circuit embodying the present invention.

16 is a detailed view of the divide-by-four circuit shown in FIG.

17 is a diagram showing the vibration wave motor logic circuit shown in FIG.

FIG. 18 is a diagram showing an applied frequency and a rotation speed of a vibration wave motor.

FIG. 19 is a diagram showing a conventional oscillatory wave motor drive circuit.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Signal generator 2 ... 8-bit counter 5,6 ... AND circuit which comprises RS flip-flop 8 ... Bit counter 9 ... Microcomputer 10 ... Addition circuit 12 ... Magnitude comparator 14, 15, 16, 17 ... D-flip-flop 21 High-voltage power supply 22, 23 ... Power amplifier 26 ... Oscillation wave motor 51 ... Signal generator 52 ... 7-bit counter 55, 56 ... AND circuit forming RS flip-flop 58 ... 6-bit counter 59 ... Microcomputer 60 ... Addition circuit 61 ... Data Selection circuit 62 ... Magnitude comparator 64, 65, 66, 67, 68 ... D-flip-flop 72 ... High-voltage power supply 73, 74 ... Power amplifier 77 ... Vibration wave motor 101 ... Microcomputer 102 ... D / A converter 103 ... Variable frequency oscillation Unit (VCO) 104, 105, 106 ... D-flip-flop 110 ... High-voltage power supply 111, 112
Power amplifier 115 Vibration wave motor 301 Microcomputer 302 D / A converter 303 Variable frequency oscillator 304 Frequency division circuit 309 Vibration wave motor drive logic 315 Vibration wave motor

Claims (2)

[Claims] 1. In a drive circuit of a vibration wave motor for moving an object using a progressive vibration wave, a fixed frequency oscillation means higher than a frequency for driving the vibration wave motor, and a signal generated by the oscillation means. Counting means for counting
Means for comparing the input data with the count value from the counting means and outputting a signal indicating that the count value is equal to or greater than the input data, and a frequency for driving the vibration wave motor by the output signal A first means for generating a signal, and a first means for driving the vibration wave motor at a frequency between the count value n and the frequency obtained by the count value n + 1 by changing the frequency signal faster than the response speed of the vibration wave motor. Driving the vibration wave motor by changing the input data for comparing the count value of the counter for counting the signal oscillated by the oscillating means with the second means and selecting the first means or the second means. An oscillatory wave motor drive circuit comprising: means for changing the frequency. 2. A drive circuit for a vibration wave motor for moving an object using a progressive vibration wave, wherein an ultrasonic frequency signal generating means for driving the vibration wave motor, an audible frequency signal generating means, Frequency signal selecting means for selecting one of the two frequency signals, and generation of a signal sound for generating a signal sound from a vibration wave motor when the ultrasonic signal is selected and the object is moved and when an audible frequency is selected. And a vibration wave motor drive circuit.