JPH05183964A - Monitor signal read-in circuit - Google Patents
Monitor signal read-in circuitInfo
- Publication number
- JPH05183964A JPH05183964A JP3360742A JP36074291A JPH05183964A JP H05183964 A JPH05183964 A JP H05183964A JP 3360742 A JP3360742 A JP 3360742A JP 36074291 A JP36074291 A JP 36074291A JP H05183964 A JPH05183964 A JP H05183964A
- Authority
- JP
- Japan
- Prior art keywords
- monitor
- signal
- read
- signals
- buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Maintenance And Management Of Digital Transmission (AREA)
- Selective Calling Equipment (AREA)
Abstract
Description
【0001】[0001]
【産業上の利用分野】本発明は、モニタ信号読み込み回
路に関し、特にドライ接点モニタ信号を読み込むための
モニタ信号読み込み回路に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitor signal reading circuit, and more particularly to a monitor signal reading circuit for reading a dry contact monitor signal.
【0002】[0002]
【従来の技術】従来のモニタ信号読み込み回路の例を図
2に示す。モニタ信号M1及びモニタ共通信号M1aに
入力されるドライ接点モニタ信号は、バッファ20の読
み込み信号R1によりデータD1として読み込まれる。
同様に、モニタ信号M2及びモニタ共通信号M2a〜モ
ニタ信号M8及びモニタ共通信号M8aまでは、バッフ
ァ20によりデータとして読み込まれる。それ以降のモ
ニタ信号M9からは、新たなバッファ21にデータとし
て読み込まれる。16を越えるモニタ項目に対してはバ
ッファを増やすことで対処する。2. Description of the Related Art FIG. 2 shows an example of a conventional monitor signal reading circuit. The dry contact monitor signal input to the monitor signal M1 and the monitor common signal M1a is read as data D1 by the read signal R1 of the buffer 20.
Similarly, the monitor signal M2 and the monitor common signal M2a to the monitor signal M8 and the monitor common signal M8a are read as data by the buffer 20. The subsequent monitor signal M9 is read into the new buffer 21 as data. The monitor items exceeding 16 are dealt with by increasing the buffer.
【0003】[0003]
【発明が解決しようとする課題】上述したような従来の
モニタ信号読み込み回路では、8項目のモニタ信号に対
して1個のバッファを必要としていたため、多項目のモ
ニタ信号の場合には回路が大規模でかつ複雑になるとい
った問題点があった。In the conventional monitor signal reading circuit as described above, one buffer is required for the monitor signals of eight items, and therefore the circuit is required for the monitor signals of many items. There was a problem that it became large and complicated.
【0004】本発明は、上記問題点にかんがみてなされ
たもので、多項目のモニタ信号を1個のバッファで読み
込むことができるモニタ信号読み込み回路の提供を目的
とする。The present invention has been made in consideration of the above problems, and an object of the present invention is to provide a monitor signal reading circuit capable of reading multi-item monitor signals with a single buffer.
【0005】[0005]
【課題を解決するための手段】上記目的を達成するため
に本発明のモニタ信号読み込み回路は、ドライ接点にて
入力される複数のモニタ信号とモニタ共通信号のうち、
一方を直接バッファに接続し、他方を読み込み信号を介
して前記バッファに接続してマトリクス状に配線し、前
記モニタ信号とモニタ共通信号の一方を読み込み信号に
より制御して読み込む構成としてある。In order to achieve the above object, the monitor signal reading circuit of the present invention includes a plurality of monitor signals and a monitor common signal input at a dry contact.
One of them is directly connected to the buffer, the other is connected to the buffer via a read signal and wired in a matrix, and one of the monitor signal and the monitor common signal is controlled and read by the read signal.
【0006】[0006]
【作用】本発明では、バッファに対してマトリクス状に
配線接続したモニタ信号とモニタ共通信号の一方を読み
込み信号を制御することによりバッファへの読み込みを
行う。According to the present invention, one of the monitor signal and the monitor common signal, which are wired to the buffer in a matrix, is read into the buffer by controlling the read signal.
【0007】[0007]
【実施例】以下、本発明の一実施例について図面を参照
して説明する。図1は本発明の一実施例によるモニタ信
号読み込み回路の構成ブロック図である。図1に示すよ
うに、本モニタ信号読み込み回路では、モニタ信号M1
とモニタ信号M9、モニタ信号M2とモニタ信号M1
0、以下モニタ信号M8とモニタ信号M16までをそれ
ぞれ共通の信号線によってバッファ1に接続している。DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a configuration block diagram of a monitor signal reading circuit according to an embodiment of the present invention. As shown in FIG. 1, in the present monitor signal reading circuit, the monitor signal M1
And monitor signal M9, monitor signal M2 and monitor signal M1
0, hereinafter monitor signals M8 and M16 are connected to the buffer 1 by common signal lines.
【0008】また、モニタ信号M1及びモニタ共通信号
M1aのドライ接点モニタ信号のうちモニタ共通信号M
1a、同様にモニタ共通信号M2aからモニタ共通信号
M8aまでを読み込み信号R1に接続し、モニタ共通信
号M9aからモニタ共通信号M16aまでを読み込み信
号R2に接続している。さらに、バッファ1には、デー
タD1からデータD8及び読み込み可能信号2が接続さ
れている。Of the dry contact monitor signals of the monitor signal M1 and the monitor common signal M1a, the monitor common signal M
1a, similarly the monitor common signal M2a to the monitor common signal M8a are connected to the read signal R1, and the monitor common signal M9a to the monitor common signal M16a are connected to the read signal R2. Further, the buffer 1 is connected with the data D1 to the data D8 and the readable signal 2.
【0009】以上のように、モニタ信号をマトリクス状
に配置し、読み込み信号R1及び読み込み信号線R2を
読み込み可能信号2に合せて順次制御することにより、
バッファ1を通してデータD1からデータD8として読
み込むことができるようになる。このようにモニタ共通
信号を読み込み信号R1及びR2によって制御するよう
にしたので、一個のバッファ1で多項目のモニタ信号を
読み込むことができるようになる。なお、モニタ信号と
しては、例えば同期信号(モニタ共通信号)とモーメン
タリ信号(モニタ信号)や、フォトカプラのコレクタ及
びエミッタ出力信号等が使用される。As described above, by arranging the monitor signals in a matrix and sequentially controlling the read signal R1 and the read signal line R2 in accordance with the read enable signal 2,
The data D1 to the data D8 can be read through the buffer 1. Since the monitor common signal is controlled by the read signals R1 and R2 as described above, it becomes possible to read the monitor signals of many items with one buffer 1. As the monitor signal, for example, a synchronization signal (monitor common signal) and a momentary signal (monitor signal), a collector and emitter output signal of a photocoupler, etc. are used.
【0010】[0010]
【発明の効果】以上説明したように、本発明のモニタ信
号読み込み回路では、ドライ接点のモニタ信号をマトリ
クス状に配線し、モニタ信号の片方を読み込み信号で制
御することで、多項目のモニタ信号を1個のバッファで
読み込み処理できる効果が得られる。As described above, in the monitor signal reading circuit of the present invention, the monitor signals of the dry contacts are wired in a matrix, and one of the monitor signals is controlled by the read signal, so that the monitor signals of many items can be obtained. It is possible to obtain an effect of reading and processing with a single buffer.
【図1】本発明の一実施例によるモニタ信号読み込み回
路の構成ブロック図である。FIG. 1 is a configuration block diagram of a monitor signal reading circuit according to an embodiment of the present invention.
【図2】従来のモニタ信号読み込み回路の構成ブロック
図である。FIG. 2 is a configuration block diagram of a conventional monitor signal reading circuit.
1…バッファ 2…読み込み可能信号 M1〜M16…モニタ信号 M1a〜M16a…モニタ共通信号 R1,R2…読み込み信号 1 ... Buffer 2 ... Readable signal M1-M16 ... Monitor signal M1a-M16a ... Monitor common signal R1, R2 ... Read signal
Claims (1)
信号とモニタ共通信号のうち、一方を直接バッファに接
続し、他方を読み込み信号を介して前記バッファに接続
してマトリクス状に配線し、前記モニタ信号とモニタ共
通信号の一方を読み込み信号により制御して読み込む構
成としたことを特徴とするモニタ信号読み込み回路。1. One of a plurality of monitor signals and a monitor common signal input at a dry contact is directly connected to a buffer, and the other is connected to the buffer via a read signal and wired in a matrix. A monitor signal reading circuit, characterized in that one of the monitor signal and the monitor common signal is read by being controlled by a read signal.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3360742A JPH05183964A (en) | 1991-12-27 | 1991-12-27 | Monitor signal read-in circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP3360742A JPH05183964A (en) | 1991-12-27 | 1991-12-27 | Monitor signal read-in circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH05183964A true JPH05183964A (en) | 1993-07-23 |
Family
ID=18470726
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP3360742A Pending JPH05183964A (en) | 1991-12-27 | 1991-12-27 | Monitor signal read-in circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH05183964A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8354976B2 (en) | 1998-07-15 | 2013-01-15 | Seiko Epson Corporation | Method and adjusting device for projection-type display |
-
1991
- 1991-12-27 JP JP3360742A patent/JPH05183964A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8354976B2 (en) | 1998-07-15 | 2013-01-15 | Seiko Epson Corporation | Method and adjusting device for projection-type display |
US8395563B2 (en) | 1998-07-15 | 2013-03-12 | Seiko Epson Corporation | Method and adjusting device for projection-type display |
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