JPS6020610U - programmable controller - Google Patents

programmable controller

Info

Publication number
JPS6020610U
JPS6020610U JP11000683U JP11000683U JPS6020610U JP S6020610 U JPS6020610 U JP S6020610U JP 11000683 U JP11000683 U JP 11000683U JP 11000683 U JP11000683 U JP 11000683U JP S6020610 U JPS6020610 U JP S6020610U
Authority
JP
Japan
Prior art keywords
input
unit
sequence program
memory
decoding unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11000683U
Other languages
Japanese (ja)
Inventor
直樹 佐野
Original Assignee
横河電機株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 横河電機株式会社 filed Critical 横河電機株式会社
Priority to JP11000683U priority Critical patent/JPS6020610U/en
Publication of JPS6020610U publication Critical patent/JPS6020610U/en
Pending legal-status Critical Current

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Landscapes

  • Executing Machine-Instructions (AREA)
  • Programmable Controllers (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はプログラマブルコントローラにおける従来の構
成例を示した図、第2図は本考案にかかるプログラマブ
ルコントローラの一実施例の構成ブロック図、第3図は
第2のメモリ部のメモリアドレスの割付を示した図であ
る。 10・・・入力部、50・・・第1のメモリ部、60・
・・論理解読部、70・・・入力制御部。
FIG. 1 is a diagram showing a conventional configuration example of a programmable controller, FIG. 2 is a configuration block diagram of an embodiment of the programmable controller according to the present invention, and FIG. 3 is a diagram showing the allocation of memory addresses in the second memory section. FIG. DESCRIPTION OF SYMBOLS 10... Input part, 50... First memory part, 60...
...Logic decoding section, 70... Input control section.

Claims (1)

【実用新案登録請求の範囲】 複数の入力モジュールにより構成される入力部から、2
値状態示とる信号を入力情報として入力し、この入力情
報を参照しながらシーケンスプログラムを実行するプロ
グラマブルコントローラにおいて、 前記シーケンスプログラムとこのシーケンスプログラム
の処理に関連した情報を格納する第1のメモリ部と、シ
ーケンスプログラムの解読および演算を行なう論理解読
部と、前記入力部から9人力情報を格納する第2のメモ
リを有し前記論理解読部と独立に動作する入力制御部と
を具備し、前記論理解読部により前記入力部から前記第
2のメモリ部に読み込みが必要な複数入力モジュールの
アドレスを一旦まとめてセットした後、前記入力制御部
により前記第2のメモリ部にセットされた入力モジュー
ルのアドレスに基づいて入力部から第2のメモリ部へ入
力データを読み込む動作と、前記論理解読部によるシー
ケンスプログラムの前処理の動作とを並列に実行させる
ようにしたことを特徴とするプログラマブルコントロー
ラ。
[Scope of claim for utility model registration] From an input section composed of a plurality of input modules, two
A programmable controller that receives a signal indicating a value state as input information and executes a sequence program while referring to this input information, comprising: a first memory section that stores the sequence program and information related to processing of the sequence program; , comprising a logic decoding unit that decodes and operates a sequence program, and an input control unit that operates independently of the logic decoding unit and has a second memory that stores human input information from the input unit, and the input control unit operates independently of the logic decoding unit. After the decoding unit once sets the addresses of multiple input modules that need to be read from the input unit to the second memory unit, the address of the input module is set in the second memory unit by the input control unit. A programmable controller characterized in that an operation of reading input data from an input unit to a second memory unit based on the above and an operation of preprocessing a sequence program by the logic decoding unit are executed in parallel.
JP11000683U 1983-07-15 1983-07-15 programmable controller Pending JPS6020610U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11000683U JPS6020610U (en) 1983-07-15 1983-07-15 programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11000683U JPS6020610U (en) 1983-07-15 1983-07-15 programmable controller

Publications (1)

Publication Number Publication Date
JPS6020610U true JPS6020610U (en) 1985-02-13

Family

ID=30256028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11000683U Pending JPS6020610U (en) 1983-07-15 1983-07-15 programmable controller

Country Status (1)

Country Link
JP (1) JPS6020610U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56164404A (en) * 1980-05-23 1981-12-17 Hitachi Ltd Sequence controller

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS56164404A (en) * 1980-05-23 1981-12-17 Hitachi Ltd Sequence controller

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