JP2687679B2 - Program development equipment - Google Patents

Description

The present invention relates to a program development device, and more particularly to a microcomputer program development device.

[Conventional technology]

In a conventional program development device, after the instructions to be executed by the microcomputer are converted into machine language on other equipment and then transferred to the program development device to debug the program, the microcomputer stores data other than the instructions. If this data is also created and transferred on another device when accessed from a terminal other than the terminal for accessing an instruction, this development apparatus has a configuration as shown in FIG.

When all the switches select the side B in FIG. 3 (1), the microprocessor (MPU) 1 fetches the content of the memory 2 as an instruction and executes it, while accessing the content of the memory 3. . At this time, the signal B is set to the high level and the outputs of NOR4 and NOR5 are set to the low level so that both the memories 2 and 3 are active. Now, when writing data in the memories 2 and 3, all the switches are connected to the A side. The data to be transferred is generated as separate blocks, and the signal A1 is set to the high level in the memory 2 when the command data is sent, and the signal A2 is set to the high level in the memory 3 when other data is sent. These command data and other data are created by the information processing device 7 in which the language processing program operates in the program development environment shown in FIG. 3B, saved as separate files, and transferred to the program development device 6, respectively.
At the time of transfer, as described above, the memory is selected by the command input or the like provided by the program development apparatus 6, and then executed.

[Problems to be solved by the invention]

In the conventional example, the data had to be created separately and then transferred separately. It was also necessary to select the memory when transferring.

[Means for solving the problem]

A program development apparatus of the present invention includes a first terminal group for reading first data and a second terminal group provided independently of the first terminal group for reading second data. A first memory for storing the first data, a second memory for storing the second data, and the first and second memories for storing the first and second memories. A switch provided between a common bus provided to write data, the first memory and the second memory, the first terminal group and the second terminal group, and the common bus, When writing the first data and the second data to the first memory and the second memory, respectively, the common bus is connected to the first and the second memories, and the microcomputer is connected to the first data. And the second A switch for connecting the first terminal group and the second group of terminals to each of the first memory and the second memory when the read data, 1
The first stored in consecutive addresses of one file
And a means for transferring the second data, wherein at least the first data is written in the first memory and at least the second data is written in the second memory by the means. Is characterized by.

〔Example〕

FIG. 1 shows an embodiment of the present invention. 1 is a microcomputer, 2 and 3 are memories, and the addresses 2 and 3 of the memories 2 and 3 can be selected to be connected to the outside or the microcomputer. Although this is represented by an interlocking switch in the drawing, it is composed of a gate circuit in an actual circuit. Address bus from the outside is exactly the same memory 2,3
And the memories 2 and 3 have the same capacity. When the switch is connected to the A side and the data is written while changing the address, the same data is written in the memories 2 and 3. The data to be written from the outside includes an instruction of the microcomputer 1 and other data, and it is assumed that the data is divided into two in the address range and transferred as continuous data. In this case, if the data is written without any special processing, the same data is written in the memories 2 and 3 as shown in FIG. Figure 2 shows 7FF in the memory of FFFH (4096 in decimal)
It shows the area of data in the memory when 7FF (2048) other data is transferred following the (2048 decimal) instruction data.

When the switch is turned to the B side, the memories 2 and 3 are connected to different terminals of the microcomputer 1 and read out independently. For example, only the instruction is read from the memory 2 and only the other data is read from the memory 3.
However, you can transfer the data only by sending one file once.

FIG. 4 shows a memory area diagram when the most significant bit of the address of the memory 3 is inverted and transferred to the memory 2. In this case, when the data other than the instruction of the memory 3 is accessed from the microcomputer 1 after the data transfer, the lower address area can be used unlike FIG.

Furthermore, in this case, if the memory size of 1/2 is used for both the memories 2 and 3 and the most significant digit is applied to the chip select, it is as if they were transferred separately in the conventional example as shown in FIG. The contents can be divided for each memory. A circuit diagram in this case is shown in FIG. However, in this case, the instruction data and the other data have the same size and a size of 2 ⁿ (2 ¹¹ = 2048 in FIG. 5), so that they are clearly separated.

〔The invention's effect〕

As described above, in the present invention, the microcomputer can separately read the data from the plurality of memories in which the instruction data and the other data are written in the same address space, and the same data can be simultaneously stored in the plurality of memories. Since the data can be written, there is an effect that data transfer to the program development apparatus only needs to create one file and perform the transfer operation once.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a circuit block diagram of a first embodiment of the present invention, and FIG.
The figure is a memory area diagram showing the contents of the memory after data transfer in the first embodiment. FIG. 3 is a diagram for explaining a conventional example, FIG. 3 (1) is a circuit diagram in the program development device, and FIG. 3 (2) is a diagram of the entire program development environment. FIG. 4 is a memory area diagram when an address from the outside of the memory 3 is inverted in the first embodiment. FIG. 5 is a memory area diagram after data transfer by the circuit of FIG. 6 as a second embodiment. FIG. 6 is a circuit block diagram of a second embodiment of the present invention. 1 ... Microcomputer, 2 ... memory, 3 ... memory, 4 ... NOR, 5 ... NOR, 6 ... program development device, 7 ... language processing information processing device.

Claims (4)

(57) [Claims] 1. A micro having a first terminal group for reading first data and a second terminal group provided independently of the first terminal group for reading second data. A computer, a first memory for storing the first data, and a second memory for storing the second data,
A common bus provided to write the first and second data to the first and second memories, the first memory and the second memory, the first terminal group and the second terminal A switch provided between the group and the common bus, wherein when writing the first data and the second data to the first memory and the second memory, respectively, the common bus and the first and the second memory Two memories are connected, and when the microcomputer reads the first data and the second data, the first terminal group and the second terminal group are respectively connected to the first memory and the second memory. A switch connected to the memory, the first data and the second data stored at consecutive addresses of one file.
And a means for transferring the data, wherein at least the first data is written in the first memory and at least the second data is written in the second memory by the means. apparatus. 2. The program development apparatus according to claim 1, wherein the first data and the second data are written in common in each of the first memory and the second memory. 3. The first and second data are written in the first memory, and the address of at least part of the first and second data is changed in the second memory. The first and second data after the
The program development apparatus according to claim 1, wherein the program is written in a corresponding address of the memory. 4. The first memory is written with only the first data out of the first and second data commonly supplied, and the second memory is commonly supplied with the first data. The program development device according to claim 1, wherein only the second data is written out of the first and second data.