JPS57182859A - Monitor device for programmable controller - Google Patents

Monitor device for programmable controller

Info

Publication number
JPS57182859A
JPS57182859A JP56069194A JP6919481A JPS57182859A JP S57182859 A JPS57182859 A JP S57182859A JP 56069194 A JP56069194 A JP 56069194A JP 6919481 A JP6919481 A JP 6919481A JP S57182859 A JPS57182859 A JP S57182859A
Authority
JP
Japan
Prior art keywords
display part
data memory
points
key
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56069194A
Other languages
Japanese (ja)
Inventor
Yoshiki Yoshida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP56069194A priority Critical patent/JPS57182859A/en
Publication of JPS57182859A publication Critical patent/JPS57182859A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/32—Monitoring with visual or acoustical indication of the functioning of the machine
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3003—Monitoring arrangements specially adapted to the computing system or computing system component being monitored
    • G06F11/3037—Monitoring arrangements specially adapted to the computing system or computing system component being monitored where the computing system component is a memory, e.g. virtual memory, cache
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/3055—Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • Quality & Reliability (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Testing And Monitoring For Control Systems (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

PURPOSE:To monitor simultaneously internal states of an optional number of points in optional addresses of a data memory, by using the display part of the monitor device of a programmable controller. CONSTITUTION:The address number of a data memory 12 inputted from numeric keys of a key part 16 is led into a display converting circuit 21 through a key reading circuit 18, an address buffer 19, and an address buffer reading circuit 20 and is displayed on the data display part of a display part 17. Next, the mode for simultaneous monitor of two points is set by the operation of a set key A for plural points, and the address number of the data memory 12 for the second point is inputted by the operation of numeric keys and is displayed on the address display part of the display part 17, and the indicating signal for simultaneous monitor of two points and the state of the data memory 12 of PC are read out through a data memory reading circuit 24 by the operation of an indication key M and the indication of a PC state indicating circuit 22 respectively and are displayed on the decimal point display part of the data display part of the display part 17.
JP56069194A 1981-05-07 1981-05-07 Monitor device for programmable controller Pending JPS57182859A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56069194A JPS57182859A (en) 1981-05-07 1981-05-07 Monitor device for programmable controller

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56069194A JPS57182859A (en) 1981-05-07 1981-05-07 Monitor device for programmable controller

Publications (1)

Publication Number Publication Date
JPS57182859A true JPS57182859A (en) 1982-11-10

Family

ID=13395668

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56069194A Pending JPS57182859A (en) 1981-05-07 1981-05-07 Monitor device for programmable controller

Country Status (1)

Country Link
JP (1) JPS57182859A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119412A (en) * 1982-12-27 1984-07-10 Koyo Denshi Kogyo Kk Programmable controller

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54130849A (en) * 1978-04-03 1979-10-11 Nissan Motor Data bus monitor
JPS55118196A (en) * 1979-03-05 1980-09-10 Fuji Electric Co Ltd Signal indicator

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS54130849A (en) * 1978-04-03 1979-10-11 Nissan Motor Data bus monitor
JPS55118196A (en) * 1979-03-05 1980-09-10 Fuji Electric Co Ltd Signal indicator

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59119412A (en) * 1982-12-27 1984-07-10 Koyo Denshi Kogyo Kk Programmable controller

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