JPH05166722A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To uniformly control the film thickness of a thin film semiconductor layer formed over an insulating substrate with regard to an SOI substrate. CONSTITUTION:1) When a single crystal semiconductor layer 1A deposited over an insulating substrate by coating a projecting insulating film 2 formed over the substrate is ground to the top face of the projecting insulating film, a groove 5 having an insulating film on the bottom is formed in the single crystal semiconductor layer, and polishing is conducted by using an abrasive which grinds not an insulating film, but a semiconductor layer. 2) Included is the step to form the groove 5 so that its bottom may reach the insulating substrate. 3) Also included is the step to deposit an insulating film 6 on the bottom of the groove 5.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device formed on an SOI (Silicon on Insulator) substrate.

The SOI substrate is superior to the bulk substrate in terms of device characteristics and isolation between devices. Among them, the SOI by the bonding technique that can make good use of the good bulk crystallinity
Substrates are receiving attention.

This bonding technique is to obtain a Si active layer by bonding a single crystal silicon (Si) wafer having a thermal oxide film formed on its surface to a supporting substrate and then thinning the single crystal Si wafer. In recent years, with the miniaturization of semiconductor devices, this Si
Ultra-thin film SOI devices with an active layer thickness of 0.2 μm or less are required, and new technology for making the thickness of this ultra-thin Si active layer uniform is required.

[0004]

2. Description of the Related Art FIGS. 3A to 3E are sectional views for explaining a conventional method for manufacturing an SOI substrate. In FIG. 3A, a silicon dioxide (SiO ₂ ) film 2 is formed as an element isolation insulating film on the surface of the single crystal semiconductor substrate 1 by using the selective oxidation (LOCOS) method.

In FIG. 3B, SiO _{2 formed} by vapor phase epitaxy (CVD) as a flattening film covering the element isolation insulating film 2 on the substrate.
The film 3 is grown and the surface thereof is polished to be flattened. Figure 3
In (C), the surface of the flattening film 3 of the single crystal semiconductor substrate 1 is attached to the supporting substrate 4.

In FIG. 3 (D), most of the single crystal semiconductor substrate 1 is removed by ordinary grinding, and then the single crystal semiconductor layer 1A having a mirror-finished surface is obtained. Figure 3
In (E), the single crystal semiconductor layer 1A can be polished, but the element isolation insulating film 2 cannot be polished. The thin film single crystal semiconductor layer 1B is obtained by polishing. This is used as an active layer for element formation.

[0007]

In the conventional thin film SOI fabrication technique, when the single crystal semiconductor layer 1A is polished, first, a part of the element isolation insulating film 2 is exposed, but the element isolation insulating film is still exposed. Since the polishing rate is fast in the portion where 2 is not exposed, the single crystal semiconductor layer in the portion where the element isolation insulating film 2 is exposed is also slightly polished, so that the film thickness of the thin film semiconductor layer 1B is made uniform throughout the substrate. I couldn't control it.

An object of the present invention is to provide a method for uniformly controlling the film thickness of a thin film semiconductor layer formed on an insulating substrate.

[0009]

Means for Solving the Problems To solve the above problems, 1) a single crystal semiconductor layer (1A) deposited on a substrate is formed by covering a convex insulating film (2) formed on the insulating substrate. When polishing up to the upper surface of the convex insulating film, a groove having an insulating film at the bottom (5)
Is formed in the single crystal semiconductor layer, and the insulating film is not polished, and the semiconductor layer is polished by using a polishing agent, or 2) the groove (5) has the bottom portion of the insulating layer. 1) The method for manufacturing a semiconductor device according to 1), which includes a step of forming so as to reach the substrate, or 3) The above 1) or 2), which includes a step of depositing an insulating film 6 on the bottom of the groove 5. This is achieved by the method for manufacturing a semiconductor device.

[0010]

In the present invention, the groove reaching the flattening insulating film 2 is formed in the single crystal semiconductor layer 1A. By doing so, as the single crystal semiconductor layer 1A is polished, the polishing rate decreases as the insulating film 2 at the bottom of the groove approaches, so that the element isolation insulating film 2 is exposed in the exposed portion of the single crystal semiconductor layer. The amount of polishing is reduced. Therefore, the film thickness of the single crystal semiconductor layer in the entire substrate can be significantly improved as compared with the conventional example.

When the auxiliary insulating film is formed on the bottom of the groove, the surface of the auxiliary insulating film is brought closer to the upper end of the groove by the thickness of the auxiliary insulating film, which promotes a decrease in the polishing rate when the polishing end point is approached. it can.

[0012]

1 (A) to 1 (E) are sectional views for explaining an embodiment (1) of the present invention. In Figure 1 (A), the thickness is about 625 μm.
An initial oxide film 10 having a thickness of 40 nm is formed on the surface of the single crystal Si substrate 1 and then a SiO ₂ film 2 having a thickness of 240 nm is formed as an element isolation insulating film by using the LOCOS method.

In FIG. 1 (B), a CVD SiO ₂ film 3 having a thickness of about 800 nm is grown as a flattening film on the substrate so as to cover the element isolation insulating film 2 and the surface thereof is polished by about 400 nm to flatten it. Turn into.
In FIG. 1 (C), the surface of the flattening film 3 of the single crystal Si substrate 1 is bonded to the supporting substrate 4 made of Si. The bonding was performed by adhesion under a reduced pressure in a nitrogen atmosphere and then annealing at 1100 ° C for 30 minutes.

In FIG. 1D, the single crystal semiconductor substrate 1 is ground to about 600 μm, and then polished to about 20 μm by ordinary polishing to obtain a single crystal semiconductor layer 1A having a mirror-finished surface.
Then, using a normal lithography method, a groove 5 reaching the initial oxide film 10 is formed in the region of the dicing line in the single crystal semiconductor layer 1A.

In FIG. 1 (E), the single crystal semiconductor layer 1A can be polished, but the element isolation insulating film 2 cannot be polished. As a polishing method, polishing is performed using a polishing agent in which colloidal silica is slightly mixed in an amine aqueous solution. As a result, the single crystal semiconductor layer 1A was thinned until it coincided with the upper surface of the element isolation insulating film 2. As a result, a thin film single crystal semiconductor layer 1B having a uniform film thickness of 100 ± 6 nm could be obtained.

2 (A) to 2 (E) are sectional views for explaining an embodiment (2) of the present invention. 2A to 2C are similar to FIG. In FIG. 2 (D), the single crystal semiconductor substrate 1 is about 600 μm.
Then, the single-crystal semiconductor layer 1A having a mirror-finished surface is obtained by polishing the surface of the mirror-finished surface for about 20 μm.

Then, using the ordinary lithography method,
A groove 5 reaching the initial oxide film 10 is formed in the region of the dicing line in the single crystal semiconductor layer 1A. Then a thickness of 10
A 0 nm CVD SiO ₂ film is deposited and patterned to form an auxiliary insulating film 6 only on the bottom of the groove 5.

In FIG. 2 (E), the single crystal semiconductor layer 1 A was thinned to match the upper surface of the element isolation insulating film 2 by polishing with a polishing agent in which an aqueous solution of amine was mixed with colloidal silica. As a result, the film thickness is 100 ± 6 nm
Thus, a thin film single crystal semiconductor layer 1B having a uniform film thickness could be obtained.

Since the auxiliary insulating film 6 of the embodiment (2) has its surface aligned with the upper surface of the element isolation insulating film as described above, the auxiliary insulating film 6 promotes the reduction of the polishing rate at the portion near the polishing end point. belongs to.

In each of the above embodiments, the oxide film formed by the LOCOS method was used as the element isolation insulating film, but instead of this, the element isolation insulating film is formed by mesa-etching the single crystal semiconductor layer and then oxidizing it. Of course, the present invention can be applied to such cases.

[0021]

According to the present invention, the thickness of the thin film semiconductor layer formed on the insulating substrate can be controlled uniformly. As a result, we were able to contribute to the miniaturization of devices using SOI substrates and the improvement of their manufacturing yield.

[Brief description of drawings]

FIG. 1 is a sectional view of an embodiment (1) of the present invention.

FIG. 2 is a sectional view of an embodiment (2) of the present invention.

FIG. 3 is an explanatory diagram of a conventional example (3)

[Explanation of symbols]

1 Semiconductor substrate is a single crystal Si substrate 10 Initial oxide film is thermally oxidized SiO ₂ film 1A Single crystal semiconductor layer 1B is a thin film single crystal semiconductor layer 2 Element isolation insulating film is thermally oxidized SiO ₂ film 3 Flattening insulating film is CVD SiO ₂ film 4 Support substrate is Si substrate 5 Groove 6 Auxiliary insulating film

Claims (3)

[Claims] 1. A convex insulating film (2) formed on an insulating substrate
A groove (5) having an insulating film at the bottom is formed in the single crystal semiconductor layer when polishing the single crystal semiconductor layer (1A) deposited on the substrate to cover the upper surface of the convex insulating film. Then, the insulating film is not polished and the semiconductor layer is polished by using a polishing agent for polishing the semiconductor layer. 2. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of forming the groove (5) so that a bottom portion thereof reaches the insulating substrate. 3. The method of manufacturing a semiconductor device according to claim 1, further comprising the step of depositing an insulating film (6) on the bottom of the groove (5).