JPH05145221A - Manufacture of printed circuit board - Google Patents

Manufacture of printed circuit board

Info

Publication number
JPH05145221A
JPH05145221A JP30443591A JP30443591A JPH05145221A JP H05145221 A JPH05145221 A JP H05145221A JP 30443591 A JP30443591 A JP 30443591A JP 30443591 A JP30443591 A JP 30443591A JP H05145221 A JPH05145221 A JP H05145221A
Authority
JP
Japan
Prior art keywords
plating
wiring board
coupling agent
printed wiring
silane coupling
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30443591A
Other languages
Japanese (ja)
Inventor
Hiroshi Sogo
寛 十河
Tamao Kojima
環生 小島
Hisashi Nakamura
恒 中村
Junji Mizukoshi
淳二 水越
Nobuyasu Tanaka
暢容 田中
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP30443591A priority Critical patent/JPH05145221A/en
Publication of JPH05145221A publication Critical patent/JPH05145221A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Wiring (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)

Abstract

PURPOSE:To eliminate pits of a printed circuit board by applying silane-coupling agent to a plating resist layer to be copper-plated so that the resist surface may become hydrophilic to prevent bubbles from attaching. CONSTITUTION:Through holes 3 are opened in a glass-epoxy board 1 having copper foil on each side. After the whole surface is activated, electroless plating 4 is formed. Plating resist is applied in a circuit pattern on the board surface. After degreased and soft-etched, the board is immersed in an aqueous solution of a silane-coupling agent expressed by NH2C2H4NHC3H6Si(OCH3)3 to form a silane-coupling layer on the surface of the board. Copper plating 7 is applied to the board where the resist does not exist. After solder plating 8 is applied to the copper plating, the plating resist is removed, and then excess copper plating is removed using aqueous ammonium chloride.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は印刷配線板の製造方法に
関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a printed wiring board.

【0002】[0002]

【従来の技術】印刷配線板の製造方法としてパターンめ
っき工法がある。以下にパターンめっき工法による印刷
配線板の製造方法を説明する。まず、表裏両面に銅はく
が張り合わされたガラスエポキシ基板に、スルーホール
を形成する。次に基板全面を活性化処理した後、無電解
銅めっきを施し無電解銅めっき膜を形成する。次に基板
全面にドライフィルムを貼りつけ、回路図形状に露光・
現像を行い、めっきレジストを形成し、電気銅めっき法
により電気銅めっき膜を形成する。次に電気銅めっき膜
上に電気半田めっき法により電気半田めっき膜を形成し
た後、ドライフィルムを剥離除去し、次に不要な銅はく
をエッチング除去して印刷配線板を製造する。
2. Description of the Related Art As a method of manufacturing a printed wiring board, there is a pattern plating method. The method for producing a printed wiring board by the pattern plating method will be described below. First, through holes are formed in a glass epoxy substrate having copper foil adhered to both front and back surfaces. Next, after activating the entire surface of the substrate, electroless copper plating is performed to form an electroless copper plated film. Next, attach a dry film on the entire surface of the substrate and expose it in a circuit diagram.
Development is performed to form a plating resist, and an electrolytic copper plating film is formed by the electrolytic copper plating method. Next, after forming an electric solder plating film on the electric copper plating film by an electric solder plating method, the dry film is peeled and removed, and then unnecessary copper foil is etched and removed to manufacture a printed wiring board.

【0003】この工法の中で電気銅めっき膜形成工程は
脱脂工程、無電解銅めっき膜のソフトエッチング工程、
酸洗い工程、電気銅めっきから構成され、電気銅めっき
膜の被めっき素地である無電解銅めっき膜の表面処理
後、電気銅めっきを行っている。
In this method, the electrolytic copper plating film forming step is a degreasing step, a soft etching step of the electroless copper plating film,
An electrolytic copper plating is performed after a surface treatment of an electroless copper plating film which is a base material to be plated of the electrolytic copper plating film, which is composed of an acid washing step and electrolytic copper plating.

【0004】[0004]

【発明が解決しようとする課題】このようにパターンめ
っき法により印刷配線板を製造した場合、電気めっきの
際、電気めっき液の攪拌及び光沢剤等の添加剤の分解防
止を目的に行っているエアーレーションや添加剤として
含まれる界面活性剤の発泡により発生する気泡がめっき
レジスト(ドライフィルム)に付着し、電気めっき膜の
成長を阻害し、電気めっき膜厚を低下させるピット不良
を起こすという問題がある。
When the printed wiring board is manufactured by the pattern plating method as described above, the purpose is to stir the electroplating solution and prevent the decomposition of additives such as a brightener during electroplating. Bubbles generated by aeration and foaming of the surfactant contained as an additive adhere to the plating resist (dry film), hinder the growth of the electroplated film, and cause pit defects that reduce the electroplated film thickness. There is.

【0005】以下に図8から図11の図面を用いてピッ
ト発生のメカニズムを説明する。図8から図11はピッ
トの発生を段階的に示した断面図である。
The mechanism of pit generation will be described below with reference to FIGS. 8 to 11. 8 to 11 are sectional views showing generation of pits in stages.

【0006】図8に示すように銅はく10を張ったガラ
スエポキシ材9の表面に無電解銅めっき膜11を形成し
た印刷配線板に回路図形状にめっきレジスト12を形成
し電気銅めっき液に浸漬を行うと、めっきレジスト12
の濡れ性が低いためにめっきレジスト12表面や図9に
示すようにめっきレジスト12断面に気泡13が付着す
る。このように気泡13が付着した状態で電気めっきを
行うと図10に示すように気泡13付着部分で電気銅め
っき14の析出阻害が起こり、図11に示すように電気
銅めっき膜14の異常部ができる。これがピット15不
良であり膜厚の低下によって断線等の印刷配線板におけ
る性能不良の原因となっている。
As shown in FIG. 8, a plating resist 12 is formed in a circuit diagram shape on a printed wiring board in which an electroless copper plating film 11 is formed on the surface of a glass epoxy material 9 on which a copper foil 10 is spread, and an electrolytic copper plating solution is formed. When the plating resist 12 is dipped in
Due to its low wettability, bubbles 13 adhere to the surface of the plating resist 12 and the cross section of the plating resist 12 as shown in FIG. When the electroplating is performed in the state where the bubbles 13 are adhered in this way, the deposition of the electrolytic copper plating 14 is inhibited at the portion where the bubbles 13 are adhered as shown in FIG. You can This is a defect in the pit 15 and is a cause of poor performance in the printed wiring board such as disconnection due to reduction in film thickness.

【0007】[0007]

【課題を解決するための手段】この問題を解決するため
に本発明の印刷配線板の製造方法は、パターンめっき法
において、めっきレジスト層を形成する工程後、電気銅
めっき工程前に少なくともめっきレジスト層表面をめっ
きレジスト表面に存在する官能基と結合する官能基と親
水性を有するシランカップリング剤により処理すること
を特徴とするものである。
In order to solve this problem, a method for manufacturing a printed wiring board of the present invention is a pattern plating method, in which at least the plating resist is formed after the step of forming the plating resist layer and before the electrolytic copper plating step. It is characterized in that the surface of the layer is treated with a silane coupling agent having a hydrophilicity with a functional group bonded to the functional group present on the surface of the plating resist.

【0008】[0008]

【作用】本発明によれば、シランカップリング剤によっ
て電気銅めっき前に処理することによりめっきレジスト
の表面が親水化され気泡の付着がなくなり、電気めっき
膜の成長阻害がなくなってピット不良を無くすことがで
きる。
According to the present invention, the surface of the plating resist is hydrophilized by the treatment with the silane coupling agent before the electrolytic copper plating to eliminate the adherence of bubbles, and the growth inhibition of the electroplated film is eliminated to eliminate the pit defect. be able to.

【0009】[0009]

【実施例】以下、本発明の一実施例の印刷配線板の製造
方法を図1〜図7の図面を用いて説明する。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A method of manufacturing a printed wiring board according to an embodiment of the present invention will be described below with reference to the drawings of FIGS.

【0010】(実施例1)図1〜図7はそれぞれ本発明
の一実施例における印刷配線板の製造方法を示す断面図
である。
(Embodiment 1) FIGS. 1 to 7 are sectional views showing a method of manufacturing a printed wiring board in an embodiment of the present invention.

【0011】まず、図1に示すように表裏両面に銅はく
2が張り合わされたガラスエポキシ基板1にスルーホー
ル3を形成した後、図2に示すように基板全面に活性化
処理して金属パラジウムからなる活性化層を形成し、そ
の後、以下の(表1)に示す条件で無電解銅めっきを施
し、1μmの厚さの無電解銅めっき膜4を形成する。次
に図3に示すように基板全面にドライフィルムを張りつ
け回路図形状に露光・現像を行い回路図形状のめっきレ
ジスト層5を形成する。
First, as shown in FIG. 1, through holes 3 are formed in a glass epoxy substrate 1 in which copper foils 2 are attached to both front and back surfaces, and then an activation treatment is applied to the entire surface of the substrate as shown in FIG. An activation layer made of palladium is formed, and then electroless copper plating is performed under the conditions shown in (Table 1) below to form an electroless copper plating film 4 having a thickness of 1 μm. Next, as shown in FIG. 3, a dry film is attached to the entire surface of the substrate and exposed and developed in a circuit diagram shape to form a plating resist layer 5 having a circuit diagram shape.

【0012】次に脱脂、ソフトエッチングを行った後、
NH224NHC36Si(OCH33(信越化学製
KBM−603)で表されるシランカップリング剤を水
に1:99の割合で溶解させた水溶液に1分間浸漬し基
板表面に図4に示すようにシランカップリング剤層6を
形成する。そして、次に図5に示すように(表2)に示
す条件で電気銅めっきを行いめっきレジストを形成して
いない箇所に電気銅めっき膜7を30μm形成する。次
に図6に示すように電気銅めっき膜7上にはんだめっき
膜8を形成した後、めっきレジスト5を除去しさらに塩
化アンモニウム水溶液を用いて不要な銅を除去し、図7
に示すような印刷配線板を得た。
After degreasing and soft etching,
A silane coupling agent represented by NH 2 C 2 H 4 NHC 3 H 6 Si (OCH 3 ) 3 (KBM-603 manufactured by Shin-Etsu Chemical) was immersed in an aqueous solution in which water was dissolved at a ratio of 1:99 for 1 minute. A silane coupling agent layer 6 is formed on the surface of the substrate as shown in FIG. Then, as shown in FIG. 5, electrolytic copper plating is performed under the conditions shown in (Table 2) to form an electrolytic copper plating film 7 of 30 μm in a portion where the plating resist is not formed. Next, as shown in FIG. 6, after forming a solder plating film 8 on the electrolytic copper plating film 7, the plating resist 5 is removed, and unnecessary copper is removed by using an ammonium chloride aqueous solution.
A printed wiring board as shown in was obtained.

【0013】このようにして作った印刷配線板のピット
発生率を検査した結果、ピットは全く発生していなかっ
た。またこの実験において、シランカップリング剤によ
る処理を除いたプロセスで同様に実験した結果、100
%ピットは発生した。また、シランカップリング剤によ
る処理を行ったプロセスから得られる電気銅めっき膜は
シランカップリング剤による処理を除いたプロセスから
得られた電気銅めっき膜に比べて延性が優れていた。
As a result of inspecting the pit generation rate of the printed wiring board thus produced, no pit was generated. Also, in this experiment, the same experiment was conducted by the process except the treatment with the silane coupling agent.
% Pit has occurred. In addition, the electro-copper plated film obtained from the process treated with the silane coupling agent was superior in ductility to the electro-copper plated film obtained from the process excluding the treatment with the silane coupling agent.

【0014】なお、このシランカップリング剤による処
理を行ったプロセスから得られる電気銅めっき膜は組成
分析をプラズマ発光分光分析で調べたところ1〜5pp
mのシリコンが検出され、シランカップリング剤による
処理を除いたプロセスから得られた電気銅めっき膜から
はシリコンが検出されなかった。
The electrolytic copper plating film obtained from the process in which the treatment with the silane coupling agent was carried out, was subjected to a plasma emission spectroscopic analysis for composition analysis and found to be 1 to 5 pp.
m of silicon was detected, and no silicon was detected in the electrolytic copper-plated film obtained from the process except the treatment with the silane coupling agent.

【0015】[0015]

【表1】 [Table 1]

【0016】[0016]

【表2】 [Table 2]

【0017】(実施例2)次に実施例1に示したプロセ
スと同様な方法でシランカップリング剤をNH224
NHC36Si(OC253,NH224NHC36
SiCH3(OCH32,NH236Si(OC25
3,NH236Si(OCH33,NH2CONHC3
6Si(OC253を用いて印刷配線板を製造した。い
ずれの場合も、ピットは全く発生していなかった。
Example 2 Next, a silane coupling agent was added to NH 2 C 2 H 4 in the same manner as in the process shown in Example 1.
NHC 3 H 6 Si (OC 2 H 5 ) 3 , NH 2 C 2 H 4 NHC 3 H 6
SiCH 3 (OCH 3 ) 2 , NH 2 C 3 H 6 Si (OC 2 H 5 )
3 , NH 2 C 3 H 6 Si (OCH 3 ) 3 , NH 2 CONHC 3 H
A printed wiring board was manufactured using 6 Si (OC 2 H 5 ) 3 . In any case, no pit was generated.

【0018】(実施例3)次にシランカップリング剤水
溶液のpHを1〜13の間で調整し実施例1に示したプ
ロセスで実験した結果、pH3以上ではピットは全く発
生しなかったが、pH2の時ピットは20%、pH1の
とき35%の発生が認められた。
(Example 3) Next, the pH of the silane coupling agent aqueous solution was adjusted to a value between 1 and 13, and an experiment was conducted by the process shown in Example 1. As a result, no pits were generated at pH 3 or above. 20% pits were observed at pH 2 and 35% at pH 1.

【0019】(実施例4)次に(表2)に示す条件で電
気銅めっきを行う際、NH224NHC36Si(O
CH33(信越化学製KBM−603)で表されるシラ
ンカップリング剤を、1ppm,10ppm,100p
pm,1000ppm,10000ppm添加し、30
μmの厚さのめっき膜を形成し延性を測定した結果、無
添加の膜に比べて添加したものは延性が向上した。組成
をプラズマ発光分光分析で調べたところシランカップリ
ング剤を添加したものはその添加量に応じて1〜10p
pmのシリコンが検出され、無添加の膜からはシリコン
が検出されなかった。
Example 4 Next, when performing electrolytic copper plating under the conditions shown in (Table 2), NH 2 C 2 H 4 NHC 3 H 6 Si (O
CH 3 ) 3 (KBM-603 manufactured by Shin-Etsu Chemical Co., Ltd.) was used as a silane coupling agent at 1 ppm, 10 ppm, 100 p.
pm, add 1000ppm, 10000ppm, 30
As a result of forming a plated film having a thickness of μm and measuring ductility, the ductility of the added film was improved as compared with the non-added film. When the composition was examined by plasma emission spectroscopic analysis, the composition containing the silane coupling agent was 1 to 10 p depending on the addition amount.
Silicon of pm was detected, and no silicon was detected from the undoped film.

【0020】(実施例5)次に実施例1に示したプロセ
スで作成した印刷配線板を大気中で100℃、5分間熱
処理したところ無電解めっき膜と電気銅めっき膜との密
着強度が、シランカップリング剤無添加のプロセスで作
成した印刷配線板に比べて20%向上した。またシラン
カップリング剤を電気めっき液に添加した場合も同様に
密着強度が向上した。なお、熱処理温度については実験
の結果、80℃以上で上限は基板材質の耐熱温度により
決定される。
(Example 5) Next, when the printed wiring board prepared by the process shown in Example 1 was heat-treated at 100 ° C for 5 minutes in the atmosphere, the adhesion strength between the electroless plating film and the electrolytic copper plating film was It was improved by 20% as compared with the printed wiring board prepared by the process without adding the silane coupling agent. Also, when a silane coupling agent was added to the electroplating solution, the adhesion strength was similarly improved. Regarding the heat treatment temperature, as a result of experiments, the upper limit is 80 ° C. or higher, and the upper limit is determined by the heat resistant temperature of the substrate material.

【0021】なお、本実施例のめっきレジスト表面の親
水化による濡れ性向上は、めっきレジスト表面の電気め
っき液に対する接触角で調べた結果、シランカップリン
グ剤の未処理の時平均値で47度の値であった接触角
が、シランカップリング剤の処理により24度の値に減
少し濡れ性向上が確認できた。また透明アクリル樹脂で
製作した10×20×20cmのめっき槽で電気銅めっき
前の印刷配線板表面を観察した結果、シランカップリン
グ剤で処理したものは、気泡の付着が全く認められなか
ったのに対して未処理のものはめっきレジスト及びめっ
きレジスト断面の全域に気泡の付着が観察された。観察
後電気めっきを行った結果、気泡の付着したものにはピ
ットが発生し、付着していないものはピットの発生は認
められずこれらのことからシランカップリング剤による
処理によりめっきレジストの濡れ性向上に伴う気泡付着
の防止によりピット発生を抑制するものである。
The improvement of the wettability of the surface of the plating resist in this example due to the hydrophilicity was examined by the contact angle of the plating resist surface to the electroplating solution. As a result, the average value of the untreated silane coupling agent was 47 degrees. The contact angle which was the value of was reduced to a value of 24 degrees by the treatment with the silane coupling agent, and it was confirmed that the wettability was improved. In addition, as a result of observing the surface of the printed wiring board before electrolytic copper plating in a 10 × 20 × 20 cm plating tank made of a transparent acrylic resin, it was found that the treatment with the silane coupling agent showed no air bubble adhesion. On the other hand, in the untreated one, bubbles were observed to be attached to the entire area of the plating resist and the cross section of the plating resist. As a result of electroplating after observation, pits were formed on those with air bubbles, and no pits were observed on those without air bubbles.Thus, the wettability of the plating resist by the treatment with a silane coupling agent was confirmed. The prevention of air bubbles accompanying the improvement suppresses the generation of pits.

【0022】[0022]

【発明の効果】以上のように本発明によれば、パターン
めっき法において、めっきレジスト層を形成する工程
後、電気銅めっき工程前に少なくともめっきレジスト層
表面をめっきレジスト表面に存在する官能基と結合する
官能基と親水性を有する官能基を有するシランカップリ
ング剤により処理することによってめっきレジストの表
面を親水化し濡れ性を高めることができ、気泡の付着を
防ぎピットの発生を抑制するものである。
As described above, according to the present invention, in the pattern plating method, after the step of forming the plating resist layer and before the electrolytic copper plating step, at least the plating resist layer surface is treated with a functional group existing on the plating resist surface. By treating with a silane coupling agent having a functional group to be bonded and a hydrophilic functional group, the surface of the plating resist can be made hydrophilic and the wettability can be improved, which prevents the adhesion of bubbles and suppresses the formation of pits. is there.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 1 is a sectional view for explaining a process of a method for manufacturing a printed wiring board according to a first embodiment of the present invention.

【図2】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 2 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

【図3】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 3 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

【図4】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 4 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

【図5】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 5 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

【図6】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 6 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

【図7】本発明の実施例1における印刷配線板の製造方
法の工程説明のための断面図
FIG. 7 is a cross-sectional view for explaining the steps of the method for manufacturing a printed wiring board according to the first embodiment of the present invention.

【図8】従来の印刷配線板の断面図FIG. 8 is a sectional view of a conventional printed wiring board.

【図9】従来の印刷配線板の断面図FIG. 9 is a sectional view of a conventional printed wiring board.

【図10】従来の印刷配線板の断面図FIG. 10 is a sectional view of a conventional printed wiring board.

【図11】従来の印刷配線板の断面図FIG. 11 is a sectional view of a conventional printed wiring board.

【符号の説明】[Explanation of symbols]

1 ガラスエポキシ基板 2 銅はく 3 スルーホール 4 無電解銅めっき膜 5 めっきレジスト層 6 シランカップリング剤層 7 電気銅めっき膜 8 はんだめっき膜 1 Glass Epoxy Substrate 2 Copper Foil 3 Through Hole 4 Electroless Copper Plating Film 5 Plating Resist Layer 6 Silane Coupling Agent Layer 7 Copper Electroplating Film 8 Solder Plating Film

───────────────────────────────────────────────────── フロントページの続き (72)発明者 水越 淳二 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 (72)発明者 田中 暢容 大阪府門真市大字門真1006番地 松下電器 産業株式会社内 ─────────────────────────────────────────────────── ─── Continued front page (72) Inventor Junji Mizukoshi 1006, Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】パターンめっきする際に、めっきレジスト
層を形成する工程後、電気銅めっき工程前に少なくとも
めっきレジスト層表面をめっきレジスト表面に存在する
官能基と結合する官能基と親水性を有する官能基を有す
るシランカップリング剤により処理することを特徴とす
る印刷配線板の製造方法。
1. In pattern plating, after the step of forming a plating resist layer and before the electrolytic copper plating step, at least the surface of the plating resist layer has a hydrophilicity with a functional group that bonds with a functional group present on the surface of the plating resist. A method for producing a printed wiring board, which comprises treating with a silane coupling agent having a functional group.
【請求項2】シランカップリング剤がNH224NH
36Si(OCH3 3,NH224NHC36Si
(OC253,NH224NHC36SiCH 3(O
CH32,NH236Si(OC253,NH23
6Si(OCH33,NH2CONHC36Si(OC2
53の少なくとも1つで表される請求項1記載の印刷
配線板の製造方法。
2. A silane coupling agent is NH2C2HFourNH
C3H6Si (OCH3) 3, NH2C2HFourNHC3H6Si
(OC2HFive)3, NH2C2HFourNHC3H6SiCH 3(O
CH3)2, NH2C3H6Si (OC2HFive)3, NH2C3H
6Si (OCH3)3, NH2CONHC3H6Si (OC2
HFive)3The printing according to claim 1, which is represented by at least one of
Wiring board manufacturing method.
【請求項3】シランカップリング剤はpH3以上で使用
することを特徴とする請求項1記載の印刷配線板の製造
方法。
3. The method for producing a printed wiring board according to claim 1, wherein the silane coupling agent is used at a pH of 3 or higher.
【請求項4】シランカップリング剤を含有する電気銅め
っき液によりめっきを行うことを特徴とする印刷配線板
の製造方法。
4. A method for producing a printed wiring board, which comprises plating with an electrolytic copper plating solution containing a silane coupling agent.
【請求項5】皮膜中にシリコンを含有させた無電解もし
くは電気銅めっき膜を形成した後、大気中もしくは還元
雰囲気中で熱処理を行うことを特徴とする印刷配線板の
製造方法。
5. A method for producing a printed wiring board, which comprises heat-treating in air or in a reducing atmosphere after forming an electroless or electrolytic copper-plated film containing silicon in the film.
JP30443591A 1991-11-20 1991-11-20 Manufacture of printed circuit board Pending JPH05145221A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30443591A JPH05145221A (en) 1991-11-20 1991-11-20 Manufacture of printed circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30443591A JPH05145221A (en) 1991-11-20 1991-11-20 Manufacture of printed circuit board

Publications (1)

Publication Number Publication Date
JPH05145221A true JPH05145221A (en) 1993-06-11

Family

ID=17932975

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30443591A Pending JPH05145221A (en) 1991-11-20 1991-11-20 Manufacture of printed circuit board

Country Status (1)

Country Link
JP (1) JPH05145221A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5502893A (en) * 1992-10-09 1996-04-02 International Business Machines Corporation Method of making a printing wiring board
JP2000068642A (en) * 1998-08-25 2000-03-03 Fujitsu Ltd Manufacture of multilayer circuit board
JP2009038094A (en) * 2007-07-31 2009-02-19 Hitachi Aic Inc Manufacturing method of multilayer wiring board
CN103717011A (en) * 2014-01-06 2014-04-09 广东生益科技股份有限公司 Method for relieving copper printed circuit board solder resist cracking
JP2018078273A (en) * 2016-11-10 2018-05-17 南亞電路板股▲ふん▼有限公司 Circuit board and method of manufacturing the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5502893A (en) * 1992-10-09 1996-04-02 International Business Machines Corporation Method of making a printing wiring board
JP2000068642A (en) * 1998-08-25 2000-03-03 Fujitsu Ltd Manufacture of multilayer circuit board
JP2009038094A (en) * 2007-07-31 2009-02-19 Hitachi Aic Inc Manufacturing method of multilayer wiring board
CN103717011A (en) * 2014-01-06 2014-04-09 广东生益科技股份有限公司 Method for relieving copper printed circuit board solder resist cracking
JP2018078273A (en) * 2016-11-10 2018-05-17 南亞電路板股▲ふん▼有限公司 Circuit board and method of manufacturing the same

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