JPH0575233A - Manufacture of wiring board - Google Patents

Manufacture of wiring board

Info

Publication number
JPH0575233A
JPH0575233A JP23582691A JP23582691A JPH0575233A JP H0575233 A JPH0575233 A JP H0575233A JP 23582691 A JP23582691 A JP 23582691A JP 23582691 A JP23582691 A JP 23582691A JP H0575233 A JPH0575233 A JP H0575233A
Authority
JP
Japan
Prior art keywords
copper
layer
copper oxide
nickel
plating
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP23582691A
Other languages
Japanese (ja)
Inventor
Akinari Kida
明成 木田
Akishi Nakaso
昭士 中祖
Naoyuki Urasaki
直之 浦崎
Shuichi Hatakeyama
修一 畠山
Kazuhisa Otsuka
和久 大塚
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP23582691A priority Critical patent/JPH0575233A/en
Publication of JPH0575233A publication Critical patent/JPH0575233A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent line discontinuity and line rising by forming a nickel layer and a copper layer on a substrate surface one by one, by oxidizing a surface of the copper layer thereafter and by forming a resist image on the surface of the copper layer wherein copper oxide is formed or by forming a resist image on a copper layer surface which is acquired by reducing copper oxide to copper. CONSTITUTION:A copper oxide layer 2 is formed on one side of a copper foil 1 by using treatment solution. An insulating base material 3 is arranged in contact with a surface of the copper foil wherein copper oxide is formed, and a lamination structure body is formed by heating and pressurizing. After a through-hole 4 is provided, the copper foil and the copper oxide layer are chemically removed. The structure body is immersed in electroless nickel plating solution and a nickel plating layer 5 is formed. A copper plating layer 6 is formed on a nickel surface using displacement copper plating solution. Thereafter, a copper oxide layer 7 is formed on a surface of the copper plating layer. The copper oxide layer 7 is immersed in reduction treatment solution and the copper oxide layer 7 is reduced to a metallic copper layer 8. A resist image 9 is formed on a surface of the metallic copper layer 8.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は高密度配線が可能な配線
板の製造法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a wiring board capable of high-density wiring.

【0002】[0002]

【従来の技術】近年、電子機器の小型、軽量化に伴い配
線板に配線の高密度化が要求されており、それに伴って
配線幅や配線間隔又はスルーホールが狭くなっている。
このような高密度化に伴い、高湿、高温電界下での電食
による配線板の絶縁劣化が問題視されるようになってい
る。
2. Description of the Related Art In recent years, as electronic devices have become smaller and lighter, wiring boards have been required to have a higher density of wiring, and accordingly, wiring widths, wiring intervals, or through holes have become narrower.
With such high density, deterioration of the insulation of the wiring board due to electrolytic corrosion under high humidity and high temperature electric field is becoming a problem.

【0003】すなわち、銅配線下部にある絶縁材料中の
イオン性不純物に起因して配線材料である銅が移行し
て、配線間にデンドライトと呼ばれる樹脂状の銅化合物
が発生することがある。このデンドライトは、次第に成
長しブリッジとなって配線間を短絡させることがある。
その結果、配線間隔を0.15mm以下にすることがで
きず、高密度の配線を行うには、配線の幅のみを小さく
しなければならない。したがって、配線密度に限界が生
じている。
That is, copper, which is the wiring material, may migrate due to ionic impurities in the insulating material under the copper wiring, and a resinous copper compound called dendrite may be generated between the wirings. The dendrite gradually grows to form a bridge, which may cause a short circuit between wirings.
As a result, the wiring interval cannot be set to 0.15 mm or less, and in order to perform high-density wiring, only the width of the wiring has to be reduced. Therefore, the wiring density is limited.

【0004】このデンドライトを抑制するには、配線金
属である銅と絶縁基板との間にニッケル層を形成する配
線構造あるいはニッケル単独の配線構造が好ましい。そ
の理由は、ニッケル表面は、酸素の存在下でニッケル酸
化物となっており、このニッケル酸化物は、銅及び銅酸
化物に比べ、高湿高温な環境下でも安定である。このた
めニッケルに電界が加わっても、銅に比べ金属の移行が
少なく、デンドライト抑制に効果がある。
In order to suppress this dendrite, a wiring structure in which a nickel layer is formed between copper, which is a wiring metal, and an insulating substrate, or a wiring structure containing only nickel is preferable. The reason is that the nickel surface is a nickel oxide in the presence of oxygen, and this nickel oxide is more stable than a copper and copper oxide under a high humidity and high temperature environment. Therefore, even when an electric field is applied to nickel, the metal migration is less than that of copper, and it is effective in suppressing dendrite.

【0005】配線金属である銅と絶縁基板との間にニッ
ケル層が形成された配線構造を有する配線板の製造法の
一つに、絶縁基板の表面全面にニッケル層を形成後、回
路とならない部分にめっきレジスト像を形成し、電気め
っきあるいは無電解めっきで銅層を回路となる部分に形
成し、レジスト除去後、不要なニッケル層を除去する方
法がある。
One of the methods for manufacturing a wiring board having a wiring structure in which a nickel layer is formed between a wiring metal, copper, and an insulating substrate is one of the methods of forming a nickel layer on the entire surface of the insulating substrate and then not forming a circuit. There is a method in which a plating resist image is formed on a portion, a copper layer is formed on a portion to be a circuit by electroplating or electroless plating, and after removing the resist, an unnecessary nickel layer is removed.

【0006】また、ニッケル層単独の配線構造を有する
配線板の製造法の一つに、絶縁基板の表面全面にニッケ
ル層を形成後、回路となる部分にエッチングレジスト像
を形成した後、回路とならない部分のニッケル層をエッ
チングする方法がある。ニッケル層は通常平滑性が高い
ため、そのままではめっきレジストあるいはエッチング
レジストとの密着力が低く、レジスト現像時においてレ
ジストの浮きや剥がれが発生しやすい。この問題を解決
するため、従来では、機械的研磨処理を行うことによ
り、ニッケル層の表面に微細な凹凸形状を形成してレジ
ストとの接触面積を拡大させ、レジストの密着性を向上
させていた。
Further, as one of the methods for manufacturing a wiring board having a wiring structure having only a nickel layer, a nickel layer is formed on the entire surface of an insulating substrate, an etching resist image is formed on a portion to be a circuit, and then a circuit is formed. There is a method of etching the nickel layer in the portion that does not become. Since the nickel layer usually has high smoothness, the adhesion to the plating resist or the etching resist is low as it is, and the resist is likely to float or peel off during the resist development. In order to solve this problem, conventionally, mechanical polishing treatment was performed to form fine unevenness on the surface of the nickel layer to expand the contact area with the resist and improve the adhesiveness of the resist. ..

【0007】[0007]

【発明が解決しようとする課題】しかしながら、このニ
ッケル層の表面処理ではニッケル層に機械的な力が加わ
るためニッケル層にクラックが入り易く、不要部分のニ
ッケルをエッチングする際に回路となる部分のニッケル
層のクラック部にエッチング液が侵入し、ライン断線あ
るいはライン浮きが生じるという問題があった。本発明
の目的は機械的な研磨を行わずに、ニッケル層上に微細
な凹凸形状を形成することにより、ライン断線、ライン
浮きがない配線板を製造することにある。
However, in the surface treatment of the nickel layer, a mechanical force is applied to the nickel layer, so that the nickel layer is apt to be cracked. There is a problem that the etching liquid penetrates into the cracked portion of the nickel layer, causing line disconnection or line floating. An object of the present invention is to manufacture a wiring board free from line disconnection and line floating by forming fine irregularities on a nickel layer without performing mechanical polishing.

【0008】[0008]

【課題を解決するための手段】本発明は、基板表面にニ
ッケル層及び銅層を順次形成した後、銅層の表面を酸化
して酸化銅を形成し、次いで酸化銅が形成された銅層表
面上にレジスト像を形成するか、酸化銅の形状を保った
まま酸化銅を銅に還元して得られた銅層表面上にレジス
ト像を形成する工程を有することを特徴とする配線板の
製造法を提供するものである。本発明が適用できる基板
としては、エポキシ樹脂、フェノール樹脂、ポリイミド
樹脂、ポリエステル樹脂等の熱硬化性樹脂からなる基
板、ポリエチレン、フッ素樹脂、ポリエーテルサルフォ
ン、ポリエーテルイミド等の熱可塑性樹脂からなる基
板、NBR、アクリルゴム、シリコンゴム、ポリエチレ
ンゴム、ポリイソプレンゴム等のゴム性樹脂からなる基
板、及び前述した熱硬化性樹脂、熱可塑性樹脂、ゴム性
樹脂等と紙基材、ガラス布、ガラス不織布、無材質フィ
ラー等とを複合化したものからなる基板等があり、ま
た、Al23、AlN、SiC、SiO2等のセラミッ
ク基板であってもよい。また、基板内部にあらかじめ配
線が形成されたものを使用してもよい。
According to the present invention, a nickel layer and a copper layer are sequentially formed on a substrate surface, the surface of the copper layer is oxidized to form copper oxide, and then the copper layer on which the copper oxide is formed is formed. A wiring board characterized by having a step of forming a resist image on the surface or forming a resist image on the copper layer surface obtained by reducing copper oxide to copper while maintaining the shape of copper oxide. It provides a manufacturing method. The substrate to which the present invention can be applied is a substrate made of a thermosetting resin such as an epoxy resin, a phenol resin, a polyimide resin or a polyester resin, or a thermoplastic resin such as polyethylene, a fluororesin, a polyether sulfone or a polyetherimide. Substrate, substrate made of rubber resin such as NBR, acrylic rubber, silicon rubber, polyethylene rubber, polyisoprene rubber, and the above-mentioned thermosetting resin, thermoplastic resin, rubber resin and the like, paper base material, glass cloth, glass There is a substrate made of a composite of a non-woven fabric, a non-material filler, etc., and a ceramic substrate such as Al 2 O 3 , AlN, SiC, SiO 2 may be used. Alternatively, a substrate in which wiring is previously formed may be used.

【0009】ニッケル層の形成法には無電解めっき法、
電気めっき法、無電解めっき法と電気めっき法の併用
法、溶射法、抵抗加熱蒸着法、電子ビーム蒸着法、スパ
ッタ法、イオンプレーティング法等があり、いずれを用
いても良い。このような方法で形成されたニッケル層の
厚みは好ましくは0.1μm〜20μmである。
The nickel layer is formed by electroless plating,
There are electroplating method, combined use of electroless plating method and electroplating method, thermal spraying method, resistance heating vapor deposition method, electron beam vapor deposition method, sputtering method, ion plating method and the like, and any of them may be used. The thickness of the nickel layer formed by such a method is preferably 0.1 μm to 20 μm.

【0010】ニッケル層の形成後に行う銅層の形成には
上記した金属層形成法は全て適用できる。更に、置換め
っき法及び置換めっき法と上記した金属層形成法の組合
せによるものであってもよい。このような方法で銅層の
厚みは好ましくは1μm〜50μmである。
All of the above-described metal layer forming methods can be applied to the formation of the copper layer after the formation of the nickel layer. Further, it may be a substitution plating method or a combination of the substitution plating method and the above-mentioned metal layer forming method. In such a method, the thickness of the copper layer is preferably 1 μm to 50 μm.

【0011】銅層表面への酸化銅の形成法は通常、多層
配線板の内層銅箔処理工程で使用されている方法が用い
られ、亜塩素酸ナトリウム、次亜塩素酸ナトリウム、過
硫酸カリウム、塩素酸カリウム、過塩素酸カリウムなど
の酸化剤を含む処理液に基板を浸漬する方法あるいは処
理液を基板に噴霧する方法が用いられる。この方法によ
り銅層表面にサブミクロンオーダーの微細凹凸形状を有
する酸化銅が形成される。
The method of forming copper oxide on the surface of the copper layer is usually the method used in the inner layer copper foil treatment step of a multilayer wiring board. Sodium chlorite, sodium hypochlorite, potassium persulfate, A method of immersing the substrate in a treatment liquid containing an oxidizing agent such as potassium chlorate or potassium perchlorate or a method of spraying the treatment liquid on the substrate is used. By this method, copper oxide having fine irregularities of submicron order is formed on the surface of the copper layer.

【0012】配線金属である銅と絶縁基板との間にニッ
ケル層が形成された配線構造を有する配線板を製造する
ためには、酸化銅形成後の基板をアンモニアボラン、ト
リメチルアミンボラン、トリエチルアミンボラン、ジメ
チルアミンボラン、水素化ホウ素ナトリウム、ホルマリ
ンなどの還元剤を含む処理液に浸漬して、サブミクロン
オーダーの微細凹凸形状を有する酸化銅の表面の形状を
変化させることなく金属銅に還元する。そして銅層表面
にレジスト像を形成して公知の手法によりニッケル層を
有する配線板とする。$ 例えば、この表面の回路とな
らない部分にレジスト像を形成し、めっきレジスト像が
ない部分に無電解めっき法あるいは電気めっき法で銅を
厚付けし、めっきレジストを剥離した後、回路とならな
い部分の銅層及びニッケル層をエッチングにより除去す
る。
In order to manufacture a wiring board having a wiring structure in which a nickel layer is formed between copper, which is a wiring metal, and an insulating substrate, the substrate after the formation of copper oxide is treated with ammonia borane, trimethylamine borane, triethylamine borane, The copper oxide is immersed in a treatment liquid containing a reducing agent such as dimethylamine borane, sodium borohydride, and formalin, and reduced to metallic copper without changing the surface shape of the copper oxide having fine irregularities of submicron order. Then, a resist image is formed on the surface of the copper layer to form a wiring board having a nickel layer by a known method. $ For example, a resist image is formed on a part of this surface that does not become a circuit, copper is thickened on the part where there is no plating resist image by electroless plating or electroplating, and the part that does not become a circuit after peeling the plating resist The copper layer and the nickel layer are removed by etching.

【0013】また、酸化銅形成後の基板の回路とならな
い部分にめっきレジスト像を形成した後、基板を前述し
た還元処理液に浸漬して酸化銅層の表面を金属銅に還元
し、次いで、金属銅表面に銅を厚付けめっきしても良
い。また酸化銅形成後の基板の回路とならない部分にめ
っきレジスト像を形成した後、基板を塩酸を含む処理液
に浸漬しめっきレジスト像が形成されていない部分の酸
化銅を除去した後、この部分に銅を厚付けめっきしても
良い。
Further, after forming a plating resist image on a portion of the substrate after forming copper oxide which does not form a circuit, the substrate is immersed in the above-mentioned reduction treatment solution to reduce the surface of the copper oxide layer to metallic copper, and then, Copper may be thickly plated on the surface of the metal copper. In addition, after forming a plating resist image on the part that does not become the circuit of the substrate after forming copper oxide, dip the substrate in a treatment solution containing hydrochloric acid to remove the copper oxide on the part where the plating resist image is not formed, and then this part It may be plated with copper thickly.

【0014】ニッケル層単独の配線構造を有する配線板
を製造するためには、酸化銅層形成後の基板を前述した
還元処理液に浸漬して酸化銅表面を金属銅に還元した
後、回路となる部分にエッチングレジスト像を形成し、
エッチングレジスト像がない部分の銅層、ニッケル層を
順次エッチングで除去し、レジストを剥離した後、回路
上の銅をエッチングで除去する。
In order to manufacture a wiring board having a wiring structure having only a nickel layer, the substrate after the formation of the copper oxide layer is immersed in the above-mentioned reduction treatment solution to reduce the copper oxide surface to metallic copper, and then the circuit is formed. Forming an etching resist image on the
The copper layer and the nickel layer in the portion without the etching resist image are sequentially removed by etching, the resist is peeled off, and then the copper on the circuit is removed by etching.

【0015】また、酸化銅層形成後の基板の回路となる
部分にエッチングレジスト像を形成した後、エッチング
レジスト像が形成されていない部分の酸化銅を前述した
還元処理液により金属銅に還元し、エッチングレジスト
像がない部分の銅層、ニッケル層を順次エッチングによ
り除去し、レジストを剥離した後、塩酸を含む処理液に
浸漬して酸化銅を除去し、回路となる部分のニッケル層
上にある銅層をエッチングにより除去しても良い。ま
た、酸化銅形成後の基板の回路となる部分にエッチング
レジスト像を形成した後、エッチングレジスト像が形成
されていない部分の酸化銅、銅層、ニッケル層を順次除
去し、レジスト剥離した後、回路となるニッケル上にあ
る酸化銅、銅層を順次除去しても良い。
Further, after forming an etching resist image on a portion which becomes a circuit of the substrate after the copper oxide layer is formed, copper oxide on a portion where the etching resist image is not formed is reduced to metallic copper by the above-mentioned reduction treatment liquid. , The copper layer and the nickel layer where there is no etching resist image are sequentially removed by etching, the resist is peeled off, the copper oxide is removed by dipping in a treatment solution containing hydrochloric acid, and the nickel layer is formed on the part which becomes the circuit. A copper layer may be removed by etching. Further, after forming an etching resist image in a portion which will be a circuit of the substrate after forming copper oxide, copper oxide in a portion where an etching resist image is not formed, a copper layer, and a nickel layer are sequentially removed, and after resist peeling, The copper oxide and the copper layer on the nickel forming the circuit may be sequentially removed.

【0016】[0016]

【作用】本発明による配線板の製造法において、ニッケ
ル上に形成された銅表面に酸化銅を形成することによ
り、基板表面にはサブミクロンオーダーの凹凸形状が機
械的の研磨処理を行うことなく形成でき、ライン断線、
ライン浮きがない配線板を製造することができる。
In the method for manufacturing a wiring board according to the present invention, by forming copper oxide on the copper surface formed on nickel, unevenness of submicron order is formed on the substrate surface without mechanical polishing treatment. Can be formed, line disconnection,
It is possible to manufacture a wiring board without line floating.

【0017】[0017]

【実施例】以下、本発明による配線板の製造法の実施例
を図面に基づき説明するが、本発明はこれに限定される
ものではない。 実施例1 図1及び図2の図1−1〜1−10は製造工程を示す断
面図である。図1−1に示すように、通常の配線板に用
いる35μmの銅箔1の片面に、以下に示す組成の処理
液を用いて、以下に示す条件で処理して酸化銅層2を形
成した。
Embodiments of the method for manufacturing a wiring board according to the present invention will be described below with reference to the drawings, but the present invention is not limited thereto. Example 1 FIGS. 1-1 to 1-10 of FIGS. 1 and 2 are cross-sectional views showing a manufacturing process. As shown in FIG. 1-1, a copper oxide layer 2 was formed on one surface of a copper foil 1 having a thickness of 35 μm, which is used for a normal wiring board, by using a treatment liquid having the composition shown below under the following conditions. ..

【0018】 組成 NaOH 15g/l Na3PO4・12H2O 30g/l NaClO2 90g/l 純水 全量で1lとなる量 条件 液温度 85℃ 銅箔浸漬時間 120秒Composition NaOH 15 g / l Na 3 PO 4 · 12H 2 O 30 g / l NaClO 2 90 g / l Pure water amount of 1 liter Condition Liquid temperature 85 ° C. Copper foil immersion time 120 seconds

【0019】上記条件により、酸化銅を形成した後、図
1−2に示すように、銅箔の酸化銅を形成した面に接す
るように複数枚のガラス布−エポキシプリプレグE−6
7(日立化成工業製、商品名)からなる絶縁基材3を配
置し、加熱加圧して積層体構造物とする。そして、通常
の配線板製造工程で用いられているNCドリルマシンで
所望の位置に貫通孔4を設けた後、図1−3に示すよう
に、塩化第2銅水溶液を用いて銅箔及び酸化銅層を化学
的に除去する。この構造物を塩化パラジウムを含む処理
液に浸漬して表面にめっき触媒を付着させた後、無電解
ニッケルめっき液であるブルーシューマ(日本カニゼン
社製、商品名)溶液にめっき液温度80℃で浸漬し、図
1−4に示すニッケルめっき層5を形成した。そして、
置換銅めっき液、(CuSO4・5H2O 2.5g/
l、液温60℃)を用いて、図1−5に示すように、ニ
ッケル表面に銅めっき層6を形成した。その後、酸化銅
層2を形成した際の処理液を用いて、図1−6に示すよ
うに、銅めっき層の表面に酸化銅層7を形成し、引き続
いて還元処理液(NaOH 5g/l、ジメチルアミン
ボラン5g/l、液温55℃)に浸漬して、図1−7に
示すように、酸化銅層7を金属銅層8に還元する。この
金属銅層8の表面にドライフィルムレジストであるSR
−3000−22(日立化成工業製、商品名)をラミネ
ートし、露光、現像して図1−8に示すめっきレジスト
像9を形成した。
After forming the copper oxide under the above conditions, as shown in FIG. 1-2, a plurality of glass cloths-epoxy prepreg E-6 are contacted with the surface of the copper foil on which the copper oxide is formed.
The insulating base material 3 made of 7 (manufactured by Hitachi Chemical Co., Ltd., trade name) is placed and heated and pressed to form a laminated structure. Then, after forming the through holes 4 at desired positions with an NC drill machine used in a normal wiring board manufacturing process, as shown in FIG. Chemically remove the copper layer. This structure was immersed in a treatment solution containing palladium chloride to attach a plating catalyst to the surface, and then the solution was added to an electroless nickel plating solution, Blue Schuma (manufactured by Kanigen Japan Co., Ltd.) solution at a plating solution temperature of 80 ° C. Immersion was performed to form the nickel plating layer 5 shown in FIGS. And
Substituted copper plating solution, (CuSO 4 · 5H 2 O 2.5g /
1 and a liquid temperature of 60 ° C.), a copper plating layer 6 was formed on the nickel surface as shown in FIG. 1-5. After that, the treatment liquid used for forming the copper oxide layer 2 is used to form a copper oxide layer 7 on the surface of the copper plating layer as shown in FIG. 1-6, and subsequently, a reduction treatment liquid (NaOH 5 g / l , Dimethylamine borane 5 g / l, liquid temperature 55 ° C.) to reduce the copper oxide layer 7 to a metallic copper layer 8 as shown in FIG. 1-7. SR which is a dry film resist on the surface of the metallic copper layer 8
-3000-22 (manufactured by Hitachi Chemical Co., Ltd., trade name) was laminated, exposed and developed to form a plating resist image 9 shown in FIG. 1-8.

【0020】その後、以下の組成の無電解銅めっき液に
以下の条件で浸漬して、図1−9に示すパターン銅めっ
き層10を形成した。
Then, it was immersed in an electroless copper plating solution having the following composition under the following conditions to form a patterned copper plating layer 10 shown in FIG. 1-9.

【0021】 組成 CuSO4・5H2O 10g/l EDTA・4Na 40g/l 37%CH2O 3ml/l 条件 pH 12.3 めっき液温度 70℃Composition CuSO 4 .5H 2 O 10 g / l EDTA.4Na 40 g / l 37% CH 2 O 3 ml / l Conditions pH 12.3 Plating solution temperature 70 ° C.

【0022】無電解銅めっき後、塩化メチレン溶液をス
プレーして、めっきレジストを剥離した。そして、不要
部分の金属銅及び銅めっき層6を過硫酸アンモニウム水
溶液(200g/l、液温 室温)を用いてエッチング
した。
After electroless copper plating, a methylene chloride solution was sprayed to remove the plating resist. Then, the unnecessary portions of the metallic copper and the copper plating layer 6 were etched using an ammonium persulfate aqueous solution (200 g / l, liquid temperature: room temperature).

【0023】その後、トップリップAZ No1(奥野
製薬製、商品名)を40g/l、トップリップAZ N
o2(奥野製薬製、商品名)を500ml/l、水酸化
ナトリウム30g/lを配合した液温90℃の水溶液に
浸漬して不要部分のニッケルめっき層を溶解し、更に、
めっき触媒であるパラジウムをアルカリ性の過マンガン
酸カリウム溶液に浸漬して除去し、図1−10に示すよ
うな配線板とした。
Then, 40 g / l of Top Lip AZ No1 (manufactured by Okuno Seiyaku Co., Ltd.) and Top Lip AZ N
O2 (trade name, manufactured by Okuno Seiyaku Co., Ltd.) is immersed in an aqueous solution containing 500 ml / l and 30 g / l of sodium hydroxide at a liquid temperature of 90 ° C. to dissolve the nickel plating layer in unnecessary portions, and further,
Palladium, which is a plating catalyst, was removed by immersing it in an alkaline potassium permanganate solution to obtain a wiring board as shown in FIG. 1-10.

【0024】実施例2 図3及び図4の図2−1〜2−10は製造工程を示す断
面図である図2−1に示すように、通常の配線板に用い
る35μmの銅箔11の片面に、以下に示す組成の処理
液を用いて以下に示す処理条件で酸化銅層12を形成し
た。
Example 2 FIGS. 2-1 to 2-10 of FIGS. 3 and 4 are cross-sectional views showing the manufacturing process. As shown in FIG. 2A, a 35 .mu.m copper foil 11 used for a normal wiring board is used. A copper oxide layer 12 was formed on one surface using a treatment liquid having the composition shown below under the treatment conditions shown below.

【0025】 組成 NaOH 15g/l Na3PO4・12H2O 30g/l NaClO2 90g/l 純水 全量で1lとなる量 条件 液温度 85℃ 銅箔浸漬時間 120秒Composition NaOH 15 g / l Na 3 PO 4 · 12H 2 O 30 g / l NaClO 2 90 g / l Pure water 1 l in total amount Conditions Liquid temperature 85 ° C. Copper foil immersion time 120 seconds

【0026】上記条件により、酸化銅を形成した後、図
2−2に示すように、銅箔の酸化銅層を形成した面に接
するように複数枚のガラス布−エポキシプリプレグE−
67(日立化成工業製、商品名)からなる縁基材13を
配置し、加熱加圧して積層体構造物とする。そして、通
常の配線板製造工程で用いられているNCドリルマシン
で所望の位置に貫通孔14を設けた後、図2−3に示す
ように、塩化第2銅水溶液を用いて銅箔及び酸化銅を化
学的に除去した。この構造物を塩化パラジウムを含む処
理液に浸漬して表面にめっき触媒を付着させた後、無電
解ニッケルめっき液であるブルーシューマ(日本カニゼ
ン社製、商品名)溶液に液温80℃で浸漬し、図2−4
に示すニッケルめっき層15を形成した。そして、置換
銅めっき液(CuSO4・5H2O 2.5g/l、液温
60℃)を用いて、図2−5に示すように、ニッケル表
面に銅めっき層16を形成した。その後、酸化銅層12
を形成した際の処理液を用いて、図2−6に示すよう
に、銅めっき層の表面に酸化銅層17を形成し、引き続
いて還元処理液(NaOH 5g/l、ジメチルアミン
ボラン5g/l、液温55℃)に浸漬して、図2−7に
示すように、酸化銅層17を金属銅層18に還元した。
この金属銅層18の表面にドライフィルムレジストであ
るPHT−145F−40(日立化成工業製、商品名)
をラミネートし、露光、現像して図2(8)に示すエッ
チングレジスト像19を形成した。その後、不要部分の
金属銅層18及び銅めっき層16を過硫酸アンモニウム
水溶液(200g/l、液温 室温)を用いてエッチン
グし、トップリップAZNo1(奥野製薬製、商品名)
を40g/l、トップリップAZ No2(奥野製薬
製、商品名)を500ml/l、水酸化ナトリウム30
g/lを配合した液温90℃の水溶液に浸漬して不要部
分のニッケルめっき層を溶解し、更に、めっき触媒であ
るパラジウムをアルカリ性の過マンガン酸カリウム溶液
により除去して、図2−9に示す構造体とした。そし
て、エッチングレジストを塩化メチレン溶液をスプレー
することにより剥離し、ニッケルめっき層上にある金属
銅及び銅めっき層を過硫酸アンモニウム水溶液を用いて
エッチングすることにより図2−10に示す配線板を得
た。
After forming the copper oxide under the above conditions, as shown in FIG. 2-2, a plurality of glass cloths-epoxy prepreg E- are contacted with the surface of the copper foil on which the copper oxide layer is formed.
An edge base material 13 made of 67 (manufactured by Hitachi Chemical Co., Ltd., trade name) is placed and heated and pressed to form a laminated structure. Then, after providing the through holes 14 at desired positions with an NC drill machine used in a normal wiring board manufacturing process, as shown in FIG. Copper was chemically removed. This structure is immersed in a treatment solution containing palladium chloride to attach a plating catalyst to the surface, and then immersed in a solution of Blue Schuma (trade name of Kanigen Japan Co., Ltd.) which is an electroless nickel plating solution at a liquid temperature of 80 ° C. Then, Fig. 2-4
The nickel plating layer 15 shown in was formed. Then, a substitution copper plating solution (CuSO 4 .5H 2 O 2.5 g / l, solution temperature 60 ° C.) was used to form a copper plating layer 16 on the nickel surface as shown in FIG. 2-5. Then, the copper oxide layer 12
As shown in FIG. 2-6, the copper oxide layer 17 is formed on the surface of the copper plating layer by using the treatment liquid used in forming the film, and subsequently the reducing treatment liquid (NaOH 5 g / l, dimethylamine borane 5 g / l) is formed. 1 and a liquid temperature of 55 ° C.) to reduce the copper oxide layer 17 to a metallic copper layer 18 as shown in FIG. 2-7.
A dry film resist PHT-145F-40 (manufactured by Hitachi Chemical Co., Ltd.) on the surface of the metal copper layer 18
Was laminated, exposed and developed to form an etching resist image 19 shown in FIG. After that, the unnecessary portions of the metal copper layer 18 and the copper plating layer 16 are etched using an ammonium persulfate aqueous solution (200 g / l, liquid temperature: room temperature) to obtain a top lip AZNo1 (Okuno Pharmaceutical, trade name).
40 g / l, Top Lip AZ No2 (manufactured by Okuno Seiyaku), 500 ml / l, sodium hydroxide 30
By immersing the nickel plating layer in an unnecessary portion by immersing it in an aqueous solution having a liquid temperature of 90 ° C. mixed with g / l, palladium as a plating catalyst is removed by an alkaline potassium permanganate solution, and then, as shown in FIG. The structure shown in FIG. Then, the etching resist was peeled off by spraying a methylene chloride solution, and the metal copper and the copper plating layer on the nickel plating layer were etched using an ammonium persulfate aqueous solution to obtain a wiring board shown in FIG. 2-10. ..

【0027】[0027]

【発明の効果】本発明により下記のような効果が達成で
きる。 (1) ニッケル上でのレジスト現像時にレジスト浮き
やレジスト剥がれを低減でき、かつニッケルエッチング
時にライン断線やライン浮き等も低減できるため配線板
の製造歩留り向上が期待できる。 (2) レジスト像形成時の基板表面形状がサブミクロ
ンオーダーの凹凸形状となっているため、紫外線が基板
表面で吸収されやすく、レジスト露光時の基板からの紫
外線乱反射が低減可能となり、より微細なレジスト像が
形成可能となる。
According to the present invention, the following effects can be achieved. (1) Since resist floating and resist peeling can be reduced at the time of resist development on nickel, and line disconnection and line floating at the time of nickel etching can be reduced, it is expected to improve the manufacturing yield of wiring boards. (2) Since the substrate surface shape at the time of resist image formation is an uneven shape of the submicron order, ultraviolet rays are easily absorbed on the substrate surface, and diffused reflection of ultraviolet rays from the substrate at the time of resist exposure can be reduced, resulting in a finer pattern. A resist image can be formed.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明による実施例1の1−1〜1−7の工程
を説明するための断面図である。
FIG. 1 is a cross-sectional view for explaining processes of 1-1 to 1-7 of Example 1 according to the present invention.

【図2】本発明による実施例1の1−8〜1−10の工
程を説明するための断面図である。
FIG. 2 is a cross-sectional view for explaining steps 1-8 to 1-10 of Example 1 according to the present invention.

【図3】本発明による実施例2の2−1〜2−7の工程
を説明するための断面図である。
FIG. 3 is a cross-sectional view for explaining a process of 2-1 to 2-7 of a second embodiment according to the present invention.

【図4】本発明による実施例2の2−8〜2−10の工
程を説明するための断面図である。
FIG. 4 is a cross-sectional view for explaining a process of 2-8 to 2-10 of the second embodiment according to the present invention.

【符号の説明】[Explanation of symbols]

1 銅箔 2 酸化銅層 3 絶縁基材 4 貫通孔 5 ニッケルめっき層 6 銅めっき層 7 酸化銅層 8 金属銅層 9 めっきレジスト像 10 パターン銅めっき層 11 銅箔 12 酸化銅層 13 絶縁基材 14 貫通孔 15 ニッケルめっき層 16 銅めっき層 17 酸化銅層 18 金属銅層 19 エッチングレジスト像 1 Copper Foil 2 Copper Oxide Layer 3 Insulating Base Material 4 Through Hole 5 Nickel Plating Layer 6 Copper Plating Layer 7 Copper Oxide Layer 8 Metal Copper Layer 9 Plating Resist Image 10 Pattern Copper Plating Layer 11 Copper Foil 12 Copper Oxide Layer 13 Insulating Base Material 14 Through Hole 15 Nickel Plating Layer 16 Copper Plating Layer 17 Copper Oxide Layer 18 Metallic Copper Layer 19 Etching Resist Image

フロントページの続き (72)発明者 畠山 修一 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内 (72)発明者 大塚 和久 茨城県下館市大字小川1500番地 日立化成 工業株式会社下館研究所内Front page continuation (72) Inventor Shuichi Hatakeyama 1500 Ogawa, Shimodate, Ibaraki Pref., Shimodate Research Laboratory, Hitachi Chemical Co., Ltd. (72) Inventor, Kazuhisa Otsuka 1500 Ogawa, Shimodate, Ibaraki Hitachi Chemical Co., Ltd.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 基板表面にニッケル層及び銅層を順次形
成した後、銅層の表面を酸化して酸化銅を形成し、次い
で酸化銅が形成された銅層表面上にレジスト像を形成す
るか、酸化銅の形状を保ったまま酸化銅を銅に還元して
得られた銅層表面上にレジスト像を形成する工程を有す
ることを特徴とする配線板の製造法。
1. A nickel layer and a copper layer are sequentially formed on a substrate surface, the surface of the copper layer is oxidized to form copper oxide, and then a resist image is formed on the copper layer surface on which the copper oxide is formed. Alternatively, a method of manufacturing a wiring board, comprising a step of forming a resist image on the surface of a copper layer obtained by reducing copper oxide to copper while maintaining the shape of copper oxide.
JP23582691A 1991-09-17 1991-09-17 Manufacture of wiring board Pending JPH0575233A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP23582691A JPH0575233A (en) 1991-09-17 1991-09-17 Manufacture of wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP23582691A JPH0575233A (en) 1991-09-17 1991-09-17 Manufacture of wiring board

Publications (1)

Publication Number Publication Date
JPH0575233A true JPH0575233A (en) 1993-03-26

Family

ID=16991834

Family Applications (1)

Application Number Title Priority Date Filing Date
JP23582691A Pending JPH0575233A (en) 1991-09-17 1991-09-17 Manufacture of wiring board

Country Status (1)

Country Link
JP (1) JPH0575233A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003101218A (en) * 2001-09-21 2003-04-04 Hitachi Chem Co Ltd Method for manufacturing printed circuit board
US7455533B2 (en) 2004-11-19 2008-11-25 Sharp Kabushiki Kaisha Method for producing printed wiring board
KR101219423B1 (en) * 2011-07-05 2013-01-11 대덕전자 주식회사 Method of improving the adhesion-strength between copper core and insulating material

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003101218A (en) * 2001-09-21 2003-04-04 Hitachi Chem Co Ltd Method for manufacturing printed circuit board
US7455533B2 (en) 2004-11-19 2008-11-25 Sharp Kabushiki Kaisha Method for producing printed wiring board
KR101219423B1 (en) * 2011-07-05 2013-01-11 대덕전자 주식회사 Method of improving the adhesion-strength between copper core and insulating material

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