JP3359550B2 - Multilayer printed wiring board and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer printed wiring board and a method of manufacturing the same, and more particularly, to a method of reliably preventing a conductor circuit from being melted by a local battery reaction to thereby suppress a failure such as a disconnection, and has excellent connection reliability. A multilayer printed wiring board and its manufacturing method are proposed.

[0002]

2. Description of the Related Art In recent years, so-called build-up multilayer wiring boards have been receiving attention due to a demand for higher density of the multilayer wiring boards. This build-up multilayer wiring board is manufactured by a method disclosed in, for example, Japanese Patent Publication No. 4-55555. That is, an interlayer resin insulating layer made of a photosensitive electroless plating adhesive is applied on the core substrate, dried, exposed and developed to form an interlayer resin insulating layer having a via hole opening. Then, after the surface of the interlayer resin insulating layer is roughened by treatment with an oxidizing agent or the like, a plating resist obtained by exposing and developing a photosensitive resin layer on the roughened surface is provided. A conductive circuit pattern including via holes is formed by applying electroless plating to the non-resist-formed portions, and such a process is repeated a plurality of times to obtain a multi-layered build-up wiring board by the additive method.

In a multilayer printed wiring board manufactured by such a method, an inner conductor circuit formed on a substrate has a surface provided to ensure close contact with an interlayer resin insulation layer on the conductor circuit. Is subjected to a roughening treatment. For example, Japanese Patent Application Laid-Open No. 6-283860 discloses that a copper conductor pattern has Cu-Ni-
A method of roughening the conductor surface by applying a needle-shaped alloy plating of P is disclosed.

However, in the roughening process of applying a needle-shaped alloy plating made of Cu-Ni-P to a copper conductor pattern, if an opening for a via hole is provided in an interlayer resin insulating layer in a later step, Cu-Ni-P is removed from the opening. The Ni-P needle-like alloy plating layer is exposed. Therefore, when manufacturing a printed wiring board, when the interlayer resin insulation layer is roughened with an acid or an oxidizing agent, or when the wiring board is treated with a soft etching solution,
There has been a problem that the conductor circuit comes into contact with such an acid, an oxidizing agent or a soft etching solution, and the conductor circuit covered with the Cu-Ni-P needle-like alloy plating layer is dissolved.

[0005] Techniques that can overcome such problems include:
The inventors have previously disclosed in Japanese Patent Application Laid-Open No. 9-130050
A method was proposed in which the surface of a needle-like alloy layer made of -Ni-P was tin-substituted and the roughened layer was covered with a tin layer.

[0006]

However, even with such a coating with a tin layer, a phenomenon that the conductor circuit is rarely melted has been observed. This phenomenon is, in particular,
In the semi-additive method in which the conductor circuit is composed of the electrolytic plating film and the electroless plating film, the voids become large voids and deteriorate the connection reliability of the wiring board.

A main object of the present invention is to provide a multilayer printed wiring board having excellent connection reliability, which can reliably prevent a conductor circuit from melting due to a local battery reaction and can suppress a failure such as disconnection. Another object of the present invention is to propose a method by which the above-mentioned multilayer printed wiring board can be advantageously manufactured.

[0008]

Means for Solving the Problems The present inventors have made intensive studies to realize the above object. As a result, the cause of the melting of the conductor circuit is that the surface of the copper conductor pattern is not completely covered with the roughened layer and the tin layer of the needle-shaped alloy made of Cu-Ni-P, so that the copper conductor pattern , Cu-
It was presumed that Ni-P and tin would come into contact with an acid, an oxidizing agent, or an electrolyte solution such as a soft etching solution, and a local battery reaction would proceed to dissolve the conductor circuit. Based on such presumption, the inventors completely covered the conductor circuit with a coating layer, and further provided a roughening layer on this coating layer for ensuring adhesion with the resin insulating layer, whereby the conductor circuit was formed. The inventors have found that the above-mentioned problem can be solved by suppressing the local battery reaction that dissolves, and have arrived at the present invention.

That is, the gist of the present invention is as follows. (1) In a multilayer printed wiring board having a structure in which an interlayer insulating layer is formed on a substrate on which a conductor circuit is provided, nickel, cobalt, or copper-nickel- A multilayer printed wiring board, wherein a coating layer made of at least one kind selected from a phosphorus alloy is formed, and a roughened layer made of a copper-nickel-phosphorus needle-like alloy is formed on the coating layer. It is. (2) In a multilayer printed wiring board having a structure in which an interlayer insulating layer is formed on a substrate on which a preceding conductor circuit is provided, and a subsequent conductor circuit is formed on the interlayer insulating layer, Has at least one type selected from nickel, cobalt, and a copper-nickel-phosphorus alloy, which has an opening for a via hole, and has an entire surface including a side surface of the preceding conductive circuit provided on the substrate. A coating layer consisting of: a roughened layer made of a copper-nickel-phosphorus needle-shaped alloy is formed on the coating layer, and the subsequent conductor circuit formed on the interlayer insulating layer is A multilayer printed wiring board, wherein the multilayer printed wiring board is electrically connected to the preceding conductor circuit via the roughened layer and the covering layer exposed from an opening.

In the multilayer printed wiring board according to the above (1) or (2), the conductor circuit is made of copper, and the surface of the roughened layer has an ionization tendency larger than that of copper and equal to or less than titanium. It is preferable that a metal layer or a noble metal layer containing at least one metal is coated. Also,
The coating layer and the roughened layer are preferably made of a needle-shaped alloy of copper, nickel and phosphorus. Further, the thickness of the coating layer is 1 to 10 μm, and the thickness of the roughened layer is 1 to 5 μm.
It is preferable that

(1) A method for manufacturing a multilayer printed wiring board by forming an interlayer insulating layer on a substrate provided with a preceding conductor circuit, and further forming a subsequent conductor circuit on the interlayer insulating layer, The substrate provided with the preceding conductor circuit is immersed in a plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite, and copper, nickel, and nickel are coated on the entire surface including the side surfaces of the conductor circuit. And depositing and growing a needle-shaped alloy comprising phosphorus, forming a coating layer and simultaneously forming a roughened layer on the coating layer, and then forming an interlayer insulating layer on the substrate on which the conductor circuit is provided. And a method of manufacturing a multilayer printed wiring board, further comprising forming a subsequent conductive circuit on the interlayer insulating layer. A method of manufacturing a multilayer printed wiring board by forming an interlayer insulating layer on a substrate provided with a preceding conductor circuit, and further forming a subsequent conductor circuit on the interlayer insulating layer, comprising the steps of: The substrate provided with the circuit is immersed in a plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite, and the entire surface including the side surfaces of the conductor circuit is converted from copper, nickel, and phosphorus. A needle-like alloy is deposited and grown to form a coating layer, and at the same time, a roughened layer is formed on the coating layer. Then, an interlayer insulating layer is provided on the substrate on which the conductive circuit is provided, and the interlayer insulating layer is formed. After the opening is provided, a subsequent conductor circuit is further formed on the interlayer insulating layer, and the preceding conductor circuit provided on the substrate and the subsequent conductor circuit on the interlayer insulating layer are connected to the opening. Electrically through the roughening layer and the coating layer exposed from the part A method for manufacturing a multilayer printed wiring board, characterized in that the connection.

In the manufacturing method according to the above (3) or (4), the substrate provided with the preceding conductor circuit is formed by plating a substrate with a plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite. While immersed in the substrate, vibrating or rocking the substrate, a needle-shaped alloy consisting of copper, nickel and phosphorus is deposited and grown on the surface of the conductor circuit, forming a coating layer and roughening on the coating layer at the same time Preferably, a layer is formed. Further, the substrate provided with the preceding conductor circuit is immersed in a plating solution containing a complexing agent, a copper compound, a nickel compound and hypophosphite, and the surface of the conductor circuit is made of copper, nickel and phosphorus. After the needle-like alloy starts to be deposited, it is preferable to grow the needle-like alloy while bubbling the plating aqueous solution to form a coating layer and simultaneously form a roughened layer on the coating layer.

[0013]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The multilayer printed wiring board of the present invention
Because the conductor circuit is covered with the covering layer, the conductor circuit is
There is no direct contact with electrolytes such as acids, oxidants and soft etchants. As a result, since the local battery reaction involving the conductor circuit does not occur, the conductor circuit itself does not melt. Therefore, in the multilayer printed wiring board of the present invention, there is no occurrence of disconnection of the conductor circuit or connection failure due to dissolution and separation between the inner conductor circuit and the via hole.

In the present invention, the coating layer is preferably made of at least one selected from nickel, cobalt, and a copper-nickel-phosphorus alloy. Among them, a coating layer made of a copper-nickel-phosphorus alloy is most suitable.

In the present invention, the roughened layer is preferably made of the same kind of metal as the coating layer in order to prevent a local battery reaction. That is, since the copper-nickel-phosphorus alloy layer is optimal as the coating layer, the copper-nickel-phosphorus needle-like alloy is optimal as the roughening layer.

As the roughened layer, there is a layer obtained by etching the surface of a coating layer made of nickel or cobalt, in addition to a needle-shaped alloy layer of copper-nickel-phosphorus. In the present invention, a roughened layer made of an acicular alloy of copper-nickel-phosphorus is optimal from the viewpoint of adhesion to the interlayer resin insulating layer. Here, the composition of a Cu—Ni—P alloy capable of forming a needle-shaped alloy is shown in a ternary triangular diagram (see FIG. 19). As is clear from the triangular diagram shown in this figure, the composition that can form a needle-shaped alloy is
(Cu, Ni, P) = (100,0,0), (90,10,0),
Those within the range enclosed by (90, 0, 10) are preferable.

In the present invention, the surface of the roughened layer is preferably coated with a metal layer or a noble metal layer containing at least one metal having an ionization tendency larger than that of copper and not more than titanium. By coating with such a metal layer or a noble metal layer, the contact between the electrolyte solution and the roughened layer is prevented, or the metal layer or the noble metal layer itself is dissolved by a local battery reaction to form a roughened layer or a noble metal layer. This is because the dissolution of the coating layer and the conductor circuit can be prevented.

Metals having an ionization tendency larger than copper and equal to or less than titanium include titanium, aluminum, zinc, iron, indium, thallium, cobalt, nickel, tin, lead,
At least one selected from bismuth can be used. Also, noble metals include gold, silver, platinum,
Palladium can be used.

The thickness of these metal or noble metal layers is
0.1 to 2 μm is preferred. Of these metals, tin is particularly advantageous in that a thin layer following the roughened layer can be formed by electroless displacement plating.

In the present invention, the thickness of the coating layer is 1 to
Preferably, the thickness of the roughened layer is 1 to 5 μm. The reason for this is that if the coating layer is too thin, uncovered portions may be formed on the surface of the conductor circuit, and the conductor circuit may be melted due to local battery reaction. Alternatively, it becomes difficult to maintain insulation between layers. On the other hand, if the roughened layer is too thin, the adhesion to the interlayer resin insulating layer will be poor. Conversely, if the roughened layer is too thick, it will be difficult to maintain insulation between layers or between conductors.

In the present invention, a plating method in which a copper-nickel-phosphorus alloy layer is formed as a coating layer on a conductor circuit surface and a copper-nickel-phosphorus needle-like alloy layer is formed as a roughening layer will be described. I do. In the production method of the present invention, the substrate provided with the conductor circuit is immersed in a plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite, and on the surface of the conductor circuit, copper, nickel and By depositing and growing a needle-shaped alloy made of phosphorus, at the foot of the needle-shaped alloy, the needle-shaped alloys overlap each other to form a continuous coating layer, and at the same time,
A roughened layer is formed near the top of the needle-shaped alloy.

The aqueous plating solution has a copper ion concentration, a nickel ion concentration, a hypophosphite ion concentration, and a complexing agent concentration of 2.2 × 10 ^-2 to 4.1 × 10 ^-2 mol / l and 2.2 × 10 ^-2 mol / l, respectively.
10 ^{-3 to} 4.1 x 10 ^-3 mol / l, 0.20 to 0.25 mol / l, 0.01
It is desirable to adjust so as to be about 0.2 mol / l. As the complexing agent, a hydroxycarboxylic acid such as citric acid is preferable. More specific aqueous electroless plating solutions include copper sulfate 1 to 40 g / l, nickel sulfate 0.1
6.0 g / l, citric acid 10-20 g / l, hypophosphite 10
~ 100 g / l, boric acid 10 ~ 40 g / l, surfactant 0.01 ~
It is desirable to use a plating bath having a liquid composition of 10 g / l. The surfactant is preferably an acetylene-containing polyoxyethylene surfactant, and commercially available products include Surfinol 440, Surfinol 465 and Surfinol 485 manufactured by Nissin Chemical Industries. This acetylene-containing polyoxyethylene-based surfactant includes 2,4,7,9-tetramethyl-5-decyne-4,7-diol and 3,6-dimethyl-4-
It is prepared by adding an alkylene oxide such as ethylene oxide to an alkyne diol such as octin-3,6-diol. In particular, the acetylene-containing polyoxyethylene-based surfactant preferably has a structure represented by the following chemical formula 1.

[0023]

Embedded image

According to the present invention, the substrate on which the copper conductor circuit is formed is immersed in such an aqueous plating solution, and the substrate is vibrated or rocked. It is preferable to promote the growth of the needle-shaped alloy by bubbling air after a minute to agitate and flow the plating solution to supply metal ions.
As a result, the grown alloy crystal overlaps with each other at the foot of the needle-like alloy to form a continuous coating layer, and becomes a needle-like layer near the vertex of the needle-like alloy to form a roughened layer. Thus, the coating layer and the roughened layer made of the copper-nickel-phosphorus alloy can be formed with the same plating solution. The rocking is performed by rocking the substrate vertically or horizontally once every 1 to 5 seconds.

In the present invention, after the formation of the coating layer and the roughened layer, the surface of the roughened layer is further coated with a metal layer or a noble metal layer containing at least one metal having an ionization tendency larger than copper and equal to or less than titanium. Is preferred. For example, when coating with a tin layer, tin borofluoride-thiourea or tin chloride-thiourea liquid is used. Thereby, a Sn layer having a thickness of about 0.1 to 2 μm is formed by the substitution reaction of Cu—Sn. In the case of a noble metal layer, a method such as sputtering or vapor deposition can be adopted.

In the present invention, it is desirable to use an adhesive for electroless plating as the interlayer resin insulating layer covering the conductor circuit. As the adhesive for electroless plating, heat-resistant resin particles that are soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin that becomes hardly soluble in an acid or an oxidizing agent by the curing treatment. Is best. The reason for this is that the interlayer resin insulating layer formed using such an adhesive is treated with an acid and an oxidizing agent to dissolve and remove the heat-resistant resin particles, and the roughened surface formed of an octopus-shaped anchor is formed on the surface. Is formed.

In the adhesive for electroless plating, the average particle size of the cured heat-resistant resin particles is not particularly limited, but may be about 1.5 to 10 μm.

As the heat-resistant resin, an epoxy resin, a polyimide resin, or a composite of an epoxy resin and a thermoplastic resin can be used. Examples of the thermoplastic resin to be composited include polyetherethersulfone (PES). Examples of the heat-resistant resin particles that dissolve in an acid or an oxidizing agent include epoxy resin particles (particularly, epoxy resin cured with an amine-based curing agent is preferable) and amino resin particles.

Next, one method of manufacturing a printed wiring board according to the present invention will be described. (1) First, a wiring board having an inner copper pattern formed on the surface of a core board is manufactured. The copper pattern is formed on the core substrate by etching the copper clad laminate, or
An adhesive layer for electroless plating is formed on a substrate such as a glass epoxy substrate, a polyimide substrate, a ceramic substrate, or a metal substrate, and the surface of the adhesive layer is roughened to a roughened surface, which is then subjected to electroless plating. There is a way. Further, if necessary, a roughened layer is formed on the surface of the conductor circuit. As a method of forming the roughened layer, there is an oxidation (blackening) -reduction treatment, a method of etching a copper surface along a grain boundary to form a roughened surface, and the like. Note that a through hole is formed in the core substrate, and the wiring layer on the front surface and the back surface can be electrically connected through the through hole. Further, a resin may be filled between the through hole and the conductor circuit of the core substrate to ensure smoothness. Further, the coating layer and the roughened layer according to the present invention can be formed on the surface of the conductor circuit of the core substrate and the land surface of the through hole.

(2) Next, an interlayer resin insulating layer is formed on the wiring board manufactured in the above (1). In particular, in the present invention, it is desirable to use the above-mentioned adhesive for electroless plating as an interlayer resin insulating material.

(3) After the formed adhesive layer for electroless plating is dried, openings for forming via holes are provided as necessary. In the case of a photosensitive resin, it is exposed and developed and then thermally cured. In the case of a thermosetting resin, it is thermally cured and then subjected to laser processing, so that an opening for forming a via hole is formed in the adhesive layer. Section is provided.

(4) Next, the epoxy resin particles present on the surface of the cured adhesive layer are dissolved and removed with an acid or an oxidizing agent to roughen the surface of the adhesive layer. Here, examples of the acid include phosphoric acid, hydrochloric acid, sulfuric acid, and organic acids such as formic acid and acetic acid, and it is particularly preferable to use an organic acid. This is because when the roughening treatment is performed, the metal conductor layer exposed from the via hole is hardly corroded. On the other hand, it is desirable to use chromic acid and permanganate (such as potassium permanganate) as the oxidizing agent.

(5) Next, a catalyst nucleus is applied to the wiring board whose surface of the adhesive layer is roughened. It is desirable to use a noble metal ion or a noble metal colloid for providing the catalyst nucleus, and generally, palladium chloride or a palladium colloid is used. Note that it is desirable to perform a heat treatment to fix the catalyst core. Palladium is preferred as such a catalyst core.

(6) Next, electroless plating is performed on the surface of the adhesive layer for electroless plating, and an electroless plating film is formed on the entire roughened surface. A plating resist is formed on the electroless plating film. (7) An electrolytic plating film is applied to the non-formed portion of the plating resist to form a conductor circuit and a via hole. Here, it is desirable to use copper plating as the electrolytic plating. (8) Further, after removing the plating resist, the electroless plating film is dissolved and removed with a mixed solution of sulfuric acid and hydrogen peroxide or an etching solution such as sodium persulfate and ammonium persulfate to form an independent conductor circuit. (9) In the present invention, the covering layer and the roughened layer according to the present invention are formed on the surface of the conductor circuit formed in (8).

(10) Next, an adhesive layer for electroless plating is formed on the substrate as an interlayer resin insulating layer. (11) Further, the above steps (3) to (8) are repeated to provide a further upper layer conductive circuit, thereby obtaining a six-layer double-sided multilayer printed wiring board having three layers on one side.

The above description is an example of formation by a method called a semi-additive method. In the present invention, after roughening an adhesive layer for electroless plating, a catalyst nucleus is provided, a plating resist is provided, and The present invention can be applied to a so-called full additive method in which a conductive circuit is formed by performing electrolytic plating.

The dissolution of the conductor circuit due to the local battery reaction is remarkable in the wiring board formed by the semi-additive method. Although the reason is not clear, it is considered that a large void is generated in the conductor by the semi-additive method because the electrolytic plating film is more likely to cause a local battery reaction than the electroless plating film. Therefore, the present invention is particularly advantageous in the semi-additive method. Hereinafter, the present invention will be described based on examples.

[0038]

【Example】

(Example) A. Preparation of adhesive composition for electroless plating. 60 parts by weight of a 25% acrylate of a cresol novolak type epoxy resin (manufactured by Nippon Kayaku, molecular weight 2500), 10 parts by weight of a photosensitive monomer (Aronix M325, manufactured by Toagosei Co., Ltd.), 0.5 parts by weight of an antifoaming agent and NMP are mixed with stirring. did. . 40 parts by weight of polyether sulfone (PES) and an average particle size of epoxy resin particles (Toray, Trepearl) 5.5μ
After mixing 20 parts by weight of m, NMP was further added and the mixture was stirred and mixed with a bead mill. . 5 parts by weight of an imidazole curing agent (2E4MZ-CN, manufactured by Shikoku Chemicals), 5 parts by weight of benzophenone as a photoinitiator, 0.5 parts by weight of Michler's ketone as a photosensitizer and NMP were mixed with stirring. These were mixed to prepare an adhesive composition for electroless plating.

B. Manufacturing method of printed wiring board (1) 18 μm on both sides of substrate 1 made of glass epoxy resin or BT (bismaleimide triazine) resin having a thickness of 1 mm
A copper-clad laminate on which m copper foils 8 were laminated was used as a starting material (see FIG. 1). First, the copper-clad laminate is drilled to form a plating resist, and then subjected to electroless plating to form through holes. Further, the copper foil 8 is etched in a pattern according to a conventional method to obtain a substrate. The inner copper pattern 4 was formed on both surfaces of the first substrate 1 (see FIG. 2). (2) The substrate on which the inner layer copper pattern 4 is formed is washed with water and dried, and then NaOH (10 g / l), NaClO ₂ (40 g / l), Na ₃ P
O ₄ (6 g / l) is used as an oxidation bath (blackening bath),
A roughened layer 11 was provided on the entire surface of the through hole 9. (3) The resin filler 10 was applied to both surfaces of the substrate 1 by using a printing machine to fill the space between the conductor circuits 4 or into the through holes 9 and then cured by heat treatment. That is, in this step, the resin filler 10 is filled between the inner layer copper patterns 4 or in the through holes 9 (see FIG. 3).

(4) One surface of the substrate after the treatment of the above (3) is subjected to belt sanding using a belt abrasive paper (manufactured by Sankyo Rikagaku Co., Ltd.) on the surface of the inner layer copper pattern 4 and the land surface of the through hole 9. Polishing was performed so that the resin filler 10 did not remain, and then buffing was performed to remove scratches due to the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. Then, the resin filler 10 filled in the through holes 9 and the like and the conductor circuit 4
The roughened layer 11 on the upper surface is removed, and both surfaces of the substrate are smoothed with the resin filler 10, the resin filler 10 and the side surface of the conductor circuit 4 are adhered through the roughened layer 11, and the inner wall of the through hole 9 is filled with the resin. Agent 10
Was obtained through the roughening layer 11 (see FIG. 4).

(5) Next, a coating layer 110 made of a Cu—Ni—P alloy having a thickness of 5 μm is formed on the exposed surfaces of the lands of the conductor circuit 4 and the through holes 9, and a needle-shaped Cu—Ni—P layer having a thickness of 2 μm is formed. Roughened layer 11 of alloy and thickness of 0.3 μm on surface of roughened layer 11
(See FIG. 5, the Sn layer is not shown). The forming method is as follows. That is, the substrate was alkali-degreased and soft-etched, then treated with a catalyst solution comprising palladium chloride and an organic acid to provide a Pd catalyst, and after activating this catalyst, copper sulfate 8 g / l,
Nickel sulfate 0.6 g / l, citric acid 15 g / l, sodium hypophosphite 29 g / l, boric acid 31 g / l, surfactant (Nissin Chemical Industries, Surfynol 465) 0.1 g / l,
The substrate was immersed in an electroless plating bath having a pH of 9 and the substrate was swung in the vertical direction at a rate of once every 4 seconds, and air was bubbled 3 minutes after the plating was deposited to form a copper conductor circuit. 4 and through-hole 9 on the land surface
An Ni-P coating layer 110 and a roughened layer 11 were provided. Furthermore, tin borofluoride 0.1 mol / l, thiourea 1.0 mol / l, temperature 50
C., a Cu-Sn substitution reaction was performed under the conditions of pH = 1.2,
A Sn layer having a thickness of 0.3 μm was provided on the surface of.

(6) The adhesive for electroless plating prepared in A was applied to both surfaces of the substrate using a roll coater, left in a horizontal state for 20 minutes, and then dried at 60 ° C. for 30 minutes. (See FIG. 6). (7) A photomask film on which a black circle of 100 μmφ was printed was brought into close contact with both surfaces of the substrate of the above (6), and was exposed at 500 mJ / cm ² by an ultrahigh pressure mercury lamp. This was spray-developed with a DMDG solution to form an opening serving as a 100 μmφ via hole in the adhesive layer. Further, the substrate is exposed at 3000 mJ / cm ² by an ultra-high pressure mercury lamp, and is subjected to a heat treatment to obtain a 50 μm thick opening having openings having excellent dimensional accuracy (via hole forming openings 6) corresponding to a photomask film. An interlayer resin insulating layer (adhesive layer) 2 was formed (see FIG. 7). Note that a tin plating layer (not shown) was partially exposed in the opening 6 serving as a via hole.

(8) The substrate subjected to the treatment of (7) is treated with 800
g / l of chromic acid at 70 ° C. to dissolve and remove the resin particles on the surface of the adhesive layer, thereby making the surface of the adhesive layer 2 rough, and then neutralizing solution (manufactured by Shipley Co.) And then washed with water (see FIG. 8). Further, by applying a palladium catalyst (manufactured by Atotech) to the surface of the substrate subjected to the surface roughening treatment, a catalyst nucleus was attached to the surface of the interlayer resin insulating layer 2 and the inner wall surface of the via hole opening 6.

(9) The substrate was immersed in an electroless copper plating bath having the following composition to form an electroless copper plating film 12 on the entire rough surface (see FIG. 9). [Electroless plating solution] EDTA 150 g / l Copper sulfate 20 g / l HCHO 30 ml / l NaOH 40 g / l α, α'-bipyridyl 80 mg / l PEG 0.1 g / l [Electroless plating conditions] 70 ° C. 30 minutes at liquid temperature

(10) The electroless copper plating film formed in the above (9)
A commercially available photosensitive dry film was stuck on 12 and a mask was placed thereon, exposed at 100 mJ / cm ² , developed with 0.8% sodium carbonate, and provided a plating resist 3 (see FIG. 10).

(11) Then, electrolytic copper plating was performed under the following conditions to form an electrolytic copper plating film 13 (see FIG. 11). [Electroplating solution] Sulfuric acid 180 g / l Copper sulfate 80 g / l Additive (Capalaside G, manufactured by Atotech Japan)
L) 1 ml / l [Electroplating conditions] Current density 1A / dm ² hours 30 minutes Temperature Room temperature

(12) After stripping and removing the plating resist 3 with 5% KOH, the electroless plating film under the plating resist 3
12 is etched and dissolved away to remove the electroless copper plating film.
A conductor circuit (including a via hole) 5 composed of 12 and an electrolytic copper plating film 13 was formed (see FIG. 12). (13) The substrate on which the conductor circuit 5 is formed is subjected to the same treatment as in (5), and a 5 μm-thick Cu-Ni-P
A coating layer 110 made of an alloy; a roughened layer 11 made of a 2 μm thick needle-like Cu—Ni—P alloy;
A μm Sn layer was provided (see FIG. 13). (14) By repeating the above steps (6) to (13), a conductor circuit of an upper layer was further formed, and a multilayer printed wiring board was manufactured (see FIGS. 14 to 18). However, the uppermost layer was not roughened.

(Comparative Example) In the processing of the steps (5) and (13) of the embodiment, the thickness was not changed without swinging and bubbling of air.
A multilayer printed wiring board was prepared in the same manner as in the example except that a roughened layer 11 made of a 0.5 μm Cu-Ni-P needle-shaped alloy and only a 0.3 μm thick Sn layer were provided on the surface of the roughened layer 11. Manufactured.

With respect to the multilayer printed wiring boards manufactured in Examples and Comparative Examples, the cross section of the surface portion of the conductor circuit was observed with an optical microscope and a scanning electron microscope to confirm whether or not the conductor circuit was dissolved. As a result, in the multilayer printed wiring board of the example, large dissolution of the conductor circuit, the coating layer, and the roughened layer was hardly observed. On the other hand, in the multilayer printed wiring board of the comparative example, dissolution of a part of the conductor circuit was observed.

[0050]

As described above, according to the present invention, it is possible to reliably prevent the conductor circuit from melting due to a local battery reaction, and to improve the connection reliability between the inner conductor circuit and the via hole, thereby improving the connection reliability. A wiring board can be provided.

[Brief description of the drawings]

FIG. 1 is a view showing each manufacturing process of a multilayer printed wiring board according to the present invention.

FIG. 2 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 3 is a view showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 4 is a view showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 5 is a view showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 6 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 7 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 8 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 9 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 10 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 11 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 12 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 13 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 14 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 15 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 16 is a diagram showing each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 17 is a diagram illustrating each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 18 is a diagram illustrating each manufacturing process of the multilayer printed wiring board according to the present invention.

FIG. 19 is a triangular diagram showing the composition of a Cu—Ni—P alloy.

[Explanation of symbols]

 Reference Signs List 1 substrate 2 interlayer resin insulation layer (adhesive layer for electroless plating) 3 plating resist 4 inner layer conductor circuit (inner layer copper pattern) 5 outer layer conductor circuit (outer layer copper pattern) 6 via hole opening 7 via hole 8 copper foil 9 through Hole 10 Resin filler 11 Roughening layer 110 Coating layer 12 Electroless plating film 13 Electrolytic plating film

──────────────────────────────────────────────────続 き Continuing on the front page (72) Inventor Tomoyuki Fujinami 1-1-6 Yoshiyukizaka, Fujisawa-shi, Kanagawa Prefecture Ebara Ujilight Co., Ltd. Central Research Laboratory (72) Inventor Shinji Hayashi 1-1, Yoshiyukizaka, Fujisawa-shi, Kanagawa Prefecture 6 EBARA Eugerite Co., Ltd. Central Research Laboratory (56) References JP-A-9-153669 (JP, A) JP-A-9-162514 (JP, A) (58) Fields surveyed (Int. Cl. ⁷ , DB) (Name) H05K 3/46 H05K 3/38

Claims (8)

(57) [Claims] 1. A multilayer printed wiring board having a structure in which an interlayer insulating layer is formed on a substrate on which a conductor circuit is provided, on the entire surface including the side surfaces of the conductive circuits, nickel, co
Baltic or small alloys selected from copper-nickel-phosphorus alloys
At least one kind of coating layer is formed and
Of copper-nickel-phosphorus needle-shaped alloy on the coating layer
A multilayer printed wiring board, wherein a layer is formed . 2. A multilayer printed wiring board having a structure in which an interlayer insulating layer is formed on a substrate provided with a preceding conductor circuit, and a subsequent conductor circuit is formed on the interlayer insulating layer. Wherein the interlayer insulating layer has an opening for a via hole and includes a side surface of a preceding conductive circuit provided on a substrate .
Nickel, cobalt, or copper-nickel on all surfaces
Coating of at least one kind selected from ru-phosphorus alloy
A layer is formed and a copper-nickel
A roughened layer made of a ruthenium needle-like alloy is formed, and the subsequent conductor circuit formed on the interlayer insulating layer is
Through the roughening layer and the coating layer exposed from the opening,
A multilayer printed wiring board electrically connected to a conductor circuit . 3. The conductor circuit is made of copper, and a metal layer or a noble metal layer containing at least one metal having a higher ionization tendency than copper and not more than titanium is formed on the surface of the roughened layer by coating. The multilayer printed wiring board according to claim 1, wherein: 4. The coating layer has a thickness of 1 to 10 μm, and the roughened layer has a thickness of 1 to 5 μm.
The multilayer printed wiring board according to any one of the above. 5. A multilayer printed wiring board is manufactured by forming an interlayer insulating layer on a substrate provided with a preceding conductive circuit, and further forming a subsequent conductive circuit on the interlayer insulating layer. In the method, the substrate provided with the preceding conductor circuit is immersed in a plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite , and is applied to the entire surface including the side surfaces of the conductor circuit. ,
A needle-shaped alloy consisting of copper, nickel and phosphorus is deposited and grown to form a coating layer and, at the same time, a roughened layer is formed on the coating layer.
Is formed and then, after the conductor circuit is provided with an interlayer insulating layer over a substrate provided with further succeeding to the interlayer insulating layer
A method for producing a multilayer printed wiring board, characterized by forming a conductive circuit of (1). 6. An interlayer insulating layer is formed on a substrate provided with a preceding conductor circuit, and a subsequent conductive layer is formed on the interlayer insulating layer.
In a method of manufacturing a multilayer printed wiring board by forming a body circuit , a substrate provided with a preceding conductor circuit is immersed in a plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite. , On all surfaces including the side of the conductor circuit,
A needle-shaped alloy consisting of copper, nickel and phosphorus is deposited and grown to form a coating layer and, at the same time, a roughened layer is formed on the coating layer.
Is formed, and then an interlayer insulating layer is provided on the substrate on which the conductive circuit is provided, and after forming an opening in the interlayer insulating layer, a subsequent conductive circuit is further formed on the interlayer insulating layer, Leading conductor circuit provided on the substrate and trailing conductor circuit on the interlayer insulating layer
Wherein the conductive circuit is electrically connected to the roughened layer exposed from the opening through a cover layer. 7. A substrate provided with the preceding conductor circuit is immersed in a plating aqueous solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite, and the substrate is vibrated or rocked. , The entire surface including the side of the conductor circuit
Then, a needle-shaped alloy consisting of copper, nickel and phosphorus is deposited and grown to form a coating layer and at the same time a rough coating is formed on the coating layer.
The method according to claim 5 , wherein a passivation layer is formed . 8. A substrate provided with the preceding conductor circuit is immersed in an aqueous plating solution containing a complexing agent, a copper compound, a nickel compound, and hypophosphite, and a side surface of the conductor circuit is provided.
The entire surface including copper, after the needle-like alloy of nickel and phosphorus is started precipitated, by growing the acicular alloy while subjecting the bubbling to the plating solution, the
At the same time as forming the covering layer, forming a roughened layer on the covering layer
The method according to claim 5 or 6, characterized in that that.