JPH10126057A - Manufacture of multilayer interconnection board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent the permeation of an electroless plating solution into the internal wall of a through hole by only coating the internal surface of the through hole with an electroless-plated nickel layer and forming a plating resist layer on the surface of a multilayered wiring board and, after roughening the surface of an adhesive layer, forming a conductor pattern with electroless-plated copper films including the inside of the through hole. SOLUTION: Protective layers 4 are formed on both surface of a multilayer interconnection board 19 by laminating adhesive films having acid and alkali resistances and through holes 5 are bored at necessary spots. After a catalyst for electroless plating 8 is applied to the entire surface of the board 19 including the internal surfaces of the through holes 5 and the protective layers 4 composed of the adhesive films are removed, nickel layers 6 are formed in the through holes 5 by dipping the board 19 in an electroless nickel plating solution and a plating resist layer 7 is formed on the surface of the board 19 after the surface is polished. Then the surface of an adhesive layer 3 is roughened by dipping the board 19 in a sulfuric acid-based chemical etchant and a plated copper layer 8 is formed on the internal surfaces of the holes 5 and the surface of the multilayer interconnection board 19 by dipping the board 19 in an electroless copper plating solution. The plated nickel player 6 prevents the erosion of the holes 5 by the chemical etchant.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a multilayer wiring board by a full additive method.

[0002]

2. Description of the Related Art As a first prior art, FIGS.
(B), the manufacturing process of the multilayer wiring board 38 according to the etched foil method will be specifically described based on FIGS. 9 (c) to 9 (d) and FIG. 10 (e).

First, as shown in FIG. 8A, a glass epoxy copper clad laminate 31 in which an insulating layer 22 and an outer copper foil 30 are laminated on an inner layer circuit 21 is used. 25 (FIG. 8 (b)), and then a conductive connection hole 33 made of 34 layers of electrolytic copper plating is formed (FIG. 8 (b)).
(C)) Next, an etching resist 35 (photosensitive dry film) is laminated, and a negative mask 32
UV exposure 36 is performed using (FIG. 9D).
Dilute alkali development (Anhydrous Na ₂ Co ₃ aqueous solution 1 ± 0.3wt
%, Temperature 30 ± 2 ° C.), immersed in an aqueous ferric chloride solution to remove unnecessary copper foil 30 by etching, and peeled off the etching resist with a 2.5 to 3.0 wt% aqueous solution of caustic soda,
A desired conductor pattern 29 can be formed (FIG. 10).
(E)). However, the etched foil method 38 has a problem in that the precision of the conductor pattern 29 is reduced due to side etching, copper migration, and the like.

[0004] As a second prior art, recently, an electroless copper plating 28 which is effective for improving the accuracy of the conductor pattern 29 and the like.
Attention has been paid to a full additive method 39 for forming the conductor pattern 29 using only the conductor pattern 29. As a method of manufacturing the multilayer wiring board 39 by the full additive method, a CC-41 method is known. Hereinafter, FIGS. 11A and 11B and FIG.
Based on (e), the manufacturing process of the multilayer wiring board 39 according to the full additive method will be specifically described.

First, as shown in FIG. 11A, a multilayer wiring in which an insulating layer 22 containing a catalyst and an adhesive layer 23 are laminated on an inner circuit board 21 such as a glass epoxy base material containing an electroless copper plating 28 catalyst. Through holes 25 are selectively drilled in the plate 19 using the plate 19 (FIG. 11 (b)), and then smear is removed by a process consisting of treatment with chromic acid and neutralization with sodium sulfite. An electroless copper plating 28 catalyst is applied in the holes 25 to form a plating resist layer 27 (FIG. 12 (c)), and the adhesive layer 23 is further roughened with a chemical etching solution such as a chromic acid-sulfuric acid-based mixed solution. After the surface 37 (FIG. 12D), a conductor pattern 29 including the inside of the hole 25 is formed by electroless copper plating 28, and a desired fully additive multilayer wiring board 39 is obtained (FIG. 12E). .

[0006]

When the multilayer wiring board 39 is manufactured by the conventional full additive method (such as the CC-41 method and the AP-2 method), as a pretreatment step of the electroless copper plating 28, chromic acid Roughening 37 of the adhesive layer 23 by a chemical etching method using a sulfuric acid-based mixed solution or the like is included.

At this time, not only the surface of the adhesive layer 23 is roughened 37, but also the resin and glass cloth on the inner wall of the through hole 25 are eroded. For this reason, in the electroless copper plating 28, there is a problem that the plating solution permeates between the glass cloths or between the glass cloth and the resin, and the copper 28 is deposited, so that the electric insulation property is lowered and the electric corrosion resistance is deteriorated.

[0008] In the case of the AP-2 method, a catalyst for electroless copper plating 8 is applied to the entire surface including the inside of the through hole 25, and then the plating resist layer 27 is formed under the plating resist layer 27. However, there is a problem that a high concentration of the catalyst exists, and as a result, the surface resistance decreases.

Accordingly, the present invention is intended to solve the drawbacks such as a decrease in electrical insulation and corrosion resistance, a decrease in surface resistance and a decrease in connection reliability due to the penetration of the electroless copper plating solution 8 into the inner wall of the through hole 5. It is intended to provide a method for manufacturing the multilayer wiring board 19.

[0010]

According to the present invention, there is provided an inner circuit board 1 comprising:
Is a method of using a multilayer wiring board 19 in which an insulating layer 2 and an adhesive layer 3 containing a catalyst for electroless copper plating 8 are laminated. First, protective layers 4 are formed on both surfaces of the multilayer wiring board 19, Next, a through hole 5 is formed in this, and then the through hole 5 is formed.
After applying a catalyst for electroless copper plating 8 to the entire surface including the inside and removing the protective layer 4, only the inner wall of the hole 5 is covered with an electroless nickel plating layer 6, a plating resist layer 7 is formed, and an adhesive layer is formed. 3 is a method for manufacturing a multilayer wiring board 19, comprising forming a conductive pattern 9 including the inside of a hole 5 by electroless copper plating 8 after roughening 11 a surface.

After removing the protective layer 4 in the same manner as described above, a plating resist layer 7 is formed, only the inner wall of the hole 5 is covered with the electroless nickel layer 6, and the adhesive layer 3 is roughened.
Thereafter, a conductive pattern 9 including the inside of the hole 5 is formed by electroless copper plating 8, which is a method for manufacturing a multilayer wiring board 19.

The electroless nickel plating layer 6 of the present invention covering the inner wall of the through-hole 5 is made of a chemical etching solution such as a chromic acid-sulfuric acid-based mixed solution used to roughen the adhesive layer 3. It serves to prevent erosion of the inner wall and to act as a catalyst for electroless copper plating 8 in a later step. The thickness of the electroless nickel layer 6 may be any plating film composition and thickness satisfying the above-mentioned role, and the thickness is usually preferably 0.1 μm or more. When the thickness is less than 0.1 μm, the durability to a chemical etching solution is often poor.

After the surface of the adhesive layer 3 is roughened 11 and before the electroless copper plating 8 is performed, the surface of the nickel film 6 on the inner wall of the hole 5 is activated so that the electroless copper The deposition property of the plating 8 and the adhesion between the plating layers can be further enhanced. This activation treatment includes, in addition to a general nickel activator, for example, hydrochloric acid, nitric acid, phosphoric acid, etc., a persulfate solution such as ammonium persulfate or sodium persulfate, or a solid acid solution containing fluoride. And a nitric acid solution containing fluoride.

Therefore, by using the method for manufacturing the multilayer wiring board 19 of the present invention, the inner wall of the hole 5 can be electrolessly plated with copper.
It is possible to solve problems such as a decrease in electrical insulation and electrolytic corrosion resistance, a decrease in surface resistance and a decrease in reliability due to liquid seepage.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION The protective layer 4 of the present invention is formed by providing a protective film 4 on the adhesive layer 3 which is not affected by the smear removing and catalyst applying steps and which can be removed by electroless copper. The plating 8 catalyst can be prevented from adhering to the surface of the adhesive layer 3. Further, since the nickel plating layer 6 is excellent in corrosion resistance, it is hardly eroded by the chemical etching solution. Therefore, before the surface 11 of the adhesive layer 3 is roughened by the chemical etching solution, the inner wall of the hole 5 is covered with the nickel plating layer 6 so that the chemical etching solution erodes the resin and glass cloth on the inner wall of the hole 5. Can be prevented.

Even if the nickel plating solution 6 permeates between the glass cloth on the inner wall of the hole 5 or between the glass cloth and the resin,
Nickel not only has a higher specific resistance than copper, but also has a low ionization tendency, and migration due to migration of copper ions is less likely to occur. Further, since the nickel plating 6 has better throwing power of the plating than the copper plating 8, the adhesion to the inner wall surface of the hole 5 is improved.

Further, the adhesive layer 3 made of a chemical etching solution is used.
After the surface roughening 11, the surface of the nickel film 6 on the inner wall of the hole 5 is activated to further enhance the deposition property of the electroless copper plating 8 on the nickel film 6 and the adhesion between the platings.

According to the present invention described above, it is possible to improve the reliability of the multilayer wiring board 19 such as electrical insulation, electric corrosion resistance and surface resistance (see FIG. 1).

[0019]

FIG. 2A to FIG. 2C show an embodiment of the present invention.
(B), and will be described in further detail with reference to FIGS. 3 (c) to 3 (e) and FIG. 4 (f).

[0020]

Embodiment 1 First, FIG. 2A shows a multilayer wiring board 19 in which an insulating layer 2 and an adhesive layer 3 containing an electroless copper plating catalyst are laminated on an inner circuit board 1 made of a glass epoxy substrate. ,

Next, as shown in FIG. 2B, an adhesive film having acid resistance and alkali resistance is laminated on both surfaces of the multilayer wiring board 19 to form a protective layer 4.

As shown in FIG. 3 (c), a through hole 5 is formed in a necessary portion by means of a drill.

Next, as shown in FIG. 3D, after the smear is removed (immersed in an alkaline sodium permanganate solution), the inner wall of the hole 5 is removed using an alkaline ion type catalyst (palladium-amine complex) solution. After applying an electroless plating 8 catalyst to the entire surface including the protective layer 4 and peeling off the adhesive film of the protective layer 4, it was immersed in an electroless nickel 6 solution (Nippon Kanigen Shumer S754, plating solution temperature 75 to 80 ° C) for 5 minutes. Then, a nickel layer 6 having a thickness of about 1 μm is formed on the inner wall of the through hole 5.

Further, as shown in FIG. 3E, the surface of the multilayer wiring board 19 is polished by means of a belt sander in order to enhance the adhesion of the plating resist layer 7, and the plating resist layer 7 is polished.
To form

Next, as shown in FIG. 4 (f), the surface of the adhesive layer 3 is roughened 11 by immersion in a chromic acid-sulfuric acid based chemical etching solution, and then immersed in the electroless copper plating 8 solution. By forming the copper plating layer 8 and the conductor pattern 9 on the inner wall and the surface of the through hole 5, a desired multilayer wiring board 19 is obtained.

[0026]

Example 2 Multilayer wiring was performed in the same manufacturing process as in Example 1, except that the electroless nickel 6 solution was replaced by Okuno Pharmaceutical's Top Nicolon E (plating solution temperature 80-85 ° C, plating immersion time 7 minutes). A plate 19 is obtained.

[0027]

Embodiment 3 In the same manufacturing process as in Embodiment 1, a multilayer wiring board 1 in which an inner circuit board 1, an insulating layer 2 and an adhesive layer 3 are laminated
9 (FIG. 2A), an alkaline peeling type acid-resistant ink is printed to form a protective layer 4 (FIG. 2B). Next, through holes 5 are drilled in necessary places by means of drilling (drill) (FIG. 3C), and the multilayer wiring board 19 is smeared (immersed in a chromic anhydride solution). A catalyst for electroless copper plating 8 is applied to the entire surface including the inside of the hole 5 using a tin alloy colloid solution.

Next, after the protective layer 4 was peeled off with a 5 wt% aqueous solution of sodium hydroxide, the electroless nickel plating 6 solution (Top Nicolon E manufactured by Okuno Pharmaceutical Co., Ltd., plating solution temperature 80-85)
C.) for 15 minutes to form a nickel layer 6 having a thickness of about 2 μm on the inner wall of the hole 5 (FIG. 3D). Hereinafter, a multilayer wiring board 19 is obtained through the same manufacturing steps as in Example 1 (see FIGS. 3E and 4F).

[0029]

Example 4 An electroless copper plating 8 was prepared by using a multilayer wiring board 19 in which an insulating layer 2 containing a catalyst and an adhesive layer 3 were laminated on an inner circuit board 1 made of a glass epoxy base material containing a catalyst. The multilayer wiring board 19 is obtained in the same manufacturing process.
(F)).

[0030]

Comparative Example 1 A multilayer wiring board 19 having an inner circuit board 1, an insulating layer 2, and an adhesive layer 3 laminated in the same manufacturing process as in Example 4.
Then, through holes 5 are formed at necessary places by means of drilling.

Next, the smear is removed (immersed in a chromic anhydride solution), and then a catalyst for electroless copper plating 8 is applied to the entire surface including the inner wall of the hole 5 using a palladium-tin alloy colloidal solution. The surface of the multilayer wiring board 19 is polished with a belt sander in order to remove and enhance the adhesion of the plating resist layer 7 to form the plating resist layer 7. Less than,
A multilayer wiring board is obtained in the same manner as in the first embodiment.

As described above, with respect to the obtained multilayer wiring board 19,
The penetration amount of the electroless copper plating solution 8 into the inner wall of the hole 10, the electric corrosion resistance between the adjacent holes 10 and the insulation resistance between the surface circuits were measured, and the results (Table 1) are described below. .

[0033]

Table 1 shows the measurement results of the amount of plating penetration (μm), electrolytic corrosion (Ω), insulation resistance (Ω), and the like. The cross section of the conductive connection hole 10 was observed and measured with an optical microscope. Insulation resistance value after applying DC 50 V between the holes 10 to 10 (0.4 mm) and leaving it to stand at 85 ° C. and 85% RH for 1000 hours. Insulation resistance between circuits (0.2 mm).

As is clear from Table 1, according to the present invention, the penetration of the electroless copper plating solution 8 into the inner wall of the hole 5 is eliminated, and the insulation resistance after the electrolytic corrosion test, the insulation resistance between circuits, etc. Thus, a multilayer wiring board 19 capable of improving the reliability of the various characteristics described above can be obtained.

[0035]

Fifth Embodiment In the same manner as in the third embodiment, a multilayer wiring board in which an inner circuit board 1, an insulating layer 2, an adhesive layer 3 (FIG. 5 (a)) and a protective layer 4 of an ultraviolet-curable alkali-soluble ink are laminated. Using FIG. 19 (FIG. 5 (b)), a through hole 5 is formed by a drill (FIG. 6 (c)).

Next, a CrO ₃ concentration of 940 to 960 g /
After performing treatment at a temperature of 30 to 34 ° C. for 20 minutes using 1 chromic acid solution, the smear removing step of washing with water, neutralizing / reducing treatment with a sodium bisulfite solution, and washing with water is repeated twice. Thereafter, a catalyst for electroless copper plating 8 is applied to the entire surface including the inside of the hole 5 using a palladium-tin alloy colloid solution. Then, the protective layer 4 was treated with a 5% aqueous sodium hydroxide solution.
After peeling off, the surface of the multilayer wiring board 19 is polished with a belt sander in order to enhance the adhesion of the plating resist layer 7, thereby forming the plating resist layer 7 (FIG. 6D).

Thereafter, six electroless nickel plating solutions (Schumer S-754 manufactured by Nippon Kanigen Co., Ltd., plating solution temperature 78-
(81 ° C.) for 12 minutes to form a nickel layer 6 having a thickness of about 2 μm on the inner wall of the hole 5 (FIG. 6E).

Next, the adhesive layer 3 is immersed in a chromic acid-sulfuric acid type chemical etching solution to roughen the surface of the adhesive layer 3.
0 to 170 g / l ammonium persulfate solution (temperature 25
C) for 5 minutes to activate the surface of the nickel film 6 on the inner wall of the hole 5, and then dipped in electroless copper plating 8 to form a 35 μm copper plating layer 8 on the inner wall and surface of the hole 5. Is obtained (FIG. 7F).

[0039]

Embodiment 6 The smear removing step of the embodiment 5 is carried out by a CrO ₃ concentration of 15 to 20 g / l, a sulfuric acid concentration of 380 to 420 ml / l,
Using a mixed solution of chromic acid-sulfuric acid-fluoride having a sodium fluoride concentration of 5 to 10 g / l at a temperature of 36 ° C. for 5 minutes, washing with water, neutralizing / reducing treatment with a sodium hydrogen sulfite solution, and washing with water to remove smears A multilayer wiring board 19 is obtained in the same manner except that the process is replaced (FIG. 7F).

[0040]

EXAMPLE 7 The smear removing step of Example 5 was carried out using a chromic acid solution having a CrO ₃ concentration of 940 to 960 g / l (temperature 30 to 3).
4 ° C., time 20 minutes), water washing, neutralization / reduction treatment, and water washing, followed by a CrO ₃ concentration of 5 to 10 g / l, a sulfuric acid concentration of 380 to 420 ml / l, and a sodium fluoride concentration of 5
A multilayer was prepared in the same manner except that a treatment with a chromic acid-sulfuric acid-fluoride mixed solution of 10 to 10 g / l (temperature: 36 ° C., time: 3 minutes), water washing, neutralization / reduction treatment, and a smear removing step of water washing were performed. The wiring board 19 is obtained (FIG. 7F).

Embodiment 8 A multilayer wiring board 19 is obtained in the same manner as in Embodiment 5, except that the activation treatment of the surface of the nickel film 6 is omitted.
(F)).

As described above, with respect to the multilayer wiring boards 19 obtained in Examples 5 to 8 and Comparative Example 1, the penetration amount of the electroless copper plating solution 8 into the inner wall of the hole 10 and the electric current between the adjacent holes 10 to 10 were measured. Evaluation of corrosion resistance, insulation resistance, adhesion between inner wall surface of hole 10 and plating layer, connection reliability by hot oil test,
The results (Table 2) are described below. Margin below.

Table 2 shows the evaluation results of connection reliability.

[Table 2] The cross section of the hole 10 was observed and measured with an optical microscope. Insulation resistance value after applying DC 50 V between the holes 10 to 10 (0.4 mm) and leaving it to stand at 85 ° C. and 85% RH for 1000 hours. Insulation resistance between circuits (0.2 mm). After being immersed in a 260 ° C. solder bath for 20 seconds and left standing for 10 seconds three times, the cross section of the hole 10 was observed with a microscope (400 × magnification). In a hot oil test (immersion in oil at 260 ° C for 5 seconds, immersion in normal temperature water for 5 seconds as one cycle), the series resistance of 800 holes was measured, and the number of cycles at which the resistance increased by 10% or more of the initial value was determined. I failed.

As is apparent from Table 2, according to the present invention, the penetration of the electroless copper plating solution 8 into the inner wall of the hole 5 is eliminated, and the insulation resistance after the electrolytic corrosion test and the insulation resistance between circuits are also reduced. In addition to being able to improve, it is possible to obtain the multilayer wiring board 19 that can improve the adhesion of the plating layer in the hole 10 and the connection reliability.

FIG. 1 shows an embodiment of the present invention in which a nickel plating layer 6 is formed on the inner wall of a through hole 5 of a conductive connection hole 10.
Thereafter, the surface of the nickel plating layer 6 is activated to form the multilayer wiring board 19 on which the electroless copper plating layer 8 is formed.

[0045]

As described above, according to the present invention, in the multilayer wiring board 19, the catalyst for the electroless copper plating eight-solution is attached to the surface of the adhesive layer 3 and the electroless copper is Since the penetration of the plating 8 can be prevented and the electrical insulation, the corrosion resistance, the connection reliability, and the like can be improved, the following specific effects can be obtained.

(1) According to the present invention, a protective layer 4 that can be peeled off without being affected by the smear removal and catalyst application steps is provided on the adhesive layer 3, and the surface of the adhesive layer 3 is further etched with a chemical etching solution. Before the surface roughening 11 step, the inner wall of the hole 5 is covered with a nickel plating layer 6 and electroless copper plating 8 solution is applied, so that the electroless copper plating 8 does not seep into the inner wall of the hole 5 and A method for manufacturing the multilayer wiring board 19 having excellent corrosion resistance, electrical insulation properties, connection reliability, and the like is obtained, and the effect of contributing to industry is extremely large.

(2) According to the present invention, as the smear removing step, an alkaline permanganate solution, a chromic acid solution,
By performing the treatment using the mixed solution of chromic acid-sulfuric acid-fluoride, the multilayer wiring board 19 capable of forming a good inner wall surface state of the hole 5 is obtained.

(3) According to the present invention, after roughening the adhesive layer 3 with a chromic acid-sulfuric acid-based chemical etching solution, 11
By activating the surface of the nickel film 6 on the inner wall of the hole 5, the deposition property of the electroless copper plating 8 on the nickel film 6 and the adhesion between the platings can be further increased, and the connection reliability can be further improved. The obtained multilayer wiring board 19 is obtained.

[Brief description of the drawings]

FIG. 1 is a sectional view showing an embodiment of the present invention.

FIGS. 2A and 2B are cross-sectional views illustrating a manufacturing process of the present invention.

FIGS. 3 (c) to 3 (e) are cross-sectional views illustrating a manufacturing process of the present invention.

FIG. 4 (f) is a sectional view showing a manufacturing step of the present invention.

FIGS. 5A and 5B are cross-sectional views illustrating a manufacturing process of the present invention.

FIGS. 6 (c) to 6 (e) are cross-sectional views showing a manufacturing process of the present invention.

FIG. 7 (f) is a sectional view showing a manufacturing step of the present invention.

8A and 8B are cross-sectional views showing a conventional manufacturing process.

FIGS. 9C to 9D are cross-sectional views illustrating a conventional manufacturing process.

FIG. 10E is a cross-sectional view showing a conventional manufacturing process.

11A and 11B are cross-sectional views showing a conventional manufacturing process.

12 (c) to 12 (e) are cross-sectional views showing a conventional manufacturing process.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 inner circuit board 2 insulating layer 3 adhesive layer 4 protective layer 5 through hole 6 nickel plating layer (electroless) 7 plating resist layer 8 copper plating layer (electroless) 9 conductor pattern 10 …
Conductive connection hole 11 ... Roughening 12 ... Inner copper foil 19 ... Multilayer wiring board 21 of the present invention 21 ... Inner circuit board 22 ... Insulating layer 23 ... Adhesive layer 2
4 Protective layer 25 Through hole 26 Inner layer copper foil 27 Plating resist layer 28 Copper plating layer (electroless) 29 Conductor pattern 3
0 ... Outer layer copper foil 31 ... Copper clad laminate 32 ... Negative mask 33 ... Conduction connection hole 34 ... Electric copper plating layer 35 ... Etching resist (dry film) 36 ... Ultraviolet exposure 37 ... Roughening 38 ... Conventional subtract (etch) Dofoil) Multi-layer wiring board 39 ... Full-additive multi-layer wiring board of the prior art

────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] November 1, 1996

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] All figures

[Correction method] Change

[Correction contents]

[Document Name] Drawing

FIG.

FIG. 2

FIG. 3

FIG. 4

FIG. 5

FIG. 6

FIG. 7

FIG. 8

FIG. 9

FIG. 10

FIG. 11

FIG.

Claims (4)

[Claims] 1. An insulating layer (2) on a surface of an inner circuit board (1).
And a method for producing a multilayer wiring board (19) in which an adhesive layer (3) containing a catalyst is laminated by electroless copper plating (8).
Are formed, holes (5) penetrating these are formed, then the protective layer (4) is removed, electroless nickel plating (6) is applied, and the inner wall of the holes (5) is coated with a nickel layer (6). After coating, a plating resist layer (7) for electroless plating is formed on the surface of the adhesive layer (3), and the surface of the adhesive layer (3) is roughened (11). Next, a method for manufacturing a multilayer wiring board (19), comprising forming a conductor pattern (9) including the inside of a hole (5) by electroless copper plating (8). 2. An insulating layer (2) on a surface of an inner circuit board (1).
And a method for producing a multilayer wiring board (19) in which an adhesive layer (3) containing a catalyst is laminated by electroless copper plating (8).
And providing a hole (5) therethrough,
The protective layer (4) is removed, an electroless plating resist layer (7) is formed on the surface of the adhesive layer (3), electroless nickel (6) is applied, and the inner wall of the hole (5) is coated with a nickel layer (6). ), And the adhesive layer (3) is roughened (11). Next, a conductive pattern (9) including the inside of the hole (5) is formed by electroless copper plating (8).
Manufacturing method. 3. The method for manufacturing a multilayer wiring board (19) according to claim 1, wherein an adhesive film having acid resistance and alkali resistance is used for the protective layer (4). 4. The method for manufacturing a multilayer wiring board (19) according to claim 1, wherein the protective layer (4) is made of an alkali-peelable or heat-resistant ink.