JPH05136345A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH05136345A
JPH05136345A JP29536091A JP29536091A JPH05136345A JP H05136345 A JPH05136345 A JP H05136345A JP 29536091 A JP29536091 A JP 29536091A JP 29536091 A JP29536091 A JP 29536091A JP H05136345 A JPH05136345 A JP H05136345A
Authority
JP
Japan
Prior art keywords
impurity diffusion
insulating film
diffusion resistance
resistance region
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP29536091A
Other languages
Japanese (ja)
Inventor
Mika Suwada
みか 須和田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC IC Microcomputer Systems Co Ltd
Original Assignee
NEC IC Microcomputer Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC IC Microcomputer Systems Co Ltd filed Critical NEC IC Microcomputer Systems Co Ltd
Priority to JP29536091A priority Critical patent/JPH05136345A/en
Publication of JPH05136345A publication Critical patent/JPH05136345A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a high resistance by using conventional impurity diffusion regions without newly forming a low-concentration-impurity diffusion resistance in a semiconductor device. CONSTITUTION:An insulating film 4 situated directly above the part of a P-type impurity diffusion resistance region 12 is oxidized to be deeper than another insulating film 3; it is formed to be thick. Consequently, since the insulating film situated directly above the part of the P-type impurity diffusion resistance region 12 oxidizes a high-concentration part on the surface of the P-type impurity diffusion resistance region 12, the resistivity of the P-type impurity diffusion resistance region is made high and its thickness is made apparently thin. A high resistance can be obtained without changing the concentration of the P-type impurity diffusion resistance region. In addition, when the insulating film 4 on the P-type impurity diffusion resistance region 12 is made thick, an effect that a threshold voltage at which a parasitic MOS transistor is operated is made higher than that in conventional techniques is obtained simultaneously.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は半導体装置に係わり、特
に不純物拡散抵抗の構造に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a structure of impurity diffusion resistance.

【0002】[0002]

【従来の技術】従来の半導体装置の例を図2に示す。図
2は、不純物拡散抵抗の断面構造であり、P型半導体基
板6上のN型エピタキシャル層1中に形成されたP型不
純物拡散領域2の直上に一様の厚さの絶縁膜3を介して
形成した複数の金属電極4が存在している。
2. Description of the Related Art An example of a conventional semiconductor device is shown in FIG. FIG. 2 is a cross-sectional structure of an impurity diffusion resistor, in which an insulating film 3 having a uniform thickness is provided immediately above a P-type impurity diffusion region 2 formed in an N-type epitaxial layer 1 on a P-type semiconductor substrate 6. There are a plurality of metal electrodes 4 formed as described above.

【0003】これら金属電極を不純物拡散領域2の両端
部分に電気的に接続することにより、金属電極間にある
不純物拡散領域2が抵抗として動作している。
By electrically connecting these metal electrodes to both ends of the impurity diffusion region 2, the impurity diffusion region 2 between the metal electrodes operates as a resistor.

【0004】このような構造をした抵抗の抵抗値Rは次
の(1)式で表わせる。
The resistance value R of the resistor having such a structure can be expressed by the following equation (1).

【0005】 [0005]

【0006】ただし、L:金属電極間長さ(抵抗長),
W:不純物拡散領域の幅(抵抗幅),t:不純物拡散領
域の深さ(抵抗体の厚さ),ρ:抵抗率である。
However, L: length between metal electrodes (resistance length),
W: width of impurity diffusion region (resistance width), t: depth of impurity diffusion region (thickness of resistor), ρ: resistivity.

【0007】ここで、不純物拡散領域の不純物濃度によ
り抵抗率が、また半導体集積回路の製造工程により不純
物拡散領域の深さが決定されるので、次の2式のごとく
表すことができる。
Here, since the resistivity is determined by the impurity concentration of the impurity diffusion region and the depth of the impurity diffusion region is determined by the manufacturing process of the semiconductor integrated circuit, it can be expressed by the following two equations.

【0008】 [0008]

【0009】ここで、R(シート)をシート抵抗と呼び
R(シート)を一定の定数とすると(1)式は次の
(3)式のように表すことができ、抵抗値は抵抗長と、
抵抗幅の比だけで決定されている。
Here, if R (sheet) is called sheet resistance and R (sheet) is a constant, equation (1) can be expressed as equation (3) below, and the resistance value is the resistance length. ,
It is determined only by the ratio of the resistance width.

【0010】 [0010]

【0011】[0011]

【発明が解決しようとする課題】上述した従来の半導体
装置は、高抵抗を求める場合(A)シート抵抗を大きく
する,(B)P型不純物拡散領域の長さを長くする,
(C)P型不純物領域の幅を細くする,といった方法が
とられる。
In the conventional semiconductor device described above, when high resistance is required, (A) the sheet resistance is increased, (B) the length of the P-type impurity diffusion region is increased,
(C) The width of the P-type impurity region is reduced.

【0012】しかし、シート抵抗を大きくするために
は、不純物濃度を変えなければならず、新たな不純物領
域が必要となり、一方、抵抗長を長くすると拡散領域の
面積が大きくなる。又、拡散領域は熱拡散を行う際、一
定量の拡散横広がりがあり抵抗幅を補正している為、幅
を細くすると補正幅の影響が大きくなり、絶対精度が悪
くなるという問題点があった。
However, in order to increase the sheet resistance, the impurity concentration must be changed, and a new impurity region is required. On the other hand, increasing the resistance length increases the area of the diffusion region. In addition, since the diffusion region has a certain amount of lateral diffusion when performing thermal diffusion and the resistance width is corrected, if the width is narrowed, the effect of the correction width becomes large and the absolute accuracy deteriorates. It was

【0013】本発明の目的は新たな不純物領域を設けず
に、抵抗長,抵抗幅を同一として、高抵抗を得られる半
導体装置を提供することにある。
An object of the present invention is to provide a semiconductor device in which a high resistance can be obtained by providing the same resistance length and resistance width without providing a new impurity region.

【0014】[0014]

【課題を解決するための手段】本発明の特徴は、一導電
型の半導体基板表面上の反対導電型のエピタキシャル層
中に形成された一導電型の不純物拡散抵抗領域と、該不
純物拡散抵抗領域上を含む該エピタキシャル層の表面上
に形成された酸化による絶縁膜と、該絶縁膜に形成され
た一対のコンタクトホールと、該コンタクトホール内の
該エピタキシャル層の表面から該不純物拡散抵抗領域の
両端に達する一導電型の一対の引き出し不純物領域と、
それぞれの該コンタクトホール内の該引き出し不純物領
域の表面に接続し該絶縁膜上を延在する一対の金属電極
とを有する半導体装置において、前記不純物拡散抵抗領
域上の前記酸化による絶縁膜の第1の部分はその周辺の
前記絶縁膜の第2の部分よりも前記エピタキシャル層の
表面から内部に深く形成されており、これにより前記コ
ンタクトホールのそれぞれは該絶縁膜の第1の部分と第
2の部分とに跨って形成される態様となっている半導体
装置にある。
The present invention is characterized by an impurity diffusion resistance region of one conductivity type formed in an epitaxial layer of opposite conductivity type on a surface of a semiconductor substrate of one conductivity type, and the impurity diffusion resistance region. An insulating film by oxidation formed on the surface of the epitaxial layer including the above, a pair of contact holes formed in the insulating film, and both ends of the impurity diffusion resistance region from the surface of the epitaxial layer in the contact hole. A pair of extracted impurity regions of one conductivity type reaching
In a semiconductor device having a pair of metal electrodes connected to the surface of the extraction impurity region in each of the contact holes and extending on the insulating film, a first insulating film formed on the impurity diffusion resistance region by the oxidation. Part is formed deeper inward from the surface of the epitaxial layer than the second part of the insulating film in the periphery thereof, whereby each of the contact holes is formed in the first part and the second part of the insulating film. The semiconductor device has a structure in which it is formed so as to straddle the portion.

【0015】[0015]

【実施例】次に、本発明について図面を参照して説明す
る。図1は、本発明の一実施例の縦断面図である。P型
半導体基板6上のN型エピタキシャル層1の中に、熱拡
散法やイオン打込法を用いてP型不純物拡散領域12と
P型引き出し不純物領域13とを連続的に形成する。そ
してN型エピタキシャル層1の表面を全面酸化を行い絶
縁膜3を形成する。その後、ホトリソグラフィ技術を用
いて、抵抗として動作するP型不純物拡散領域12を抽
出し、絶縁膜(絶縁膜の第2の部分)3よりも深く酸化
させ厚い絶縁膜4(絶縁膜の第1の部分)を形成する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a vertical sectional view of an embodiment of the present invention. A P-type impurity diffusion region 12 and a P-type extraction impurity region 13 are continuously formed in the N-type epitaxial layer 1 on the P-type semiconductor substrate 6 by using a thermal diffusion method or an ion implantation method. Then, the entire surface of the N-type epitaxial layer 1 is oxidized to form the insulating film 3. After that, the P-type impurity diffusion region 12 that operates as a resistor is extracted by using the photolithography technique, and is oxidized deeper than the insulating film (second portion of the insulating film) 3 to make a thick insulating film 4 (first insulating film). Part) is formed.

【0016】このような構造にすると厚い絶縁膜(絶縁
膜の第1の部分)4はP型不純物拡散抵抗領域12の一
部をも酸化させて形成されているので、P型不純物拡散
抵抗領域12は厚さが薄くなったように見える。又P型
不純物拡散抵抗領域12は、酸化前には表面が濃度が高
く、N型エピタキシャル層1内に深いほど薄くなってい
るので濃度の薄い拡散領域を形成したことと同じにな
る。
With such a structure, the thick insulating film (first portion of the insulating film) 4 is formed by oxidizing a part of the P-type impurity diffusion resistance region 12, so that the P-type impurity diffusion resistance region 12 is formed. 12 appears to be thinner. The surface of the P-type impurity diffusion resistance region 12 has a high concentration before oxidation, and the deeper it is within the N-type epitaxial layer 1, the thinner it becomes. This is the same as forming a diffusion region having a low concentration.

【0017】その為シート抵抗R(シート)を大きくす
ることができる。P型不純物拡散抵抗領域12の直上に
形成された絶縁膜4の厚さを変えることにより、シート
抵抗R(シート)は数倍から十数倍にすることができ
る。
Therefore, the sheet resistance R (sheet) can be increased. By changing the thickness of the insulating film 4 formed right above the P-type impurity diffusion resistance region 12, the sheet resistance R (sheet) can be increased from several times to ten and several times.

【0018】そして絶縁膜の第1の部分4と第2の部分
3とに跨ってコンタクトホール14を形成し絶縁膜上を
延在する金属電極5を引き出し不純物領域13に接続す
る。
Then, a contact hole 14 is formed so as to extend over the first portion 4 and the second portion 3 of the insulating film, and the metal electrode 5 extending over the insulating film is connected to the extraction impurity region 13.

【0019】[0019]

【発明の効果】以上説明したように本発明は、P型不純
物拡散抵抗上に形成された、他の絶縁膜よりも厚い絶縁
膜がP型拡散層表面の濃度の高い部分を酸化して形成し
ているので、P型拡散層の厚さが見かけ上薄くなり抵抗
率も高くなる。そのため、新たな不純物領域を設けずと
もシート抵抗の高い抵抗を得ることができるという効果
を有する。
As described above, according to the present invention, the insulating film formed on the P-type impurity diffusion resistor and thicker than the other insulating films is formed by oxidizing the high concentration portion of the P-type diffusion layer surface. Therefore, the thickness of the P-type diffusion layer is apparently thin and the resistivity is high. Therefore, it is possible to obtain a high sheet resistance without providing a new impurity region.

【0020】又、拡散層上の酸化膜の厚さが厚くなって
いるので、寄生MOSトランジスタの動作するしきい値
電圧が従来のものより高くなるという効果も同時に有す
る。
Further, since the thickness of the oxide film on the diffusion layer is thick, it also has an effect that the threshold voltage at which the parasitic MOS transistor operates becomes higher than that of the conventional one.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の断面図である。FIG. 1 is a sectional view of an embodiment of the present invention.

【図2】従来の拡散抵抗の断面図である。FIG. 2 is a cross-sectional view of a conventional diffused resistor.

【符号の説明】[Explanation of symbols]

1 N型エピタキシャル領域 2,12 P型不純物拡散抵抗領域 3 絶縁膜(酸化膜) 4 絶縁膜(酸化膜)厚く形成したもの 5 拡散抵抗に接続する金属層電極 6 P型半導体基板 13 引き出し不純物領域 14 コンタクトホール 1 N-type epitaxial region 2, 12 P-type impurity diffusion resistance region 3 Insulating film (oxide film) 4 Insulating film (oxide film) thickly formed 5 Metal layer electrode connected to diffusion resistance 6 P-type semiconductor substrate 13 Extraction impurity region 14 contact holes

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 一導電型の半導体基板表面上の反対導電
型のエピタキシャル層中に形成された一導電型の不純物
拡散抵抗領域と、該不純物拡散抵抗領域上を含む該エピ
タキシャル層の表面上に形成された酸化による絶縁膜
と、該絶縁膜に形成された一対のコンタクトホールと、
該コンタクトホール内の該エピタキシャル層の表面から
該不純物拡散抵抗領域の両端に達する一導電型の一対の
引き出し不純物領域と、それぞれの該コンタクトホール
内の該引き出し不純物領域の表面に接続し該絶縁膜上を
延在する一対の金属電極とを有する半導体装置におい
て、前記不純物拡散抵抗領域上の前記酸化による絶縁膜
の第1の部分はその周辺の前記絶縁膜の第2の部分より
も前記エピタキシャル層の表面から内部に深く形成され
ており、これにより前記コンタクトホールのそれぞれは
該絶縁膜の第1の部分と第2の部分とに跨って形成され
る態様となっている事を特徴とする半導体装置。
1. An impurity diffusion resistance region of one conductivity type formed in an epitaxial layer of opposite conductivity type on the surface of a semiconductor substrate of one conductivity type, and on the surface of the epitaxial layer including on the impurity diffusion resistance region. An insulating film formed by oxidation, and a pair of contact holes formed in the insulating film;
A pair of one conductivity type extraction impurity regions reaching both ends of the impurity diffusion resistance region from the surface of the epitaxial layer in the contact hole, and the insulating film connected to the surface of the extraction impurity region in each of the contact holes. In a semiconductor device having a pair of metal electrodes extending above, the first portion of the insulating film formed by the oxidation on the impurity diffusion resistance region is formed on the epitaxial layer more than the second portion of the insulating film on the periphery thereof. Is deeply formed from the surface of the insulating film to the inside thereof, whereby each of the contact holes is formed so as to extend over the first portion and the second portion of the insulating film. apparatus.
JP29536091A 1991-11-12 1991-11-12 Semiconductor device Pending JPH05136345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29536091A JPH05136345A (en) 1991-11-12 1991-11-12 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29536091A JPH05136345A (en) 1991-11-12 1991-11-12 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH05136345A true JPH05136345A (en) 1993-06-01

Family

ID=17819616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29536091A Pending JPH05136345A (en) 1991-11-12 1991-11-12 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH05136345A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122774A (en) * 1982-01-14 1983-07-21 Toshiba Corp Semiconductor device and manufacture thereof
JPS62235766A (en) * 1986-04-07 1987-10-15 Matsushita Electronics Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58122774A (en) * 1982-01-14 1983-07-21 Toshiba Corp Semiconductor device and manufacture thereof
JPS62235766A (en) * 1986-04-07 1987-10-15 Matsushita Electronics Corp Manufacture of semiconductor device

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