JPH05136270A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To form a stable anti-fusing layer having good flatness on a lower diffusion preventing film to stabilize element characteristic by forming a pillar consisting of an upper diffusion preventing film and anti-fusing layer on a lower layer wiring after sequentially forming thereon a lower diffusion preventing film, an anti-fusing layer and an upper diffusing preventing film. CONSTITUTION:A lower diffusing preventing film 2, an anti-fusing layer 3 and an upper diffusing preventing film 4 are sequentially formed on a lower wiring 1 and the lower diffusing preventing film 2 is exposed by etching the upper diffusing preventing film 4 and anti-fusing layer 3. A pillar consisting of the upper diffusing preventing film 4 and anti-fusing layer 3 is formed and thereafter a layer insulating film 5 having apertures 6, 7 is formed. An upper wiring 8 is formed in such a manner as assuring contact with the upper diffusion preventing film 4 and lower diffusion preventing film 2 within the apertures 6, 7. Thereby, an anti-fuse layer 3 can be grown under the condition that an oxide film is not formed at the surface of the lower diffusing preventing film 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and in particular, a stable anti-fuse layer having a predetermined voltage value or more is formed on a lower diffusion preventing film to obtain stable device characteristics. The present invention relates to a method of manufacturing a semiconductor device that can be manufactured. In recent years, in semiconductor devices, a method of easily producing various circuits by forming an antifuse between wirings at the stage of trial manufacture of a circuit and then selectively shorting the fuses has been performed. There is a demand for a method of easily forming an antifuse between them with good flatness.

For this purpose, there is a demand for a method of manufacturing a semiconductor device in which an antifuse between wirings can be formed simply and stably by the pillar method.

[0003]

2. Description of the Related Art FIG. 3 is a diagram for explaining a conventional method of manufacturing a semiconductor device. In FIG. 3, reference numeral 31 is a lower layer wiring such as Al, a lower layer diffusion preventing film 32 such as TiN is formed on the lower layer wiring 31, and an opening 33 is formed on the lower layer diffusion preventing film 32.
An interlayer insulating film 34 of PSG or the like is formed. Then, an antifuse layer 35 which becomes a conductor at a predetermined voltage value such as amorphous silicon or the like and an upper diffusion preventing film 36 such as TiN are formed so as to make contact with the lower diffusion preventing film 32 in the opening 33, and the upper layer is further formed. An upper wiring 37 such as Al is formed so as to cover the diffusion prevention film 36.

Next, a method of manufacturing the semiconductor device will be described. Here, the steps from the lower layer diffusion prevention film 32 forming step on the lower layer wiring 31 to the upper layer wiring 37 forming step will be specifically described. First, as shown in FIG. 3A, Al is formed by a sputtering method or the like.
After depositing TiN on the lower layer wiring 31 to form a lower layer diffusion prevention film 32, PS is formed on the lower layer diffusion prevention film 32 by a CVD method or the like.
G is deposited to form an interlayer insulating film 34.

Next, as shown in FIG. 3B, the interlayer insulating film 34 is anisotropically etched by RIE or the like to form an opening 33 in which the lower diffusion preventing film 32 is exposed. Next, FIG.
As shown in (c), the antifuse layer 35 made of amorphous silicon and the upper diffusion prevention film made of TiN are formed so as to make contact with the lower layer diffusion prevention film 32 in the opening 33.
Form 36.

Then, by depositing Al so as to cover the upper diffusion preventing film 36 by the sputtering method or the like to form the upper wiring 37, a wiring structure as shown in FIG. 3D can be obtained.

[0007]

However, in the above-described conventional method of manufacturing a semiconductor device, the lower diffusion preventive film 32 is used.
After forming the interlayer insulating film 34 and forming the opening 33 in which the lower layer diffusion prevention film 32 is exposed in the interlayer insulating film 34, the antifuse layer 35 is formed through the wet cleaning, heat treatment process, etc. The lower layer diffusion prevention film 32 made of TiN is easily oxidized, and the lower layer diffusion prevention film 32 in the opening 33 is formed in such a state that the oxide film is generated on the surface of the TiN lower layer diffusion prevention film 32.
If the antifuse layer 35 is formed so as to make contact with, it will be difficult to form a stable antifuse layer 35 with good flatness, and the element characteristics will become unstable, such as an increase in contact resistance. was there.

Therefore, according to the present invention, the surface of the lower diffusion preventing film on which the antifuse layer is formed can be made difficult to oxidize, and a stable antifuse layer having good flatness can be formed on the lower diffusion preventing film. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can achieve stable element characteristics.

[0009]

In order to achieve the above object, a method for manufacturing a semiconductor device according to the present invention comprises a step of sequentially forming a lower diffusion preventing film, an antifuse layer and an upper diffusion preventing film on a lower wiring, and then, A step of sequentially etching the upper layer diffusion prevention film and the antifuse layer to partially expose the lower layer diffusion prevention film and partially leaving the upper layer diffusion prevention film and the antifuse layer; And a step of forming an interlayer insulating film so as to cover the lower diffusion preventing film and the remaining upper diffusion preventing film and the antifuse layer, and then etching the interlayer insulating film to form the upper diffusion preventing film. Forming an exposed opening,
Then, a step of forming an upper layer wiring so as to make a contact with the upper layer diffusion preventing film in the opening is included.

[0010]

In the present invention, as shown in FIGS.
A lower layer diffusion prevention film 2 and an antifuse layer 3 are formed on the lower layer wiring 1.
After the upper diffusion preventing film 4 is successively grown, the upper diffusion preventing film 4 and the antifuse layer 3 are etched to partially expose the lower diffusion heat preventing film 2 and partially to the upper diffusion preventing film 4. Since the pillars composed of the upper layer diffusion prevention film 4 and the antifuse layer 3 are formed while leaving the antifuse layer 3, the antifuse layer is formed on the lower layer diffusion prevention film in the opening formed in the conventional interlayer insulating film. The anti-phase layer 3 is formed on the lower diffusion prevention film 2 without the wet cleaning and heat treatment steps as in the case of forming.
Can grow. Therefore, the surface of the lower layer diffusion prevention film 2 on which the antifuse layer 3 is formed can be made difficult to oxidize, and the antifuse layer 3 is grown in a state where no oxide film is formed on the surface of the lower layer diffusion prevention film 2. You can Therefore, it is possible to form the stable antifuse layer 3 having good flatness.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to the drawings. 1 and 2 are views for explaining a method of manufacturing a semiconductor device according to an embodiment of the present invention. In FIG. 1, 1 is a lower layer wiring such as Al, and 2, 3 and 4 are lower layer diffusion preventing films 2 such as TiN sequentially formed on the lower layer wiring 1 and conductive with a predetermined voltage value such as amorphous silicon. It is an antifuse layer serving as a body, an upper diffusion preventing film such as TiN. And
Reference numeral 5 is an interlayer insulating film such as PSG having an opening 6 in which the upper diffusion prevention film 4 is exposed and an opening 7 in which the lower diffusion prevention film 2 is exposed, and 8 is an upper diffusion prevention film 4 in the opening 6. And an upper layer wiring such as Al formed so as to make contact with the lower layer diffusion prevention film 2 in the opening 7.

Next, a method of manufacturing the semiconductor device will be described. Here, the steps from the step of forming the lower layer diffusion prevention film 2 on the lower layer wiring 1 to the step of forming the upper layer wiring 8 will be specifically described. First, as shown in FIG. 1A, Ti is formed on the Al lower wiring 1.
N, amorphous silicon and TiN are sequentially deposited to sequentially form a lower diffusion prevention film 2 having a film thickness of about 1000Å, an antifuse layer 3 having a film thickness of about 1000Å, and an upper layer diffusion prevention film 4 having a film thickness of about 1000Å. Here, the TiN lower layer diffusion prevention film 2
And the TiN upper diffusion preventing film 4 are formed by a sputtering method or the like, and the amorphous silicon antifuse layer 3 is formed by CVD.
It is formed by the method.

Next, as shown in FIG. 1B, the upper diffusion barrier film 4 and the antifuse layer 3 are sequentially etched by RIE or the like to partially form pillars composed of the upper diffusion barrier film 4 and the antifuse layer 3. And the lower layer diffusion prevention film 2 is partially exposed. Next, as shown in FIG. 1C, PSG is deposited by a CVD method or the like so as to cover the remaining pillars made of the upper diffusion preventing film 4 and the antifuse layer 3 and the exposed lower diffusion preventing film 2. And film thickness 8000
The interlayer insulating film 5 having a thickness of about Å is formed.

Next, as shown in FIG. 2D, the interlayer insulating film 5 is etched by RIE or the like to etch the upper diffusion preventing film 4.
An opening 6 having an opening width of about 1 μm exposed is formed, and an opening 7 having an opening width of about 1 μm exposing the lower diffusion prevention film 2 is formed. Then, Al is deposited by a sputtering method or the like so as to make contact with the upper layer diffusion prevention film 4 in the opening 6 and the lower layer diffusion prevention film 2 in the opening 7, and the upper layer wiring 8 having a film thickness of about 1 μm is formed. By Fig. 2
The wiring structure as shown in (e) can be obtained.

As described above, in this embodiment, after the lower layer diffusion prevention film 2, the antifuse layer 3 and the upper layer diffusion prevention film 4 are sequentially formed on the lower layer wiring 1, the upper layer diffusion prevention film 4 and the antifuse layer 3 are formed. The lower layer diffusion barrier film 2 is exposed by etching and pillars composed of the upper layer diffusion barrier film 4 and the antifuse layer 3 are formed, and then the opening 6 where the upper layer diffusion barrier film 4 and the lower layer diffusion barrier film 2 are exposed. , 7 is formed, the upper wiring 8 is formed so as to make contact with the upper diffusion preventing film 4 and the lower diffusion preventing film 2 in the openings 6, 7. In this manner, after the lower layer diffusion prevention film 2, the antifuse layer 3 and the upper layer diffusion prevention film 4 are successively and continuously grown (not necessarily continuous) on the lower layer wiring 1, the upper layer diffusion prevention film 4 and the antifuse layer 4 are formed. 3 is etched to form pillars composed of the upper diffusion prevention film 4 and the antifuse layer 3, wet cleaning and heat treatment as in the case where the antifuse layer is formed on the lower diffusion prevention film in the conventional opening. The antifuse layer 3 can be grown on the lower diffusion barrier film 2 without going through the steps. Therefore, the surface of the lower layer diffusion prevention film 2 on which the antifuse layer 3 is formed can be made difficult to oxidize, and the antifuse layer 3 is grown in a state where no oxide film is formed on the surface of the lower layer diffusion prevention film 2. Thus, the stable antifuse layer 3 having good flatness can be formed. Therefore, it is possible to obtain stable element characteristics such as an increase in contact resistance being less likely to occur.

[0016]

According to the present invention, the surface of the lower diffusion preventing film on which the antifuse layer is formed can be made difficult to oxidize, and a stable antifuse layer having good flatness is formed on the lower diffusion preventing film. Therefore, there is an effect that stable element characteristics can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a diagram illustrating a method for manufacturing a semiconductor device according to an embodiment of the present invention.

FIG. 3 is a diagram illustrating a method for manufacturing a conventional semiconductor device.

Claims (1)

[Claims] 1. A step of sequentially forming a lower layer diffusion prevention film (2), an antifuse layer (3) which becomes a conductor at a predetermined voltage value or more, and an upper layer diffusion prevention film (4) on the lower layer wiring (1), Next, the upper layer diffusion barrier film (4) and the antifuse layer (3) are sequentially etched to partially expose the lower layer diffusion barrier film (2) and partially to expose the upper layer diffusion barrier film (4). And a step of leaving the antifuse layer (3), and then, the exposed lower layer diffusion prevention film (2) and the remaining upper layer diffusion prevention film (4) and the antifuse layer (3)
And a step of forming an interlayer insulating film (5) so as to cover the insulating layer (5), and then etching the interlayer insulating film (5) to form an opening (6) exposing the upper diffusion barrier film (4). A method of manufacturing a semiconductor device, comprising: a step of forming an upper wiring (8) so as to make a contact with the upper diffusion barrier film (4) in the opening (6).