JPH05136174A - Formation method of gate electrode - Google Patents

Abstract

PURPOSE:To obtain a method for manufacturing a gate electrode wherein its gate is short, its resistance is low and it has a structure which does not collapse not only during its manufacture but also after its manufacture. CONSTITUTION:A film formation layer 11 is formed on a substratum 10 by a method other than a coating method; after that, a resist pattern having an opening part 16 is formed in the formation region of a gate electrode. After that, a metal vapor-deposited layer 20 is formed in at least one part of the film formation layer by a directive vapor deposition operation. By making use of the metal vapor-deposited layer 20 as a mask, a directive etching operation is executed from the same side as its vapor deposition direction; a hole 40 is formed so as to be directed to the obliquely lower part from nearly the central part of the bottom of the opening part 16 in the resist pattern. The metal vapor-deposited layer is removed; after that, a groove 24 is dug in the substratum by making use of the hole; a gate electrode 46 is formed on the groove by a vapor deposition operation. The lower part of the gate electrode 46 is formed in the groove 24 and its upper part is formed so as to protrude on both sides of the film formation layer 14 in a well-balanced manner, As a result, there in no danger that the gate electrode collapses.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for forming a gate electrode of a semiconductor device using a compound semiconductor or the like.

[0002]

2. Description of the Related Art In the miniaturization of integrated circuits, fine processing of resist patterns is being advanced. However,
Since the resolution of the resist is also limited, there has been proposed a method of forming a gate electrode having a narrow width, that is, a so-called narrow width in the channel direction exceeding the resolution limit.

FIGS. 2 (A) to 2 (C) illustrate a conventional method of forming a narrow gate electrode, which has been proposed by the inventors of the present applicant in Japanese Patent Laid-Open No. 3-87036. FIG. 6 is a process chart for focusing on the formation of the gate electrode.

Prior to the description of the present invention, the conventional gate electrode forming method will be briefly described. According to this conventional forming method, the film-forming layer pattern 14 of the non-coating material is provided on the upper surface of the base 10 made of an appropriate material and above the channel formation region 12. Here, the non-coating material is
It does not mean a material such as a resist that is formed by coating, but a material that can be formed by a CVD method, vacuum deposition, sputtering, thermal oxidation, or another method. In addition, when the base of this film formation layer 14 is etched in a later step,
It is formed of a material that can withstand this etching, or has a film thickness that remains even after etching.

After forming the film forming layer pattern 14, a resist pattern 18 having an opening 16 is formed in the film forming layer pattern portion. After that, this resist pattern 1
From the 8 side, the metal vapor deposition layer 20 is provided by using a directional vapor deposition technique with a suitable metal material such as aluminum that can be used as an etching mask in a later step. At this time, the metal vapor deposition layer provided on the resist pattern 18 is shown as 20a, and the metal vapor deposition layer provided on the surface of the film formation layer pattern 14 in the opening 16 is shown as 20b. In this way, FIG.
A structure as shown in FIG.

Next, the film deposition layer pattern 14 is etched by a vertical etching technique using the metal deposition layer 20 as a mask to form a hole 22 in the film deposition layer pattern 14, and the hole 22 is formed. The surface portion of the base 10 is exposed at the bottom of the. As a result, a structure as shown in FIG. 2B is obtained. In this case, when the etching is performed from the vertical direction described above, under-etching proceeds to the lower side of the resist pattern 18, so that the film formation layer pattern 14 is etched to the lower side of the resist pattern 18 in the direction along the channel direction. The hole 22 is formed.

Next, the metal vapor deposition layer 20 is removed, and thereafter,
The exposed surface of the base 10 exposed in the holes 22 is etched to form a groove 24 for forming a gate electrode in the base 10. Then, after depositing a gate metal in the groove 24, the resist pattern 18 is removed to form a gate electrode 26, and as a result, the structure shown in FIG. 2C is obtained.
In this case, the gate electrode 26 has a structure including a portion 28 vapor-deposited on the base surface and a portion 30 vapor-deposited on the film-forming layer and protruding from the portion 28.

According to this conventional forming method, the width of the gate electrode orthogonal to the upper surface of the base 10 and in the channel direction is narrow,
It is possible to obtain a low-resistance gate electrode in which the cross-sectional area of the gate electrode taken in the cross section along the channel direction is large.

[0009]

However, according to this conventional method, although the length of the portion of the lower portion of the gate electrode which contacts the base is short in the direction of the channel, the portion of the upper portion of the gate electrode which is in the channel direction is short. Is getting longer. Therefore, the shape of the gate electrode is unstable, and there is a risk that the gate electrode may collapse in the direction in which the upper part of the gate electrode projects during the step of forming the gate electrode or in the subsequent steps to break the gate electrode.

An object of the present invention is to provide a method of forming a gate electrode, which retains the advantages of the gate electrode when formed by the conventional method and prevents collapse of the gate electrode.

[0011]

In order to achieve this film-like purpose, according to the method of forming a gate electrode of the present invention, (a) a step of forming a film-forming layer of a non-coating material on a base, (b) ) A step of providing an opening for providing a partially exposed surface of the film forming layer, and (c) providing a metal vapor deposition layer on the exposed surface of the film deposition layer and the upper surface of the resist pattern by using a directional vapor deposition technique. And (d) using the metal vapor deposition layer as a mask,
A step of performing a directional etching from the same side as the vapor deposition direction of the metal vapor deposition layer to form an inclined hole for exposing the underlying surface in the film formation layer; and (e) a step of removing the metal vapor deposition layer, (F) etching the exposed surface of the base exposed in the hole to form a groove for forming a gate electrode in the base; and (g) depositing a gate metal in the groove to form a gate electrode. And (h) at least the step of removing the resist pattern.

[0012]

According to the structure of the present invention described above, the following processing is performed when forming a hole for forming a groove for forming a gate electrode in a base film in a film forming layer.

Using the directional vapor deposition technique, a metal vapor deposition layer is formed on one side of the film formation layer along the channel direction, and then the metal vapor deposition layer is formed from the same side as the metal vapor deposition direction. Directional etching is performed as a mask to form holes in the film formation layer. Therefore, this hole becomes an inclined hole, and one edge of this hole in the direction along the channel direction is determined by the metal deposition layer, and the other edge is determined by the upper edge of the resist pattern. Therefore, this hole is formed at or near the center of the opening of the resist pattern on the surface of the film formation layer, and therefore, in the direction along the channel direction,
The film-forming layer portions can be left on both sides of this hole for an appropriate length. Then, when the gate metal is vapor-deposited on the underlying surface exposed in the inclined hole, the gate metal has an appropriate length from the underlying surface exposed on the bottom surface of the hole to the film forming layer portions on both sides of the hole. It is overhang and vapor deposited. Therefore, the gate electrode has a well-balanced shape. Moreover, since the gate length of this gate electrode is short and the cross-sectional area is large, the resistance is low.

[0014]

Embodiments of the method of forming a gate electrode according to the present invention will be described below with reference to the drawings.

FIGS. 1A to 1C are process drawings for explaining the features of the method for forming a gate electrode according to the present invention.
3A to 3D and FIG. 4A to
FIG. 3E is a process chart for explaining an embodiment of the method for forming a gate electrode according to the present invention. Each figure schematically shows the structure obtained in the main stage of this process in a sectional view to the extent that the present invention can be understood. Note that this cross-sectional view is shown by paying attention to the cross-section of the cross section taken perpendicular to the upper surface of the base and parallel to the channel direction. Further, in FIG. 1, FIG. 3, and FIG. 4, the same components as those shown in FIG. 2 are designated by the same reference numerals as those in FIG. 2 unless otherwise specified. Detailed description thereof will be omitted.

First, the features of the present invention will be described with reference to FIGS.
This will be described with reference to (D). First, the film formation layer 14 is formed on the base 10, and the resist pattern 18 is provided on the upper side thereof. At this time, the opening 16 of the resist pattern 18 is positioned on the planned region so that the channel formation planned region 12 of the base 10 is formed. Next, from the resist pattern 18 side, a metal vapor deposition layer 20b is provided on the surface portion of the film formation layer 14 exposed in the opening 16 by using a directional vapor deposition technique. At this time, vapor deposition is performed from a direction inclined by θ with respect to a vertical line standing on the surface of the base 10.
The metal vapor deposition layer 20a is also formed on the resist pattern 18. This vapor-deposited metal layer is represented by 20. As a result, the structure shown in FIG. 1A is obtained.

Next, directional etching is performed at an angle of ψ with respect to the above-mentioned perpendicular line from the same side as the vapor deposition direction, which is different from the vapor deposition angle θ of the metal vapor deposition layer.
By this etching, the holes 40 inclined in the film forming layer 14 are formed.
Are provided to obtain a structure as shown in FIG. One edge of the hole 40 in the direction along the channel direction is substantially determined by the metal vapor deposition layer 20b, and the other edge is substantially determined by the upper edge of the resist pattern 18. Therefore, by appropriately setting the angles θ and Ψ, this hole 40
Can be formed on the surface of the film formation layer 14 so as to be located at or near the center of the opening 16 of the resist pattern 18. Also, in the direction along the channel direction,
The film forming layer portions are left on both sides of the hole 40 over an appropriate length. The length of the hole 40 in the channel direction is shown as W4.

Next, after removing the vapor-deposited metal layers 20a and 20b, a gate metal is vapor-deposited on the hole 40 side, and the gate metal layer 42 is formed on the underlying surface exposed in the inclined hole 40.
And the gate metal layer 44 is formed on the resist pattern 18 to obtain a structure as shown in FIG. At this time, the gate metal layer 42 is formed in the hole 40.
From the underlying surface exposed at the bottom surface of the substrate, vapor deposition is performed by projecting an appropriate length to the exposed portions of the film forming layer 14 on both sides of the hole 40.

Next, the gate metal layer 4 is removed by removing the resist pattern 18 by a lift-off technique.
4 is removed, and subsequently, the film formation layer 14 is removed as required to leave the gate metal layer 42 serving as the gate electrode 46. As a result, the gate electrode 46 has a well-balanced shape.

A preferred embodiment of the present invention will now be described with reference to FIGS. Here, the base 10
Is formed of a compound semiconductor such as GaAs, Si (silicon), or any other material used as a normal substrate. As the base 10, a so-called substrate itself or a substrate having a layer such as an epitaxial layer in which a semiconductor element can be formed can be used.

The forming process in this case will be described below. First, a film forming layer 14 of a non-coating material is formed on the upper surface of the base 10 with a film thickness of about 1000 A ° (A ° represents angstrom) ((A) of FIG. 3). Here, 12 is a planned region where the channel region is formed, as already described. Further, the non-coating material means not a material such as a resist that is formed by coating, but a material that can be formed by a CVD method, vacuum deposition, sputtering, thermal oxidation, or another method. Further, it is preferable that this film formation layer is formed of a material that can withstand the etching when the base is etched in a later step, or a film formed to have a film thickness that remains even after the etching. In this example,
For example, a SiN film, a SiO ₂ film, or another suitable insulating film is used.

Next, a resist pattern 18 having an opening 16 for providing a partially exposed surface of the film forming layer 14 is provided by a usual method ((B) of FIG. 3). The width W of the opening 16 in the direction along the channel direction is, for example, 0.5 μm.

Next, from the resist pattern 18 side, the upper surface of the resist pattern 18 and the exposed surface of the film forming layer 14 are provided as an etching mask in a later step by using a directional evaporation technique, for example, aluminum or the like. A metal vapor deposition layer (typically indicated by 20) is provided ((C) in FIG. 3). In this case, in the figure, the portion of the metal vapor deposition layer 20 formed on the film formation layer 14 is indicated by 20b, and the resist pattern 18 is formed.
The portion formed above is shown at 20a. Further, the angle θ with respect to the vertical line standing on the base surface for the directional vapor deposition, that is, the oblique vapor deposition is determined by how to determine the gate length. The metal vapor deposition layer 20b fills the opening 16 to some extent,
Due to the existence of the resist pattern 18, the portion where the deposition direction θ is hidden is not embedded but remains as an opening and a part of the film forming layer 14 is still exposed in the opening 16.

Next, using the metal vapor deposition layer 20b partially filling the opening 16 and the metal vapor deposition layer 20a formed on the resist pattern 18 as a mask, a film forming layer exposed in the opening 16 is formed. The portion 14 is etched by directional etching. The direction in which this directional etching is performed is the same as the direction in which the above-described directional vapor deposition is performed. Then, with respect to the exposed surface of the film formation layer 14,
Anisotropic angle etching is performed from the direction of the angle Ψ with respect to the above-described perpendicular line, and an oblique hole 40 is formed in this to form the base 1
0 is partially exposed ((D) of FIG. 3).

The hole 40 formed is the resist pattern 1
It is a narrow hole that gives higher resolution than the resolution of 8. The width W4 is, for example, about 0.1 μm. The size of the hole 40 in the channel direction (W4) and the position of the hole 40 in the opening 16 are determined by the metal deposition layer 20.
Of the vapor deposition angle θ and the etching angle ψ of the film forming layer 14. Ideally, the position of this hole on the surface of the film forming layer 14 should be at the center of the bottom of the opening 16.

Next, the metal vapor deposition layer 20 is removed by an appropriate method to obtain the structure shown in FIG.

Next, anisotropic or isotropic etching is performed on the exposed surface of the base 10 exposed in the holes 40, or
Etching is performed by a combination of the two to form a groove 24 for forming a gate electrode in the base 10 (FIG. 4).
(B)). The depth of this groove 24 is, for example, about 1000.
Set to A °.

Next, a gate metal is vapor-deposited on the upper surface of the structure (see FIG. 4B) in which the groove is formed to form the gate electrode 46 in the groove 24 (see FIG. 4C). ). In the drawing, the gate metal layer deposited on the resist pattern 18 by this deposition is indicated by 44. In this case, the gate electrode 46 obtained by vapor deposition of this gate metal material
Is formed of the vapor deposition layer 46 a formed in the groove 24 and the vapor deposition layers 46 b and 46 c formed on the film formation layer 14. The film thickness of the film forming layer 14, the depth of the groove 24, and the vapor deposition thickness of the gate metal material are appropriately determined to form the vapor deposition layer 46 a and the vapor deposition layer 4.
Thus, the gate electrode 46 of a monolithic layer in which 6b and 46c are continuous is obtained. In this case, the width of the gate electrode 46 in the channel direction, that is, the gate length, is determined by the both end edges of the hole 40 formed in the film formation layer 14 (in FIG. 4C, the lower edge of the film formation layer on the left side and the right side). Of the resist pattern 1
8 and the vapor deposition angle θ of the metal vapor deposition layer 20 and the film formation layer 1
It depends on the etching angle ψ of 4. Further, the lengths W2 and W3 of the protruding portion above the gate electrode 46 are respectively set to the resist pattern 1 if the thickness of the resist is determined.
8 and the etching angle ψ between the film formation layer 14 and the edge of the resist pattern 18 and the vapor deposition angle θ between the metal vapor deposition layers 20. In this embodiment, W2 and W3 can be set to about 0.2 μm, for example. The thicknesses of the film forming layer 14 and the gate electrode 46 are the same as those of the vapor deposition layers 46b and 46c and the groove 2 on the film forming layer 14 at the gate portion.
The thickness may be such that the vapor-deposited layer 46a formed in No. 4 is connected to and formed. For example, if the depth of the groove 24 of the base 10 is 1000 A °, the thickness of the film formation layer 14 is 100.
The thickness of 0 A ° and the thickness of the gate electrode 46 may be set to 5000 A °.

Therefore, the gate electrode 46 also has a narrow width in the channel direction and has a wide cross-sectional area.
The resistance value of the gate electrode 46 becomes smaller.

Next, the resist pattern 18 is removed by a lift-off process ((D) of FIG. 4). Then, the film formation layer 14 is removed as needed ((E) of FIG. 4). As a result, the gate electrode 46 formed in the groove 24 of the base 10 is formed.
Remain ((E) in FIG. 4).

As described above, since the overhanging lengths W2 and W3 on both sides of the upper part of the gate electrode are determined by the vapor deposition angle θ of the metal vapor deposition layer 20 and the etching angle ψ of the film forming layer 14, the gate shape is stable. W2 ≈
It suffices to determine θ and Ψ so that W3 is obtained.

[0032]

As is apparent from the above description, according to the present invention, the gate electrode of the transistor is formed on the base,
In addition to the fact that it can be formed as one having a narrow width in the channel direction and a large cross section and low resistance, the conventional forming method can be improved in the following points.

By forming the upper part of the gate into a structure having protrusions on both sides in the channel direction,
The instability of the gate electrode having a short gate and a large cross-sectional area is eliminated, and problems such as collapse of the gate electrode in the gate electrode forming step and subsequent steps are less likely to occur.

[Brief description of drawings]

FIG. 1A to FIG. 1D are process drawings for explaining the features of the method for forming a gate electrode of the present invention.

FIG. 2 is a process diagram for explaining a conventional method of forming a gate electrode.

FIGS. 3A to 3D are process diagrams of the first half of the process, which are provided for explaining the embodiment of the gate electrode of the present invention.

4 (A) to 4 (E) are process diagrams of the latter half of the process for explaining the embodiment of the gate electrode according to the present invention.

[Explanation of symbols]

10: base, 12: planned channel formation region, 1
4: film forming layer 16: opening portion, 18: resist pattern 20, 20a, 20b: metal vapor deposition layer, 2
4: groove 40: hole 42, 44: gate metal layer, 4
6: Gate metal

Claims (1)

[Claims] 1. A step of: (a) providing a film-forming layer of a non-coating material on a base; (b) providing an opening for providing a partially exposed surface of the film-forming layer; A step of providing a metal vapor deposition layer on the exposed surface of the film layer and an upper surface of the resist pattern by using a directional vapor deposition technique, (d) using the metal vapor deposition layer as a mask,
A step of performing a directional etching from the same side as the vapor deposition direction of the metal vapor deposition layer to form an inclined hole for exposing the underlying surface in the film formation layer; and (e) a step of removing the metal vapor deposition layer, (F) etching the exposed surface of the base exposed in the hole to form a groove for forming a gate electrode in the base; and (g) depositing a gate metal in the groove to form a gate electrode. A method of forming a gate electrode, comprising: (h) at least removing the resist pattern.