JPH0513479A - Die bonding tool of semiconductor device - Google Patents

Die bonding tool of semiconductor device

Info

Publication number
JPH0513479A
JPH0513479A JP3161186A JP16118691A JPH0513479A JP H0513479 A JPH0513479 A JP H0513479A JP 3161186 A JP3161186 A JP 3161186A JP 16118691 A JP16118691 A JP 16118691A JP H0513479 A JPH0513479 A JP H0513479A
Authority
JP
Japan
Prior art keywords
die bonding
die
bonding tool
package
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3161186A
Other languages
Japanese (ja)
Inventor
Hiroshi Nishimura
浩 西村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Kyushu Ltd
Original Assignee
NEC Kyushu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Kyushu Ltd filed Critical NEC Kyushu Ltd
Priority to JP3161186A priority Critical patent/JPH0513479A/en
Publication of JPH0513479A publication Critical patent/JPH0513479A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75302—Shape
    • H01L2224/75303—Shape of the pressing surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)

Abstract

PURPOSE:To enable a die bonding material used for die-bonding an IC chip to a package to be constant and uniform in thickness. CONSTITUTION:A stopper 1b, which is used for setting a space between the underside of an IC chip 2 sucked at the tip of a die-bonding tool body 1a and the die-bonding surface of a package 4 constant, is provided extending from the die-bonding tool body 1a toward the die-bonding surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【０００１】[0001]

【産業上の利用分野】本発明は、ＩＣチップをパッケー
ジにダイボンディングする際に使用する半導体装置のダ
イボンディングツールに関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a die bonding tool for a semiconductor device used when die bonding an IC chip to a package.

【０００２】[0002]

【従来の技術】従来、ＩＣチップをパッケージにダイボ
ンディングするダイボンディングツールは、図２の断面
図に示すように、ＩＣチップを真空穴１ｃにて吸着し、
ダイボンディングツール本体１ａの先端の角錐穴で位置
決めし、ペースト状のダイボンディング材を用いてスク
ラブ動作によりパッケージのダイボンディング面に接着
していた。2. Description of the Related Art Conventionally, a die bonding tool for die bonding an IC chip to a package, as shown in the sectional view of FIG.
The die-bonding tool main body 1a was positioned by the pyramidal hole at the tip and was bonded to the die-bonding surface of the package by a scrubbing operation using a paste-like die-bonding material.

【０００３】[0003]

【発明が解決しようとする課題】上述した従来のダイボ
ンディングツールは、パッケージのダイボンディング面
とＩＣチップとの間隔が、パッケージ寸法精度等のばら
つきにより一定にならず、ボンディング後、ペースト状
接着剤などのダイボンディング材の厚さが一定または均
一にならない。そのため、パッケージとＩＣチップの接
着強度が低下したり、またＩＣチップの表面にダイボン
ディング材が付着し、製造歩留りを低下させるという問
題点があった。The conventional die bonding tool described above does not have a uniform gap between the die bonding surface of the package and the IC chip due to variations in package dimensional accuracy, etc. The thickness of the die bonding material is not constant or uniform. Therefore, there is a problem in that the adhesive strength between the package and the IC chip is reduced, and the die bonding material is attached to the surface of the IC chip to reduce the manufacturing yield.

【０００４】[0004]

【課題を解決するための手段】本発明のダイボンディン
グツールは、ダイボンディングツール本体の先端に吸着
したＩＣチップ下面とパッケージのダイボンディング面
との間隔を一定にするためのストッパーを、ダイボンデ
ィング面に向けてボンディングツール本体から突出させ
て設けている。The die bonding tool of the present invention has a stopper for making the gap between the lower surface of the IC chip adsorbed at the tip of the die bonding tool body and the die bonding surface of the package constant, the die bonding surface. It is provided so as to protrude from the main body of the bonding tool.

【０００５】[0005]

【実施例】次に、本発明について図面を参照して説明す
る。図１は、本発明の一実施例のダイボンディングツー
ルおよびその使用状態を示す縦断面図である。DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, the present invention will be described with reference to the drawings. FIG. 1 is a vertical cross-sectional view showing a die bonding tool according to an embodiment of the present invention and a usage state thereof.

【０００６】図１において、パッケージ４とリードフレ
ーム５は封止ガラス６により接合されている。ＩＣチッ
プ２はダイボンディングツール本体１ａの先端に真空穴
１ｃから真空引きされて固定されている。また、ダイボ
ンディングツール本体１ａはダイボンディングに接続さ
れている。In FIG. 1, the package 4 and the lead frame 5 are joined by a sealing glass 6. The IC chip 2 is fixed to the tip of the die bonding tool body 1a by drawing a vacuum from the vacuum hole 1c. The die bonding tool body 1a is connected to die bonding.

【０００７】パッケージ４の上のダイボンディング面に
塗布されたペースト状のダイボンディング材３の上方か
ら、ダイボンデングツール本体１ａに吸着されたＩＣチ
ップ２がある一定の荷重をかけられ、ダイボンディング
材３を押し広げる。この時、ＩＣチップ下面とダイボン
ディング面との間隔がある一定の高さになると、ダイボ
ンディングツール本体１ａに取り付けられた突起状のス
トッパー１ｂの先端がパッケージ４のダイボンディング
面と接触し、これ以上ＩＣチップ２が下がらなくなり、
ダイボンディング材３の厚さは一定かつ均一に保たれ
る。A certain load is applied from above the paste-shaped die bonding material 3 applied on the die bonding surface of the package 4 to the die bonding tool body 1a, and the die bonding material is applied. Push 3 apart. At this time, when the distance between the lower surface of the IC chip and the die bonding surface becomes a certain height, the tip of the protruding stopper 1b attached to the die bonding tool body 1a comes into contact with the die bonding surface of the package 4, The IC chip 2 is no longer lowered,
The thickness of the die bonding material 3 is kept constant and uniform.

【０００８】[0008]

【発明の効果】以上説明したように本発明は、ダイボン
ディングツール本体にその先端から突出させたストッパ
ーを設けることにより、パッケージ底面のダイボンディ
ング面とＩＣチップとの間隔を一定にし、ダイボンディ
ング材の厚さを一定かつ均一にし、パッケージとＩＣチ
ップとの接着強度を向上させ、また、製造歩留りを向上
させるという効果を有する。As described above, according to the present invention, the die bonding tool main body is provided with the stopper projecting from the tip thereof, so that the distance between the die bonding surface on the bottom of the package and the IC chip is constant, and the die bonding material is provided. Has the effect of making the thickness of the package constant and uniform, improving the adhesive strength between the package and the IC chip, and improving the manufacturing yield.

【図面の簡単な説明】[Brief description of drawings]

【図１】本発明の一実施例のダイボンディングツールお
よびその使用状態を示す縦断面図である。FIG. 1 is a vertical sectional view showing a die bonding tool according to an embodiment of the present invention and a usage state thereof.

【図２】従来のダイボンディングツールの縦断面図であ
る。FIG. 2 is a vertical sectional view of a conventional die bonding tool.

【符号の説明】[Explanation of symbols]

１ａ ダイボンディングツール本体 １ｂ ストッパー １ｃ 真空穴 ２ ＩＣチップ ３ ダイボンディング材 ４ パッケージ ５ リードフレーム ６ 封止ガラス 1a Die bonding tool body 1b Stopper 1c Vacuum hole 2 IC chip 3 Die bonding material 4 Package 5 Lead frame 6 Sealing glass

Claims (1)

【特許請求の範囲】 【請求項１】 真空吸着したＩＣチップをパッケージの
ダイボンディング面に接着する半導体装置のダイボンデ
ィングツールにおいて、ダイボンディグツール本体の先
端に吸着したＩＣチップ下面とパッケージのダイボンデ
ィング面との間隔を一定にするためのストッパーを、前
記ダイボンディング面に向けてボンディングツール本体
から突出させたことを特徴とする半導体装置のダイボン
ディングツール。Claim: What is claimed is: 1. A die bonding tool for a semiconductor device, wherein a vacuum-adsorbed IC chip is bonded to a die-bonding surface of a package. A die bonding tool for a semiconductor device, wherein a stopper for keeping a constant distance from the surface is projected from the bonding tool body toward the die bonding surface.
JP3161186A 1991-07-02 1991-07-02 Die bonding tool of semiconductor device Pending JPH0513479A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3161186A JPH0513479A (en) 1991-07-02 1991-07-02 Die bonding tool of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3161186A JPH0513479A (en) 1991-07-02 1991-07-02 Die bonding tool of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0513479A true JPH0513479A (en) 1993-01-22

Family

ID=15730227

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3161186A Pending JPH0513479A (en) 1991-07-02 1991-07-02 Die bonding tool of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0513479A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010003962A (en) * 2008-06-23 2010-01-07 Denso Corp Apparatus and method for manufacturing electronic component

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010003962A (en) * 2008-06-23 2010-01-07 Denso Corp Apparatus and method for manufacturing electronic component

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