JPH05122639A - Liquid crystal display device - Google Patents

Abstract

PURPOSE:To realize a stable and high-quality image display while resolving the problem of a flickering display screen and to provide a simple-construction and low-manufacturing cost liquid crystal display device. CONSTITUTION:The final output stage of an output buffer to be used for a scanning line driving circuit adopts constant current source load type inverters 211 and 212, and the waveform of a scanning pulse VY at its rise time is made sharp and that of a scanning pulse VY at its fall time is made gentle. Accordingly, since the scanning pulse gently and gradually falling down can supply electric charge to a floating capacity CGS, within the switching element of the liquid crystal display element during the gentle falling down of voltage, the part of the electric charge to be applied to the liquid crystal can be prevented from being deprived by the floating capacity CGS. Thus, the level shifting of the liquid crystal application voltage generated can be suppressed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a thin film transistor (TF).
The present invention relates to an active matrix type liquid crystal display device using a switching element made of T).

[0002]

2. Description of the Related Art Liquid crystal display devices are widely used as display elements for televisions and graphic displays.

Among them, the active matrix type liquid crystal display device is particularly excellent in high-speed response and suitable for increasing the number of pixels, and is intended to realize high image quality, large size and color screen of the display screen. Some have been expected and have been put into practical use after being researched and developed.

The display element portion of this active matrix type liquid crystal display device includes an active element substrate on which a switching element composed of an active element such as a thin film transistor and a pixel electrode are arranged, and a counter electrode arranged to face the active element substrate. The main part is composed of a counter substrate provided with, a liquid crystal composition sandwiched between these two substrates, and a polarizing plate attached to each of the two substrates.

The active element substrate is provided on a transparent insulating substrate such as a glass plate or a plastic film so that the scanning lines and the signal lines are orthogonal to each other, and a switching element and a pixel electrode are provided at each intersection of the scanning lines and the signal lines. Is provided.

Since the switching elements control the driving of each pixel in a distributed manner and the variation in the voltage applied to the liquid crystal is significantly reduced, the pixels can be driven at high speed, and the number of pixels can be increased and the area can be increased. It will be possible.

As a switching element, a thin film transistor (Thin Film Transistor) having a steep on / off characteristic suitable for the purpose of use is usually used.
r, hereinafter abbreviated as TFT) is used. TFT is thin film I
It is a type of insulated gate field effect transistor formed using the C technique.

FIG. 5 is an equivalent circuit diagram of a display element portion (for one pixel) of a conventional active matrix type liquid crystal display device. This is because the gate (G) is the scanning line 501, the drain (D) is the signal line 502, and the source (S) is the pixel electrode 5.
N-type TFT switching element 504 connected to
Shows the case of using.

Further, each of the pixel electrodes 503 forms a pixel composed of an individual liquid crystal cell 506 with the counter electrode 505 via a liquid crystal. The liquid crystal cell 506 can be represented by an electrostatic capacitance C _LC as an equivalent circuit.

An auxiliary capacitance C _S 509 for holding charges is connected in parallel with the liquid crystal cell 506. That is, one end 507 of this auxiliary capacitance C _S 509 is the pixel electrode 503 of the liquid crystal cell 506, and the other end 508 is the auxiliary capacitance voltage line 513.
It is connected to the. This auxiliary capacitance C _S 509 is once T
After the source output voltage pulse of the FT switching element 504 is applied, the voltage is held, and until the next frame scanning, a constant voltage is applied to the connected liquid crystal cell 506 to continue to excite the liquid crystal.

FIG. 6 is a waveform diagram showing various pulses applied to a conventional liquid crystal display device.

When the video signal pulse V _X shown in FIG. 6 (b) is applied to the drain, one horizontal line scanning period as shown in FIG. 6 (a) (for example, about 63.5 in an NTSC standard television display image). When a scanning pulse V _Y is applied to the gate in a cycle of μs), a current flows between the drain and the source, a voltage is applied to the pixel electrode 503 connected to the source, and the potential of the liquid crystal cell 506 becomes as shown in FIG. The potential V _S is as shown in 6 (c). At this time, the potential of the one end 507 of the auxiliary capacitance C _S 509 on the pixel electrode side is also the same as this potential V _S.
Becomes

Then, the voltage V _S applied to the pixel electrode 503 of the corresponding liquid crystal cell and the voltage applied from the counter electrode voltage application unit 512 to the counter electrode 505 thereof are superimposed and applied to the liquid crystal, and the liquid crystal is driven. It

However, the stray capacitance C _GS 510 exists between the gate and the source of the TFT switching element 504 as described above. As a result, the source output voltage of the TFT switching element 504 is set to the source output voltage of the TFT switching element 504 at the time of a sharp fall of the waveform as shown in FIG. _6A for each scanning cycle T _F of the scanning pulse V _Y. A level shift ΔV1 as shown in FIG.

This level shift ΔV1 causes the source output voltage to fluctuate abruptly, and always shifts the median value of the source output voltage downward (toward a low potential) regardless of the polarity of the video signal pulse V _X.

This ΔV 1 is the amplitude of the scan pulse voltage V _Y , dV _Y , the auxiliary capacitance C _S , C _S [F], the liquid crystal cell capacitance, C _LC [F], and the stray capacitance C _GS , C _GS [. F] can be expressed by the following formula. That is, ΔV1 = dV _Y × [C _GS / (C _GS + C _LC + C _S )] According to this expression, in order to set the level shift ΔV1 to 0 and suppress the flicker of the display screen, C _GS is eliminated or
Alternatively, dV _Y must be 0. However, this C _GS is inevitably present due to the structure of the TFT switching element, and it is virtually impossible to eliminate itself. In addition, the amplitude dV _Y of the scan pulse voltage is always 0.
Obviously you can't.

Therefore, in the conventional liquid crystal display device, a voltage of the level shift is compensated by applying a DC bias voltage to the counter electrode 505 of the liquid crystal display element, and the liquid crystal applied voltage lowered due to the reduction of the source output voltage. The method of raising the median value is already known.

However, since the capacitance C _LC of the liquid crystal cell changes depending on the voltage applied to the liquid crystal, ΔV 1 changes as the capacitance C _LC changes, as is clear from the above equation. In a liquid crystal display device to which a different voltage is applied to each pixel, the voltage value to be raised is different for each pixel. Therefore, even if it is attempted to raise the median value of the liquid crystal applied voltage, it is not possible to do this completely for all pixels. It is impossible. Therefore, in the conventional liquid crystal display device, the voltage for the level shift can be compensated only approximately by taking the average value of the liquid crystal applied voltage and raising the median value. As a result, there are problems that flicker and display unevenness remain depending on the pixel and that the liquid crystal is deteriorated and the image is burned in because a DC voltage is applied to the liquid crystal.

As a means for reducing ΔV1 itself, a delay circuit or the like is provided in the output line of the scanning line driver circuit so that the scanning pulse V _Y falls, that is, the gate input of the TFT 504. There is already known means for suppressing ΔV1 by turning off the voltage pulse by gradually reducing it and turning it off instead of abruptly dropping it in the form of a rectangular pulse.

However, in the means for arranging the delay circuit in the output line of the scanning line driver circuit as described above, there is a problem that the switching speed itself is lowered, and a complicated delay circuit must be added to the device. However, there is a problem that the device and its manufacturing process are complicated, and the manufacturing yield is lowered and the manufacturing cost is increased accordingly.

[0021]

As described above, in the conventional liquid crystal display device, due to the level shift of the source output voltage due to the stray capacitance of the TFT switching element,
There is a problem that flicker, display unevenness, and image sticking occur on the display screen. Moreover, even in the known solution to the problem, the level shift .DELTA.V1 is only compensated approximately, and the deterioration of the liquid crystal is accelerated.

Further, even in the means for reducing the level shift ΔV1 itself, there is a problem that the switching speed itself is reduced, and a complicated delay circuit must be added to the device, which complicates the device and its manufacturing process. However, there is a problem that the production yield is lowered and the production cost is increased accordingly.

The present invention has been made to solve such a problem, and its object is to solve the problem of flicker on the display screen caused by the level shift of the output voltage of the TFT switching element. Another object of the present invention is to provide a liquid crystal display device that can realize stable and high-quality image display, has a simple structure, and is inexpensive to manufacture.

[0024]

In order to solve the above-mentioned problems, a liquid crystal display device of the present invention includes a scanning line, a signal line arranged so as to intersect with the scanning line, the scanning line and the signal. Active matrix type liquid crystal display element in which a switching element composed of a transistor connected to the line is provided, and a scanning line having an output buffer and applying a scanning pulse to the switching element via the output buffer and the scanning line In a liquid crystal display device having a drive circuit and a signal line drive circuit for applying a signal pulse to the signal line, the output buffer has a constant current source at the final output stage that makes the trailing edge of the scan pulse fall slowly. It is characterized by having a load type inverter.

The scanning line drive circuit may be installed on the same substrate in the liquid crystal display element together with the scanning line, the signal line and the switching element.

[0026]

[Operation] When the gate voltage sharply falls in a square wave shape,
The resistance between the drain and the source of the TFT instantly becomes high.
Then, electric current does not flow into the TFT from the circuit in the preceding stage, so that no charge flows in, and the capacitance C _GS in the TFT and the subsequent stage,
The charge moves and is redistributed between C _LC and C _S. This means that the charges accumulated in the capacitance C _LC and the auxiliary capacitance C _S of the liquid crystal cell move to the floating capacitance C _GS .
As a result, the level shift ΔV1 having the value shown in the above-mentioned relational expression occurs.

Therefore, in the liquid crystal display device of the present invention, the final output stage of the output buffer used in the scanning line driving circuit is a constant current source load type inverter. In this constant current source load type inverter, the leading edge of the scan pulse has a steep rise and the trailing edge of the scan pulse has a slow fall.
That is, the voltage at the rising edge of the scanning pulse applied to the switching element of the liquid crystal display device rises sharply, and the voltage at the falling edge gradually drops slowly.

As described above, the gate voltage of the TFT gradually drops by slowly dropping the scanning pulse over time. Therefore, the capacitance of the signal line itself is maintained while the gate voltage is equal to or higher than the threshold voltage value of the TFT. Alternatively, the electric charge accumulated in the capacitance added to this is supplied to the stray capacitance C _GS etc. through this TFT, the gate voltage becomes equal to or lower than the threshold voltage value of the TFT, and the high voltage is applied between the drain and the source of the TFT. After becoming a resistance, charges move between the capacitances C _GS , C _LC and C _{S and} are redistributed. At this time, the amount of charge transferred between the capacitances C _LC and C _S and C _GS is small, and the level shift ΔV1 of the liquid crystal applied voltage is small. In this way, the level shift ΔV1 can be suppressed.

Further, since the constant current source load type inverter described above is arranged as the final output stage of the output buffer,
It is only necessary to partially change the structure of the final output stage of the conventional output buffer, and it is not necessary to newly add a complicated circuit such as a delay circuit to the outside of the conventionally used scanning line drive circuit. Therefore, the level shift of the liquid crystal applied voltage as described above can be suppressed while the structure is simple and the manufacturing cost is low.

[0030]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the liquid crystal display device of the present invention will be described below in detail with reference to the drawings. FIG. 1 is a diagram showing a simplified configuration of a liquid crystal display device of the present invention, and FIG. 2 is a circuit diagram showing a configuration of a scanning line driving circuit thereof.

This liquid crystal display device, as shown in FIG.
A liquid crystal display element 1, a signal line driving circuit 2, and a scanning line driving circuit 3 are provided.

The liquid crystal display element 1 comprises an active element substrate 1
01, a counter substrate (not shown) provided so as to face the active element substrate, and a liquid crystal composition (not shown) sandwiched between these two substrates.

The active element substrate 101 includes the scanning lines 10
3 and the signal line 102 intersect each other at a right angle, and a poly-Si (polysilicon) n-MOS arranged so as to be connected to the scanning line 103 and the signal line 102 at each intersection.
Element 105 of a liquid crystal cell 106 connected to the switching element 105 so that the voltage applied to the liquid crystal cell 106 is controlled by the switching element 105. And this auxiliary capacity 10
7 and the auxiliary capacitance common line 108 connected to the switching element 105 and the liquid crystal cell 10.
A portion 109 for displaying an image such as 6 has the same structure as an existing general liquid crystal display panel.

Then, the scanning line 10 is formed on the outer peripheral portion 110 of the portion 109 for displaying the image of the active element substrate 101.
Scan line driving circuit 3 for outputting scan pulse to 3 and signal line 1
A signal line drive circuit 2 that outputs a signal pulse to the signal line 02.

The outline of the structure of the active substrate 101 will be briefly described along with the manufacturing process thereof. A poly-Si film is formed on a quartz substrate, and this is etched to leave a TFT and a portion to be a storage capacitor in an island shape. Then, thermal oxidation is performed to form the gate insulating film of the TFT and the insulating film of the storage capacitor. After forming a second poly-Si film on it, etching is performed to form a gate electrode of the TFT, a scanning line, and a storage capacitor common line. Next, As (arsenic) or P (phosphorus) is used for the portion to be the n-MOS-TFT, and B is used for the portion to be the p-MOS-TFT.
(Boron) is ion-implanted. Then, after forming a SiO ₂ film on it, a contact hole is opened, and further Al
A signal line made of (aluminum) and other wiring are formed. The pixel electrode is formed by forming an ITO film and then patterning by etching to form a pixel electrode made of a transparent electrode.

The signal line driving circuit 2 and the scanning line driving circuit 3 were also formed as TFT circuits together with the switching element 105 during the manufacturing process.

A counter substrate is installed so as to face the active substrate 101. A common counter electrode 112 facing the above-mentioned pixel electrode 111 is arranged on this counter substrate.

The signal line drive circuit 2 is a general signal line drive circuit that outputs a signal pulse to a signal line when video signal information is input from the outside.

The scanning line drive circuit 3, as shown in FIG.
It has a shift register 201 arranged for each scanning line, and an output buffer 204 composed of a first stage output buffer 202 and a second stage output buffer 203 connected to the shift register 201. ..

The shift register 201 and the output buffer 202 of the first stage are composed of C-MOS generally used conventionally. As a result, the shift register 201 and the first-stage output buffer 202
The switching speed is fast and low power consumption to realize high quality image display.

The output buffer 203 of the second stage is
It is a constant current source load type inverter composed of two p-MOSs 211 and 212.

Output pulse P ₀ from shift register 201
Is output to the output buffer 202 of the first stage, the output buffer 202 of the first stage outputs CM as described above.
Because of the OS configuration, the first-stage pulse P ₁ having a waveform substantially the same as that of the input pulse and having the inverted phase is output to the second-stage output buffer 203.

When the pulse P ₁ of the first stage is applied to the output buffer 203 of the second stage, first, the output buffer 2
03, the p-MOS 211 in the preceding stage is turned on, and the gate of the TFT switching element 105 of the liquid crystal display element and its stray capacitance C _GS are passed through this low resistance p-MOS 211.
The scanning pulse V _Y is applied to. And this stray capacitance C
_{The GS} , the pixel capacitance, and the capacitance of the conductor of the scan line 103 are charged. P-MOS2 at this time
The drain and source of 11 are in the ON state,
The resistance is small enough. Therefore, in this case, since the time constant is small, the scan pulse voltage rises sharply.

When the output pulse P ₀ is not output from the shift register 201 to the output buffer 202 of the first stage and the output of the pulse P ₁ of the first stage from the output buffer 202 of the first stage is turned off. First, it takes a long time for the p-MOS 211 at the previous stage of the second stage to be completely turned off. Then, when the p-MOS 211 is completely turned off and can be regarded as being substantially open to the scanning line, this time the T of the liquid crystal display element is passed through the scanning line.
What is substantially connected to the FT switching element and its stray capacitance C _GS is the p- of the subsequent stage as a constant current source load.
Only the MOS 212, and the p-MOS 212 has a large resistance because of its constant current operation. Therefore, the time constant is large, and as a result, the scan pulse voltage gradually falls.

Since the trailing edge of the scan pulse is slow in this way, it is possible to supply or discharge electric charge to the floating capacitance C _GS through the scan line within this time. This allows
A part of the electric charge to be applied to the liquid crystal is not lost to the stray capacitance C _GS, and the level shift of the liquid crystal applied voltage is suppressed,
Eliminate flicker and uneven display.

FIG. 3 shows waveforms of various pulses applied to one pixel of the liquid crystal display device of the present invention, that is, scanning pulse (a), signal pulse (b) and liquid crystal applied voltage (c) in one frame period. It is a waveform diagram.

As shown in FIG. 3 (a), the leading edge of the waveform of the scanning pulse has a steep rising edge, and the trailing edge of the waveform has a gentle falling edge, so that the potential gradually decreases. There is.

As a result, as shown in FIG. 3C, the liquid crystal applied voltage has a waveform in which the level shift is almost eliminated.

When the value of the level shift ΔV1 at this time was measured and compared with the conventional case, this ΔV1 was about 0.5 V in the conventional case, but about 0.05 V in the liquid crystal display device of the present invention. It was confirmed that it was reduced to about 1/10 compared to the conventional one. Further, when the quality of the display screen at this time was visually inspected, no flicker or display unevenness was found.

Further, as described in the above description of the structure, since the manufacturing process can be the same as the conventional process, the yield and the manufacturing cost thereof are the same as the conventional one, and when a complicated delay circuit is separately provided. Problems such as a decrease in yield and an increase in manufacturing cost do not occur.

In the present embodiment, the final output stage of the output buffer of the scanning line drive circuit is the constant current load type inverter composed of the p-MOS type TFT, but the present invention is not limited to this. For example, an inverter as shown in FIG. 4 may be used for this final output stage. That is, in the case of FIG. 4A, the front stage is a p-MOS and the rear stage is an n-MOS. At this time, the switching element on the liquid crystal display element side is preferably an n-MOS.

Further, in the case of FIG. 4 (b), the former stage is n-MO.
S and the subsequent stage are also n-MOS. At this time, the switching element on the liquid crystal display element side is preferably a p-MOS.

In the case of FIG. 4 (c), the preceding stage is n-MO.
S and the latter stage are p-MOS. At this time, the switching element on the liquid crystal display element side is preferably a p-MOS.

[0054]

As described above in detail, the liquid crystal display device of the present invention eliminates the problem of flicker on the display screen caused by the level shift of the output voltage caused by the stray capacitance of the TFT switching element and stabilizes the display. It is a liquid crystal display device that can realize high-quality image display and that has a simple structure and is inexpensive to manufacture.

[Brief description of drawings]

FIG. 1 is a diagram showing a simplified configuration of a liquid crystal display device of the present invention.

FIG. 2 is a circuit diagram showing a configuration of a scanning line driving circuit of the liquid crystal display device of the present invention.

FIG. 3 is a waveform diagram showing various pulses applied to one pixel of the liquid crystal display device of the present invention.

FIG. 4 is a diagram showing a configuration of an inverter that can be used in a final output stage of the liquid crystal display device of the present invention.

FIG. 5 is an equivalent circuit diagram of a display element portion of a conventional active matrix type liquid crystal display device.

FIG. 6 is a waveform diagram showing various pulses applied to a conventional active matrix type liquid crystal display device.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Liquid crystal display element 2 ... Signal line drive circuit 3 ... Scan line drive circuit 201 ... Shift register 202 ... First stage output buffer 203 ... Second stage output buffer 204 ... Output buffer 211 ... Second stage P-MOS-in front of output buffer
TFT 212 ... p-MOS-in the latter stage of the output buffer of the second stage
TFT

Claims (1)

[Claims] 1. An active matrix liquid crystal display in which a scanning line, a signal line arranged so as to intersect with the scanning line, and a switching element formed of a transistor connected to the scanning line and the signal line are arranged. Liquid crystal having an element, a scanning line driving circuit having an output buffer for applying a scanning pulse to the switching element via the output buffer and the scanning line, and a signal line driving circuit for applying a signal pulse to the signal line The liquid crystal display device according to claim 1, wherein the output buffer includes a constant current source load type inverter that causes a trailing edge of the scan pulse to slowly fall in a final output stage.