JPH05121565A - Manufacture of semiconductor devices - Google Patents

Abstract

PURPOSE:To cover the formation method of a multilayer wiring section in terms of a semiconductor device and provide a manufacturing method which is capable of preventing a drop in the yield of residuals resultant from etching during the formation of a through hole and enhancing an increase in contact resistance due to the contamination of the surface a lower wiring layer. CONSTITUTION:After having formed a first wiring layer 13 and an interlaminar insulation film 15, a TiN film 16 is formed on the insulation film 15 and bored so that a through hole may be formed with the TiN film 16 as a mask. The processing which forms a second wiring layer 18 is carried out without being exposed to the atmosphere, say, in a multi-chamber.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a semiconductor element having multi-layered wiring, centering on the multi-layered wiring layer.

[0002]

2. Description of the Related Art FIG. 3 shows a conventional two-layer Al alloy wiring forming process. Here, the formation of the intermediate insulating film (BPSG) 2 on the semiconductor substrate (Si substrate) 1 and the formation of the first-layer Al alloy wiring 3 and the interlayer insulating film 4 on the intermediate insulating film (BPSG) 2 are completed, and the subsequent through-hole formation is performed. The process showed. First, the resist 5 is applied as shown in FIG. 3 (a), and the through hole portion is opened as shown in FIG. 3 (b).

Next, as shown in FIG. 3C, in order to improve the coverage at the through-hole contact of the second layer wiring, first, the interlayer insulating film 4 at the opening is wet-etched or isotropically dry-etched. Etching is performed on half or less of the film thickness.

Next, as shown in FIG. 3D, the opening of the through hole is completed by anisotropic etching (RIE, ECR). Then, the resist 5 is removed with an asher and a peeling agent to obtain the structure of FIG.

Finally, as shown in FIG. 3F, an Al alloy film 6 to be the second layer wiring is deposited. Before the deposition, it is necessary to remove the oxide film formed on the first-layer Al alloy wiring 3 while being left in the atmosphere and the fluoride film formed during the etching by reverse sputtering. Between the processes shown above, the wafer (substrate) is transported between the processing devices in the atmosphere.

[0006]

However, according to the method described above, the through hole etching (see FIG.
In (d), a reaction product of the resist component and the etching gas or sputtered Al is formed, and is deposited on the side wall and the shoulder portion of the through hole. These may remain as a residue even after the resist is removed, causing disconnection or short circuit of the second-layer Al wiring, thus lowering the wiring yield. Also, the surface of the first-layer Al wiring is exposed to O ₂ plasma, a stripping agent, and the atmosphere when the resist is removed after the through-hole etching (FIG. 3 (e)), which is extremely dirty. Therefore, a clean lower layer (first layer),
The upper layer (second layer) Al contact cannot be formed, and the contact resistance increases.

The present invention eliminates the above-mentioned decrease in yield due to residues after etching and increase in contact resistance due to contamination of the surface of the lower Al wiring, so that an excellent multi-layer wiring utilizing a multi-chamber apparatus compatible with process integration is eliminated. An object is to provide a forming method.

[0008]

For the above-mentioned purpose, the present invention provides a TiN film on an interlayer insulating film, patterns it, and uses it as a mask for the subsequent etching process. The process is carried out in a multi-chamber apparatus without exposing the wafer to the atmosphere, and the through-hole etching process and the upper Al alloy raw film process are integrated.

[0009]

The present invention employs the method as described above. Therefore, etching with a resist is performed using TiN used as a mask.
Since only the etching at the time of 1) and the subsequent etching process is resist-free, the residue which is a compound of the resist component, the etching gas and Al is drastically reduced, and the yield can be expected to be improved. Further, since the multi-chamber device is used, the Al surface of the first layer is not exposed to the atmosphere even after the etching process. Therefore, the surface of the first layer Al can be kept clean, and the low resistance contact can be obtained in a short time even in the reverse sputter cleaning before the deposition of the second layer Al.

[0010]

1 and 2 show a two-layer wiring forming process which is an embodiment of the present invention. Although the intermediate insulating film (BPSG) is formed on the Si substrate 1 in the same manner as in the conventional case, A11% Si0.5% Cu (about 6%) is used as the first layer Al alloy wiring.
000Å) 13 and TiN (about 1000Å) 14 were used as a two-layer laminated structure (TiN 14 functions as an antireflection film). This may be an Al1% Si0.5% Cu single layer. A11% Si as shown in this embodiment
When a laminated wiring structure of 0.5% Cu 13 and TiN 14 is used, continuous deposition is performed using a multi-chamber sputtering apparatus. On top of that, as shown in FIG. 1A, first, the inter-layer insulating film 15 is formed of an O ₃ -TEOSSiO ₂ film having good coverage.
000 Å to 10000 Å formed, then figure 1 on it
As shown in (b), the TiN film 16 is deposited by about 2000Å reactive sputtering method. These processes may be either continuous treatment or normal treatment with a multi-chamber apparatus.

Next, as shown in FIG. 1C, a resist 17 is applied, and as shown in FIG. 1D, the resist 17 is opened in the photolithography process to form a through hole portion. Then, as shown in FIG. 1E, first, only the TiN film 16 is subjected to chlorine-based gas (Cl ₂ , CCl ₄ , BCl ₃ , SiCl ₄ , C _2).
FCl ₅ , C ₂ F ₂ Cl ₄ , CFCl ₃ , CHCl ₃ )
1 is performed by anisotropic etching with the resist 17 removed.
The structure of (f) is obtained. The patterned TiN film 16 serves as a mask for the subsequent etching process. Subsequent steps are performed by a multi-chamber apparatus as shown in FIG. As is well known, the multi-chamber apparatus is configured by combining apparatuses (chambers) for performing each process (etching and sputtering in this example) in a state of being shielded from the atmosphere. Of course, the movement of the object to be processed between the chambers is automatically performed. Therefore, the substrate is no longer exposed to the atmosphere. The first interlayer insulating film 15 as a mask to TiN16 using CF ₄ in the chamber 11 of FIG. 4 about 30
00Å Isotropic etching is performed as shown in FIG. The conditions are 600 W, CF ₄ 60 sccm and 1.8 Torr. Next, in the chamber 1-2 of FIG.
Is also anisotropically etched as shown in FIG. 2H using the TiN film 16 as a mask. Conditions are 600W, Ar80
0sccm, CF ₄ 60sccm, CHF ₃ 60sccm, total pressure 1To
It is rr. The TiN film 16 of the mask is also etched by these processes, but since the selection ratio with respect to SiO ₂ is 10 or more, it remains even after the etching is completed. Also, such SiO
_The important point is to select etching conditions with the highest possible selection ratio with ₂ . Finally, the TiN film 16 of the mask is removed by anisotropic etching in the chamber 1-3 (FIG. 4) as shown in FIG. The etching gas is
It is desirable to use SF ₆ which can increase the etching rate of the TiN film 16. At this time, if TiN 14 is laid on the first-layer Al alloy wiring 13 as in this embodiment,
This is also removed at the same time. (If TiN 14 is not spread, Al is less likely to be etched by the fluorine-based gas, so there is no fear of the film being extremely thinned.)
Independent processes of (g) to (i) as described above
Although the process is performed in the chamber, it may be performed by changing parameters such as power, etching gas, flow rate, and pressure in one chamber. Finally, Ar ⁺ reverse sputter cleaning is performed in the chamber 2-1 shown in FIG. 4, and the second layer Al alloy wiring 18 material (Al 1% Si 0.5% Cu) is used in the chamber 2-2 shown in FIG. ).

[0012]

As described above, according to the present invention, etching with a resist is used as a mask.
Since only the etching of iN is performed and the subsequent etching process is resist-free, the residue, which is a compound of the resist component, etching gas and Al, is drastically reduced, and the yield can be expected to be improved. According to the present invention, since the multi-chamber apparatus is used, the Al surface of the first layer is not exposed to the atmosphere even after the etching process. .. Therefore, the surface of the first layer Al can be kept clean, and the low resistance contact can be obtained in a short time even in the reverse sputter cleaning before the deposition of the second layer Al.

Needless to say, the present invention can be applied to a multi-layer wiring forming process of two or more layers.

Further, it is possible to form a wine glass type through hole, and the coverage of the upper Al layer can be improved.

[Brief description of drawings]

FIG. 1 is a first embodiment of the present invention.

FIG. 2 is a second embodiment of the present invention.

FIG. 3 Conventional example

[Fig. 4] Multi-chamber device configuration diagram

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Si substrate 2 BPSG 13 1st layer Al alloy wiring 14 TiN film 15 Interlayer insulation film 16 TiN film 17 Resist 18 2nd layer Al alloy wiring

Claims (2)

[Claims] 1. A step of: (a) forming a first wiring layer on a semiconductor substrate and forming an interlayer insulating film on the first wiring layer; and (b) forming a TiN film on the interlayer insulating film and forming a through hole. A step of forming a hole for formation, (c) a step of forming a through hole up to the surface of the first wiring layer using the opened TiN film as a mask, (d) a step of forming the through hole, A method of manufacturing a semiconductor device, comprising: a step of removing a TiN film; (e) a step of forming a second wiring layer; and the above steps. 2. The method for manufacturing a semiconductor device according to claim 1, wherein at least the steps (c) to (e) are continuously performed without exposing to the atmosphere.