JPH05110213A - Multiple-piece ceramic substrate - Google Patents
Multiple-piece ceramic substrateInfo
- Publication number
- JPH05110213A JPH05110213A JP3264767A JP26476791A JPH05110213A JP H05110213 A JPH05110213 A JP H05110213A JP 3264767 A JP3264767 A JP 3264767A JP 26476791 A JP26476791 A JP 26476791A JP H05110213 A JPH05110213 A JP H05110213A
- Authority
- JP
- Japan
- Prior art keywords
- ceramic substrate
- ceramic
- sections
- semiconductor elements
- wiring layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0097—Processing two or more printed circuits simultaneously, e.g. made from a common substrate, or temporarily stacked circuit boards
Landscapes
- Compositions Of Oxide Ceramics (AREA)
- Devices For Post-Treatments, Processing, Supply, Discharge, And Other Processes (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は半導体素子、抵抗、コン
デンサ等の電子素子が搭載される小型のセラミック基板
を多数個集約的に製作するようになした多数個取りセラ
ミック基板の改良に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a multi-cavity ceramic substrate in which a large number of small ceramic substrates on which electronic elements such as semiconductor elements, resistors and capacitors are mounted are collectively manufactured. is there.
【０００２】[0002]
【従来の技術】近時、半導体素子、抵抗、コンデンサ等
の電子素子が搭載されるセラミック基板は電子機器の小
型化、薄型化に伴ってその形状が極めて小型なものとな
ってきている。そのためこの小型のセラミック基板に半
導体素子や抵抗等を搭載する場合、或いは半導体素子や
抵抗等の電極が電気的に接続されるメタライズ配線層を
被着形成する場合、小型のセラミック基板はその形状が
小型で取扱い難いため通常は小型のセラミック基板を多
数個集約させた状態、即ち、多数個取りセラミック基板
と成した状態で各小型のセラミック基板上に半導体素子
等を搭載したり、半導体素子等の電極が接続されるメタ
ライズ配線層を被着したりするようになしている。2. Description of the Related Art Recently, a ceramic substrate on which electronic elements such as a semiconductor element, a resistor, and a capacitor are mounted has become extremely small in shape as electronic devices have become smaller and thinner. Therefore, when mounting a semiconductor element, a resistor, or the like on this small ceramic substrate, or when forming a metallized wiring layer to which electrodes of the semiconductor element, the resistor, etc. are electrically connected, the shape of the small ceramic substrate is Since it is small and difficult to handle, normally, a large number of small ceramic substrates are integrated, that is, a semiconductor device is mounted on each small ceramic substrate in a state of being a multi-cavity ceramic substrate. The metallized wiring layer to which the electrodes are connected is deposited.
【０００３】尚、前記多数個取りセラミック基板は大型
のセラミック基板に分割溝を入れ、該分割溝によって大
型のセラミック基板を所望する大きさの複数個の区画に
区分したものであり、各区画に半導体素子や抵抗等を搭
載したり、半導体素子等の電極が接続されるメタライズ
配線層を被着形成した後、大型のセラミック基板を前記
分割溝にそって切断分離し、これによって半導体素子や
抵抗等が搭載された、或いは表面に半導体素子等の電極
が接続されるメタライズ配線層を被着させた個々の小型
セラミック基板が一度に多数個得られるようにしたもの
である。The multi-cavity ceramic substrate is a large ceramic substrate provided with dividing grooves, and the dividing grooves divide the large ceramic substrate into a plurality of sections of a desired size. After mounting a semiconductor element, resistor, etc., or depositing a metallized wiring layer to which electrodes of the semiconductor element etc. are connected, a large ceramic substrate is cut and separated along the dividing groove. Etc., or a large number of individual small ceramic substrates each having a metallized wiring layer on the surface of which an electrode such as a semiconductor element is connected can be obtained at one time.
【０００４】[0004]
【発明が解決しようとする課題】しかしながら、大型セ
ラミック基板を分割溝によって複数の区画に区分して成
る従来の多数個取りセラミック基板は通常、その分割溝
の深さがセラミック基板の厚みに対し７５％程度と深
く、且つ全て均一深さに形成されているため大型セラミ
ック基板の分割溝によって区分された各区画に自動機を
使用して半導体素子や抵抗等を搭載したり、或いはスク
リーン印刷機を使用して半導体素子等の電極が接続され
るメタライズ配線層を被着形成したりする際、大型セラ
ミック基板に自動機やスクリーン印刷機より外力が印加
されると該外力は分割溝、特にセラミック基板の外周部
に位置する分割溝に集中して大型セラミック基板に分割
溝にそった割れを発生してしまい、その結果、大型セラ
ミック基板の各区画に半導体素子や抵抗等を正確、各確
実に搭載するのが不可となったり、半導体素子等の電極
が接続されるメタライズ配線層を正確に被着形成するこ
とができなくなるという欠点を有していた。However, in a conventional multi-cavity ceramic substrate in which a large-sized ceramic substrate is divided into a plurality of sections by dividing grooves, the depth of the dividing grooves is usually 75 with respect to the thickness of the ceramic substrate. %, All of them are formed to a uniform depth, so that semiconductor devices, resistors, etc. can be mounted using an automatic machine in each section divided by the dividing grooves of a large ceramic substrate, or a screen printing machine can be installed. When an external force is applied to a large-sized ceramic substrate from an automatic machine or a screen printing machine when depositing and forming a metallized wiring layer to which an electrode of a semiconductor element or the like is connected, the external force is applied to a dividing groove, particularly a ceramic substrate. Concentrated in the dividing grooves located on the outer periphery of the large ceramic substrate, cracks are generated along the dividing groove in the large ceramic substrate, and as a result, each section of the large ceramic substrate is divided. It has the drawbacks that it becomes impossible to accurately and surely mount semiconductor elements and resistors, and it becomes impossible to accurately deposit and form a metallized wiring layer to which electrodes of semiconductor elements and the like are connected. .
【０００５】[0005]
【課題を解決するための手段】本発明は大面積の平板状
セラミック基板の少なくとも一主面に、該セラミック基
板を複数の区画に区分するごとく分割溝を形成して成る
多数個取りセラミック基板であって、前記分割溝はその
深さがセラミック基板の外周部において浅く、中央部に
おいて深いことを特徴とするものである。DISCLOSURE OF THE INVENTION The present invention is a multi-cavity ceramic substrate in which a dividing groove is formed on at least one main surface of a large area flat ceramic substrate so as to divide the ceramic substrate into a plurality of sections. The dividing groove is characterized in that its depth is shallow in the outer peripheral portion of the ceramic substrate and deep in the central portion.
【０００６】[0006]
【実施例】次に本発明を添付図面に基づき詳細に説明す
る。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the accompanying drawings.
【０００７】図１(a)(b)は本発明の多数個取りセラミッ
ク基板の一実施例を示し、１はセラミック基板、２は分
割溝である。1 (a) and 1 (b) show an embodiment of a multi-cavity ceramic substrate of the present invention, in which 1 is a ceramic substrate and 2 is a dividing groove.
【０００８】前記セラミック基板１は酸化アルミニウム
質焼結体、ムライト質焼結体、窒化アルミニウム質焼結
体、炭化珪素質焼結体等の電気絶縁性のセラミック材か
ら成り、その上面に半導体素子や抵抗、コンデンサ等の
電子素子が搭載される。The ceramic substrate 1 is made of an electrically insulating ceramic material such as an aluminum oxide sintered body, a mullite sintered body, an aluminum nitride sintered body, and a silicon carbide sintered body. Electronic elements such as resistors, capacitors, etc. are mounted.
【０００９】前記セラミック基板１は例えば、セラミッ
ク原料粉末に有機溶剤、溶媒を添加混合して得た泥漿物
を従来周知のテープ成形法によりシート状となしてセラ
ミックグリーンシートを得るとともに該セラミックグリ
ーンシートを高温（約1500〜1800℃) で焼成することに
よって製作される。The ceramic substrate 1 is obtained by, for example, forming a sheet from a slurry obtained by adding and mixing an organic solvent and a solvent to a ceramic raw material powder to obtain a ceramic green sheet and obtaining the ceramic green sheet. It is manufactured by firing at high temperature (about 1500-1800 ℃).
【００１０】また前記セラミック基板１はその上面に該
セラミック基板1を複数の区画に区分するごとく格子状
の分割溝2 が形成されている。Further, the ceramic substrate 1 is provided with lattice-shaped dividing grooves 2 on its upper surface so as to divide the ceramic substrate 1 into a plurality of sections.
【００１１】前記セラミック基板1 に形成した分割溝２
はセラミック基板１を所望する小型セラミック基板の形
状に対応した大きさの複数の区画に区分するとともに各
区画に半導体素子等を搭載した後、或いは半導体素子等
の電極が接続されるメタライズ配線層3 を被着形成した
後、セラミック基板1を切断分離して多数個の小型セラ
ミック基板となす際、その切断分離を容易とする作用を
為す。Dividing groove 2 formed in the ceramic substrate 1
Is a metallized wiring layer 3 into which the ceramic substrate 1 is divided into a plurality of sections having a size corresponding to a desired shape of a small ceramic substrate, and after mounting a semiconductor element or the like in each section, or electrodes of the semiconductor element or the like are connected. When the ceramic substrate 1 is cut and separated into a large number of small ceramic substrates after being formed by adhesion, it has an action of facilitating the cutting and separation.
【００１２】また前記セラミック基板1 に形成した分割
溝2 はその深さがセラミック基板1の外周部において浅
く、中央部において深く形成されており、これによって
セラミック基板1 の各区画に自動機を使用して半導体素
子や抵抗等を搭載したり、或いはスクリーン印刷機を使
用して半導体素子等の電極が接続されるメタライズ配線
層3 を被着形成したりする際、セラミック基板1 に自動
機やスクリーン印刷機より外力が印加され該外力が分割
溝2 、特にセラミック基板1 の外周部に位置する分割溝
2 に集中したとしてもセラミック基板1 の外周部におけ
る分離溝2 はその深さが浅く機械的強度が高くなってい
ることから割れを発生することはなく、その結果、セラ
ミック基板1 の各区画に半導体素子や抵抗等を正確、各
確実に搭載するのが可能となるとともに半導体素子等の
電極が接続されるメタライズ配線層3 を正確に被着形成
することができる。Further, the dividing groove 2 formed on the ceramic substrate 1 is formed such that the depth thereof is shallow at the outer peripheral portion of the ceramic substrate 1 and deep at the central portion thereof, whereby an automatic machine is used for each section of the ceramic substrate 1. When mounting a semiconductor element, resistor, etc., or when depositing and forming a metallized wiring layer 3 to which electrodes of the semiconductor element etc. are connected by using a screen printer, an automatic machine or a screen is used for the ceramic substrate 1. An external force is applied from the printing machine, and the external force is located on the dividing groove 2, especially on the outer peripheral portion of the ceramic substrate 1.
Even if it is concentrated in 2, the separation groove 2 in the outer peripheral portion of the ceramic substrate 1 does not crack because the depth is shallow and the mechanical strength is high. It is possible to accurately and surely mount semiconductor elements, resistors and the like, and it is possible to accurately deposit and form the metallized wiring layer 3 to which electrodes of the semiconductor elements and the like are connected.
【００１３】尚、前記分割溝２はセラミック基板１とな
るセラミックグリーンシートに予めカッターナイフ等で
切り込みを入れておくことによって、或いはセラミック
基板１を構成するセラミック材にレーザー光線等により
切り込みを入れることによってセラミック基板１の上面
に格子状に形成される。The dividing groove 2 may be formed by cutting a ceramic green sheet to be the ceramic substrate 1 in advance with a cutter knife or by cutting a ceramic material forming the ceramic substrate 1 with a laser beam or the like. It is formed on the upper surface of the ceramic substrate 1 in a grid pattern.
【００１４】また前記分割溝2 の深さはセラミック基板
1 の中央部においてセラミック基板1 の厚みに対し２０
乃至８５％、セラミック基板１の外周部においてセラミ
ック基板1 の厚みに対し２０％以下としておくとセラミ
ック基板1 の各区画に半導体素子や抵抗等を自動機を使
用して搭載したり、半導体素子等の電極が接続されるメ
タライズ配線層3 をスクリーン印刷機を使用して被着形
成したりしてもセラミック基板１に割れが発生すること
はなく、また同時にセラミック基板１の各区画に半導体
素子等を搭載、或いはメタライズ配線層を被着形成した
後、セラミック基板1 を切断分離して多数個の小型セラ
ミック基板となす際、その切断分離を容易となすことが
でる。従って、セラミック基板１に形成する分割溝２の
深さはセラミック基板1 の中央部においてセラミック基
板1 の厚みに対し２０乃至８５％、セラミック基板１の
外周部においてセラミック基板1 の厚みに対し２０％以
下としておくことが好ましい。The depth of the dividing groove 2 is a ceramic substrate.
The thickness of ceramic substrate 1 at the center of 1 is 20
85% to 20% or less of the thickness of the ceramic substrate 1 at the outer peripheral portion of the ceramic substrate 1, semiconductor elements, resistors, etc. can be mounted on each section of the ceramic substrate 1 using an automatic machine, semiconductor elements, etc. Even if the metallized wiring layer 3 to which the electrodes are connected is formed by using a screen printing machine, the ceramic substrate 1 does not crack, and at the same time, each section of the ceramic substrate 1 has a semiconductor element or the like. When the ceramic substrate 1 is cut and separated into a large number of small ceramic substrates after mounting or depositing a metallized wiring layer, the cutting and separation can be facilitated. Therefore, the depth of the dividing groove 2 formed in the ceramic substrate 1 is 20 to 85% of the thickness of the ceramic substrate 1 in the central portion of the ceramic substrate 1 and 20% of the thickness of the ceramic substrate 1 in the outer peripheral portion of the ceramic substrate 1. The following is preferable.
【００１５】前記分割溝２によって複数の区画に区分さ
れたセラミック基板１はまたその各区画に半導体素子等
の電極が接続されるメタライズ配線層３が被着形成され
ている。The ceramic substrate 1 divided into a plurality of sections by the dividing grooves 2 is also formed with a metallized wiring layer 3 to which electrodes such as semiconductor elements are connected.
【００１６】前記メタライズ配線層は例えば、銀- パラ
ジウム(Ag-Pd) 等の金属から成り、セラミック基板1 の
各区画に従来周知のスクリーン印刷法を採用することに
よって被着形成される。The metallized wiring layer is made of, for example, a metal such as silver-palladium (Ag-Pd), and is deposited and formed on each section of the ceramic substrate 1 by employing a conventionally known screen printing method.
【００１７】かくして本発明の多数個取りセラミック基
板によれば、分割溝によって区分された各区画に半導体
素子や抵抗等を自動機を使用して搭載した後、或いは半
導体素子等の各電極が接続されるメタライズ配線層をス
クリーン印刷機等を使用して被着形成した後、分割溝に
沿って切断分離され、これによって製品としての小型セ
ラミック基板の個々に分離される。Thus, according to the multi-cavity ceramic substrate of the present invention, semiconductor elements, resistors, etc. are mounted in each section divided by the dividing grooves by using an automatic machine, or each electrode of the semiconductor elements is connected. The metallized wiring layer to be formed is adhered and formed by using a screen printer or the like, and then cut and separated along the dividing groove, whereby individual small ceramic substrates as products are separated.
【００１８】次に本発明の多数個取りセラミック基板の
製造方法の一例を図2 に基づき説明する。Next, an example of a method for manufacturing a multi-cavity ceramic substrate of the present invention will be described with reference to FIG.
【００１９】まず図2(a)に示す如く、セラミックグリー
ンシート10を準備する。前記セラミックグリーンシート
10は、例えばセラミック基板1 が酸化アルミニウム質焼
結体から成る場合、酸化アルミニウム(Al 2 O 3 ) 、シ
リカ(SiO2 ) 、カルシア(CaO) 、マグネシア(MgO) 等か
ら成るセラミック原料粉末に有機溶剤、溶媒を添加混合
して泥漿状となすとともに該泥漿物をドクターブレード
法やカレンダーロール法等によりシート状に成形するこ
とによって得られる。First, as shown in FIG. 2 (a), a ceramic green sheet 10 is prepared. The ceramic green sheet
For example, when the ceramic substrate 1 is made of a sintered aluminum oxide material, 10 is an organic material added to a ceramic raw material powder made of aluminum oxide (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), magnesia (MgO), or the like. It can be obtained by adding a solvent and a solvent to form a slurry and molding the slurry into a sheet by a doctor blade method, a calendar roll method or the like.
【００２０】次に前記セラミックグリーンシート10を図
2(b)に示す如く、平板状の基台11上に密着するようにし
て載置させ、しかる後、基台11上のセラミックグリーン
シート10に中央部に凸部を有する円弧状のカッター刃12
を基台11に対し平行に押圧してセラミックグリーンシー
ト10にカッター刃12の形状に対応する円弧状の切り込み
を入れる。Next, the ceramic green sheet 10 is illustrated.
As shown in FIG. 2 (b), it is placed on the flat base 11 so as to be in close contact with it, and then the ceramic green sheet 10 on the base 11 has an arc-shaped cutter blade having a convex portion at the center. 12
By pressing in parallel to the base 11, an arcuate cut corresponding to the shape of the cutter blade 12 is made in the ceramic green sheet 10.
【００２１】次に前記切り込みを入れたセラミックグリ
ーンシート10を基台11より外なすとともにこれを約1600
℃の温度で焼成すれば図2(c)に示す如く、切り込みを分
離溝2 としたセラミック基板1 となる。Next, the notched ceramic green sheet 10 is removed from the base 11 and is cut to about 1600.
When fired at a temperature of ° C, a ceramic substrate 1 having notches as separation grooves 2 is obtained as shown in Fig. 2 (c).
【００２２】尚、本発明は上述の実施例には限定される
ものではなく、本発明の要旨を逸脱市内範囲であれば種
々の変更は可能である。The present invention is not limited to the above-mentioned embodiments, but various modifications can be made within the scope of the present invention.
【００２３】[0023]
【発明の効果】本発明の多数個取りセラミック基板によ
れば、大面積の平板状セラミック基板を複数の区画に区
分する分割溝の深さをセラミック基板の外周部において
浅く、中央部において深くしたことからセラミック基板
の各区画に自動機を使用して半導体素子や抵抗等を搭載
したり、或いはスクリーン印刷機を使用して半導体素子
等の電極が接続されるメタライズ配線層を被着形成した
りする際、セラミック基板に自動機やスクリーン印刷機
より外力が印加され該外力が分割溝、特にセラミック基
板の外周部に位置する分割溝に集中したとしてもセラミ
ック基板に割れを発生することはなく、その結果、セラ
ミック基板の各区画に半導体素子や抵抗等を正確、各確
実に搭載するのが可能となるとともに半導体素子等の電
極が接続されるメタライズ配線層を正確に被着形成する
ことができる。According to the multi-cavity ceramic substrate of the present invention, the depth of the dividing groove that divides a large-area flat plate-shaped ceramic substrate into a plurality of sections is made shallow at the outer peripheral portion of the ceramic substrate and deep at the central portion. Therefore, it is possible to use an automatic machine to mount semiconductor elements and resistors in each section of the ceramic substrate, or to use a screen printing machine to deposit and form metallized wiring layers to which electrodes of semiconductor elements are connected. In doing so, even if an external force is applied to the ceramic substrate from an automatic machine or a screen printing machine and the external force concentrates on the dividing grooves, particularly the dividing grooves located on the outer peripheral portion of the ceramic substrate, the ceramic substrate does not crack. As a result, it becomes possible to accurately and surely mount semiconductor elements, resistors, etc. in each section of the ceramic substrate, and the electrodes of the semiconductor elements etc. are connected. The rise wiring layer can be accurately deposited and formed.
【図１】(a) は本発明の多数個取りセラミック基板の一
実施例を示す平面図であり、(b) は(a) のＸ−Ｘ線断面
図である。1A is a plan view showing an embodiment of a multi-cavity ceramic substrate of the present invention, and FIG. 1B is a sectional view taken along line XX of FIG.
【図２】(a)乃至(c) は本発明の多数個取りセラミック
基板の製造方法を説明するための各工程毎の断面図であ
る。2 (a) to 2 (c) are cross-sectional views of respective steps for explaining a method for manufacturing a multi-cavity ceramic substrate of the present invention.
１・・・セラミック基板 ２・・・分離溝 ３・・・メタライズ配線層 1 ... Ceramic substrate 2 ... Separation groove 3 ... Metallized wiring layer
Claims (1)
も一主面に、該セラミック基板を複数の区画に区分する
ごとく分割溝を形成して成る多数個取りセラミック基板
であって、前記分割溝はその深さがセラミック基板の外
周部において浅く、中央部において深いことを特徴とす
る多数個取りセラミック基板。1. A multi-cavity ceramic substrate in which a dividing groove is formed on at least one main surface of a large area flat ceramic substrate so as to divide the ceramic substrate into a plurality of sections, wherein the dividing groove is A multi-cavity ceramic substrate characterized in that its depth is shallow at the outer peripheral portion of the ceramic substrate and deep at the central portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3264767A JP2922685B2 (en) | 1991-10-14 | 1991-10-14 | Multi-cavity ceramic substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3264767A JP2922685B2 (en) | 1991-10-14 | 1991-10-14 | Multi-cavity ceramic substrate |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH05110213A true JPH05110213A (en) | 1993-04-30 |
| JP2922685B2 JP2922685B2 (en) | 1999-07-26 |
Family
ID=17407907
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3264767A Expired - Fee Related JP2922685B2 (en) | 1991-10-14 | 1991-10-14 | Multi-cavity ceramic substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2922685B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008016587A (en) * | 2006-07-05 | 2008-01-24 | Denso Corp | Method of manufacturing ceramic laminated layer substrate |
| WO2009154295A1 (en) * | 2008-06-20 | 2009-12-23 | 日立金属株式会社 | Collective ceramic substrate, manufacturing method for the substrate, ceramic substrate, and ceramic circuit substrate |
-
1991
- 1991-10-14 JP JP3264767A patent/JP2922685B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008016587A (en) * | 2006-07-05 | 2008-01-24 | Denso Corp | Method of manufacturing ceramic laminated layer substrate |
| WO2009154295A1 (en) * | 2008-06-20 | 2009-12-23 | 日立金属株式会社 | Collective ceramic substrate, manufacturing method for the substrate, ceramic substrate, and ceramic circuit substrate |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2922685B2 (en) | 1999-07-26 |
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