JPH058971U - Multi-cavity ceramic board - Google Patents

Multi-cavity ceramic board

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Publication number
JPH058971U
JPH058971U JP5507091U JP5507091U JPH058971U JP H058971 U JPH058971 U JP H058971U JP 5507091 U JP5507091 U JP 5507091U JP 5507091 U JP5507091 U JP 5507091U JP H058971 U JPH058971 U JP H058971U
Authority
JP
Japan
Prior art keywords
ceramic substrate
dividing
dividing groove
hole
cavity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5507091U
Other languages
Japanese (ja)
Inventor
守 村松
Original Assignee
京セラ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 京セラ株式会社 filed Critical 京セラ株式会社
Priority to JP5507091U priority Critical patent/JPH058971U/en
Publication of JPH058971U publication Critical patent/JPH058971U/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【目的】小型セラミック基板2に形成される先端が45
゜の角度を有する欠け易い鋭角突起が形成されることを
皆無となし、該鋭角突起が欠けて搭載される電子素子に
傷を付け該素子を不良となしたり、搬送装置や加工装置
に詰まって該装置を故障させることを皆無となすことを
目的とする。 【構成】貫通孔4の分割溝3と交わる辺を該分割溝3に
対して実質的に直角となるように形成した。貫通孔4と
分割溝3とがずれて形成されても多数個取りセラミック
基板を分割溝3に添って分割して得られる小型セラミッ
ク基板2には先端が45゜の角度を有する欠け易い鋭角
突起は形成されない。
(57) [Abstract] [Purpose] The tip formed on the small ceramic substrate 2 is 45
There is no possibility that sharp-edged projections having an angle of ° may easily be formed, and the sharp-edged projections may be chipped to damage the mounted electronic element, render the element defective, or clog the transportation device or processing device. The purpose is to make the device completely non-functional. [Structure] A side of the through hole 4 which intersects with the dividing groove 3 is formed so as to be substantially perpendicular to the dividing groove 3. Even if the through hole 4 and the dividing groove 3 are formed deviating from each other, the small ceramic substrate 2 obtained by dividing a multi-cavity ceramic substrate along the dividing groove 3 has a sharp tip with an angle of 45 ° Is not formed.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は半導体素子、抵抗、コンデンサ等の電子素子を搭載するための小型セ ラミック基板を多数個集約的に製作するようになした多数個取りセラミック基板 に関し、より詳細には一枚のセラミック基板を分割溝に添って分割することによ って小型セラミック基板を多数個集約的に製作するようになした多数個取りセラ ミック基板に関する。 The present invention relates to a multi-cavity ceramic substrate for collectively manufacturing a large number of small ceramic substrates for mounting electronic devices such as semiconductor devices, resistors and capacitors. More specifically, it relates to a single ceramic substrate. The present invention relates to a multi-cavity ceramic substrate in which a large number of small ceramic substrates are collectively manufactured by dividing the substrate along the dividing grooves.

【0002】[0002]

【従来の技術】[Prior Art]

従来、半導体素子、抵抗、コンデンサ等の電子素子を搭載するための小型セラ ミック基板を多数個集約的に製作するようになした多数個取りセラミック基板は 図4、図5に示すように平板状のセラミック板21から構成されており、セラミ ック板21の上面に該セラミック基板21を多数の小型セラミック基板22に区 画する格子状の分割溝23が形成されている。前記多数個取りセラミック基板は 分割溝23で区画された小型セラミック基板22の各々にその上面から下面にか けて該小型セラミック基板22に搭載される電子素子を外部電気回路に接続する ためのメタライズ配線層24が形成されており、各小型セラミック基板22上面 には電子素子が該メタライズ配線層24と電気的に接続されるようにして搭載さ れる。前記多数個取りセラミック基板は各小型セラミック基板22に電子素子を 搭載前、あるいは搭載後に分割溝23に添ってチョコレートブレークされること によって多数の小型セラミック基板22に分割され、これによっての小型セラミ ック基板22が多数個集約的に製作されることとなる。 Conventionally, a multi-cavity ceramic substrate, in which a large number of small ceramic substrates for mounting electronic elements such as semiconductor elements, resistors, capacitors, etc. are collectively manufactured, has a flat plate shape as shown in FIGS. 4 and 5. The ceramic plate 21 is provided with a grid-shaped dividing groove 23 that divides the ceramic substrate 21 into a large number of small ceramic substrates 22 on the upper surface of the ceramic plate 21. The multi-cavity ceramic substrate is a metallization for connecting an electronic element mounted on each of the small ceramic substrates 22 divided by the dividing groove 23 from the upper surface to the lower surface of the small ceramic substrate 22 to an external electric circuit. A wiring layer 24 is formed, and an electronic element is mounted on the upper surface of each small ceramic substrate 22 so as to be electrically connected to the metallized wiring layer 24. The multi-cavity ceramic substrate is divided into a large number of small ceramic substrates 22 by chocolate breaks along the dividing grooves 23 before or after mounting the electronic elements on the respective small ceramic substrates 22. A large number of substrate 22 will be collectively manufactured.

【0003】 尚、前記多数個取りセラミック基板はその分割溝23の交点にメタライズ配線 層24を上面から下面に導出させるための通路となり、且つ多数個取りセラミッ ク基板を分割溝23に添って正しく分割させるための貫通孔25が形成されてい る。前記貫通孔25はその各辺が分割溝23と約45゜の角度を有するような正 方形をしており、貫通孔25の各頂点と分割溝23とが一致するように形成され ている。The multi-cavity ceramic substrate serves as a passage for leading out the metallized wiring layer 24 from the upper surface to the lower surface at the intersection of the dividing grooves 23, and the multi-cavity ceramic substrate is properly arranged along the dividing groove 23. A through hole 25 for dividing is formed. The through hole 25 has a square shape such that each side thereof forms an angle of about 45 ° with the dividing groove 23, and the apex of the through hole 25 and the dividing groove 23 are formed to coincide with each other.

【0004】[0004]

【考案が解決しようとする課題】[Problems to be solved by the device]

しかしながら、この従来の多数個取りセラミック基板は一般的にその貫通孔2 5が打ち抜き金型を用いた打ち抜き加工によって形成され、一方分割溝23はカ ッター刃を用いた切り込み加工によって形成される。このように従来の多数個取 りセラミック基板は貫通孔25と分割溝23とがそれぞれ異なる工程で形成され るために貫通孔25と分割溝23との加工位置に誤差が生じ、貫通孔25の各頂 点と分割溝23とが最大0.1mm程ずれて形成される場合がある。このように貫 通孔25の各頂点と分割溝23とがずれて形成された場合、図6に示すように多 数個取りセラミック基板を分割溝23に添って分割することによって得られる多 数の小型セラミック基板22に先端が45゜の角度を有する鋭角突起26が形成 されることとなる。この鋭角突起26は先端が45゜であることから欠け易すく 、小型セラミック基板22の搬送や加工に伴い小型セラミック基板22同士の衝 突や小型セラミック基板22と搬送装置あるいは加工装置との衝突により容易に 欠けて脱落してしまい、該脱落した鋭角突起26が小型セラミック基板22に搭 載される電子素子を傷つけ、該電子素子に不良を発生させたり、搬送装置や加工 装置に詰まり該搬送装置や加工装置の故障を引き起こすという欠点を有していた 。 However, in this conventional multi-cavity ceramic substrate, the through holes 25 are generally formed by punching using a punching die, while the dividing grooves 23 are formed by cutting using a cutter blade. As described above, in the conventional multi-cavity ceramic substrate, since the through hole 25 and the dividing groove 23 are formed in different steps, an error occurs in the processing position between the through hole 25 and the dividing groove 23, and the through hole 25 In some cases, the apexes and the dividing groove 23 may be formed so as to deviate from each other by a maximum of 0.1 mm. When the vertices of the through holes 25 and the dividing grooves 23 are formed so as to deviate from each other in this way, as shown in FIG. 6, a plurality of multi-cavity ceramic substrates can be obtained by dividing along the dividing grooves 23. The small-sized ceramic substrate 22 is formed with the acute-angled projection 26 having a tip of 45 °. Since the tip of the acute-angled projection 26 is 45 °, it is easy to be chipped, and when the small ceramic substrates 22 are conveyed or processed, the small-sized ceramic substrates 22 collide with each other or the small-sized ceramic substrate 22 collides with the transfer device or the processing device. The chip may be easily chipped and fallen off, and the fallen acute-angled projection 26 may damage the electronic element mounted on the small ceramic substrate 22 and cause a defect in the electronic element, or may cause a jam in a carrying device or a processing device. It had the drawback of causing damage to the processing equipment.

【0005】[0005]

【課題を解決するための手段】[Means for Solving the Problems]

本考案の多数個取りセラミック基板は平板状のセラミック板の少なくとも一主 面に格子状に配置された分割溝を有し、且つ該分割溝の交点に貫通孔を有する多 数個取りセラミック基板において、前記貫通孔の分割溝と交わる辺は該分割溝に 対して実質的に直角であることを特徴とする。 The multi-cavity ceramic substrate of the present invention is a multi-cavity ceramic substrate having a flat ceramic plate having at least one main surface with dividing grooves arranged in a grid pattern and having through holes at intersections of the dividing grooves. The side of the through hole that intersects the dividing groove is substantially perpendicular to the dividing groove.

【0006】[0006]

【実施例】【Example】

次に本考案の多数個取りセラミック基板を添付の図面に基づき詳細に説明する 。 Next, the multi-cavity ceramic substrate of the present invention will be described in detail with reference to the accompanying drawings.

【0007】 図1は本考案の多数個取りセラミック基板の一実施例を示す平面図、図2は図 1に示した多数個取りセラミック基板の断面図、図3は図1及び図2に示した多 数個取りセラミック基板を分割して得られる小型セラミック基板を示す平面図で あり、1はセラミック板、2は小型セラミック基板、3は分割溝、4は貫通孔で ある。FIG. 1 is a plan view showing an embodiment of the multi-cavity ceramic substrate of the present invention, FIG. 2 is a sectional view of the multi-cavity ceramic substrate shown in FIG. 1, and FIG. 3 is shown in FIGS. FIG. 3 is a plan view showing a small ceramic substrate obtained by dividing a multi-cavity ceramic substrate, where 1 is a ceramic plate, 2 is a small ceramic substrate, 3 is a dividing groove, and 4 is a through hole.

【0008】 前記セラミック板1はアルミナ、窒化アルミニウム、ムライト、炭化珪素等の 等のセラミックスから成る平板であり、上面に該セラミック板1を半導体素子、 抵抗、コンデンサ等の電子素子を搭載するための多数の小型セラミック基板2に 区画する格子状の分割溝3及び該分割溝3の交点に貫通孔4が形成されており、 分割溝3で区画された小型セラミック基板2の各々にはその上面から貫通孔4を 介し下面にかけて該小型セラミック基板2に搭載される電子素子を外部電気回路 に接続するためのメタライズ配線層5が形成されている。The ceramic plate 1 is a flat plate made of ceramics such as alumina, aluminum nitride, mullite, and silicon carbide. The ceramic plate 1 has an upper surface for mounting electronic elements such as semiconductor elements, resistors, and capacitors. Lattice-shaped dividing grooves 3 which are divided into a large number of small ceramic substrates 2 and through holes 4 are formed at intersections of the dividing grooves 3, and each of the small ceramic substrates 2 divided by the dividing grooves 3 is provided with an upper surface thereof. A metallized wiring layer 5 for connecting an electronic element mounted on the small ceramic substrate 2 to an external electric circuit is formed through the through hole 4 to the lower surface.

【0009】 前記セラミック板1は例えばアルミナセラミックスから成る場合、アルミナ( Al2 3 )、シリカ(SiO2 )、カルシア(CaO)、マグネシア(MgO )等から成る原料粉末に適当な有機溶剤、バインダーを添加混合して泥漿状とな すとともにこれを従来周知のドクターブレード法を採用することによってシート 状となしセラミックグリーンシート(セラミック生シート)を得、これを約16 00℃の温度で焼成することによって製作される。When the ceramic plate 1 is made of alumina ceramics, for example, alumina (Al 2 O 3 ), silica (SiO 2 ), calcia (CaO), magnesia (MgO), etc. Is added and mixed to form a sludge, and by adopting a conventionally known doctor blade method, a sheet-shaped ceramic green sheet (ceramic green sheet) is obtained, which is fired at a temperature of about 1600 ° C. Produced by

【0010】 前記分割溝3は多数個取りセラミック基板を該分割溝3に添ってチョコレート ブレークすることによって多数の小型セラミック基板2に分割させる作用をなし 、セラミック基板1となるセラミックグリーンシートに円形カッター刃等の刃物 を用いて所定深さに切り込むことによって形成され、通常その深さがセラミック 板1の厚みの約半分、幅が約0.01mm程度に形成される。The dividing groove 3 has a function of dividing a multi-cavity ceramic substrate into a large number of small ceramic substrates 2 by chocolate breaking along the dividing groove 3, and a circular cutter is formed on a ceramic green sheet to be the ceramic substrate 1. It is formed by cutting with a blade such as a blade to a predetermined depth, and the depth is usually about half the thickness of the ceramic plate 1 and the width is about 0.01 mm.

【0011】 前記貫通孔4は8角形状をしており、メタライズ配線層5をセラミック基板1 の上面から下面に導出させるための通路となると同時に多数個取りセラミック基 板を分割溝3に添って正しく分割させる作用をなす。前記貫通孔4は、分割溝3 と交わる辺4a乃至4dがそれぞれ交わる分割溝3に対して実質的に直角に形成 されており、且つ辺4a乃至4dの長さは貫通孔4と分割溝3との最大ずれ幅の 2倍以上にあたる0.2mm以上の長さを有している。このため、本考案の多数個 取りセラミック基板は前記貫通孔4と分割溝3との位置がずれて形成されたとし ても、図3に示すように分割溝3に添って分割して得られる小型セラミック基板 2には先端が90゜の角度を有する突起6は形成されるものの、先端が45゜の 角度を有する欠け易い鋭角突起が形成されることは一切ない。The through hole 4 has an octagonal shape and serves as a passage for leading the metallized wiring layer 5 from the upper surface to the lower surface of the ceramic substrate 1, and at the same time, a multi-cavity ceramic substrate is provided along the dividing groove 3. It acts to divide correctly. The through hole 4 is formed substantially at a right angle to the dividing groove 3 where the sides 4a to 4d intersecting the dividing groove 3 intersect, and the lengths of the sides 4a to 4d are the through hole 4 and the dividing groove 3 respectively. It has a length of 0.2 mm or more, which is more than twice the maximum gap between and. Therefore, the multi-cavity ceramic substrate of the present invention can be obtained by dividing the through hole 4 and the dividing groove 3 along the dividing groove 3 as shown in FIG. Although the small ceramic substrate 2 is formed with the projection 6 having a tip of 90 °, there is no formation of an acute-angled projection having a tip of 45 °.

【0012】 尚、前記貫通孔4はセラミック基板1となるセラミックグリーンシートに従来 周知の打ち抜きプレスにより所定形状に打ち抜くことによって形成される。The through hole 4 is formed by punching a ceramic green sheet, which is the ceramic substrate 1, into a predetermined shape by a conventionally known punching press.

【0013】 前記メタライズ配線層5はタングステン、モリブデン等の高融点金属粉末より 成り、該タングステン等の金属粉末に適当な有機溶剤、バインダーを添加混合し て得た金属ペーストをセラミック板1となるセラミックグリーンシートに従来周 知のスクリーン印刷等の厚膜手法を採用することによって印刷塗布させておくこ とにより、セラミック板1と一体に形成される。尚、前記メタライズ配線層5の 露出する表面にニッケル、金等の良導電性で耐食性に優れた金属をメッキにより 2乃至20μmの厚みに層着しておくと、メタライズ配線層5が腐食するのを有 効に防止することができる。従って、前記メタライズ配線層5の露出する表面に はニッケル、金等の良電導性で耐食性に優れた金属をメッキにより2乃至20μ mの厚みに層着しておくことが好ましい。The metallized wiring layer 5 is made of a metal powder having a high melting point such as tungsten and molybdenum, and a metal paste obtained by adding and mixing an appropriate organic solvent and a binder to the metal powder such as tungsten is used as the ceramic plate 1. The green sheet is formed integrally with the ceramic plate 1 by applying a known thick film method such as screen printing and applying the print on the green sheet. If a metal having good conductivity and excellent corrosion resistance such as nickel and gold is plated on the exposed surface of the metallized wiring layer 5 to a thickness of 2 to 20 μm, the metallized wiring layer 5 will be corroded. Can be effectively prevented. Therefore, it is preferable that the exposed surface of the metallized wiring layer 5 be plated with a metal of good conductivity and corrosion resistance such as nickel or gold to a thickness of 2 to 20 μm by plating.

【0014】 かくして、本考案の多数個取りセラミック基板によれば、前記小型セラミック 基板2の各々に半導体素子、抵抗、コンデンサ等の電子素子を搭載前、あるいは 搭載後に分割溝3に添ってチョコレートブレークされることによって多数の小型 セラミック基板2に分割され、電子素子を搭載するための小型セラミック基板2 が多数個集約的に製作されることとなる。Thus, according to the multi-cavity ceramic substrate of the present invention, a chocolate break is formed along each of the small ceramic substrates 2 along the dividing groove 3 before or after mounting an electronic device such as a semiconductor device, a resistor, or a capacitor. As a result, it is divided into a large number of small ceramic substrates 2, and a large number of small ceramic substrates 2 for mounting electronic elements are collectively manufactured.

【0015】 尚、本考案は上記の実施例に限定されるものではなく、例えば貫通孔の分割溝 と交わる辺が該分割溝と実質的に直角であれば、貫通孔は4角形やその他の形状 でもよく、本考案の主旨を逸脱しない範囲であれば種々の変更は可能である。It should be noted that the present invention is not limited to the above-described embodiment. For example, if the side of the through hole that intersects the dividing groove is substantially perpendicular to the dividing groove, the through hole may have a quadrangular shape or other shapes. The shape may be changed, and various modifications can be made without departing from the gist of the present invention.

【0016】[0016]

【考案の効果】[Effect of the device]

本考案の多数個取りセラミック基板によれば、貫通孔の分割溝と交わる辺が該 分割溝に対して実質的に直角の角度を有するので、貫通孔の位置と分割溝の位置 とがずれたとしてもこれを分割して得られる小型セラミック基板には先端が90 ゜の角度を有する突起は形成されるものの、先端が45゜の角度を有する欠け易 い鋭角突起は形成されないことから、該突起が欠けて脱落することは殆どなく、 従って欠けて脱落した鋭角突起が搭載される電子素子に傷をつけて該電子素子に 不良を発生させたり、搬送装置や加工装置に詰まって該搬送装置や加工装置に故 障を引き起こさせることは一切ない。 According to the multi-cavity ceramic substrate of the present invention, since the side of the through hole that intersects the dividing groove has an angle that is substantially perpendicular to the dividing groove, the positions of the through hole and the dividing groove are misaligned. As a result, although the small ceramic substrate obtained by dividing this is formed with a projection having a tip of 90 °, an acute-angled projection having a tip of 45 ° is not formed. It is unlikely that the chip will drop off and fall off.Therefore, the sharp-edged projections that have chipped off will damage the electronic element on which it is mounted, causing defects in the electronic element, or clogging the carrier or processing equipment The processing equipment does not cause any trouble.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の多数個取りセラミック基板の一実施例
を示す平面図。
FIG. 1 is a plan view showing an embodiment of a multi-cavity ceramic substrate of the present invention.

【図2】図1で示した多数個取りセラミック基板の断面
図。
FIG. 2 is a sectional view of the multi-cavity ceramic substrate shown in FIG.

【図3】図1で示した多数個取りセラミック基板を分割
して得られる小型セラミック基板の平面図。
3 is a plan view of a small ceramic substrate obtained by dividing the multi-cavity ceramic substrate shown in FIG.

【図4】従来の多数個取りセラミック基板を示す平面
図。
FIG. 4 is a plan view showing a conventional multi-cavity ceramic substrate.

【図5】図4で示した多数個取りセラミック基板の断面
図。
5 is a cross-sectional view of the multi-cavity ceramic substrate shown in FIG.

【図6】図4で示した多数個取りセラミック基板を分割
して得られる小型セラミック基板の平面図。
6 is a plan view of a small ceramic substrate obtained by dividing the multi-cavity ceramic substrate shown in FIG.

【符号の説明】[Explanation of symbols]

1・・・セラミック板 2・・・小型セラミック基板 3・・・分割溝 4・・・貫通孔 1 ... Ceramic plate 2 ... Small ceramic substrate 3 ... Dividing groove 4 ... Through hole

Claims (1)

【実用新案登録請求の範囲】 【請求項1】平板状のセラミック板の少なくとも一主面
に格子状に配置された分割溝を有し、且つ該分割溝の交
点に貫通孔を有する多数個取りセラミック基板におい
て、前記貫通孔の分割溝と交わる辺は該分割溝に対して
実質的に直角であることを特徴とする多数個取りセラミ
ック基板。
[Claims for utility model registration] 1. A multi-cavity product having dividing grooves arranged in a grid pattern on at least one main surface of a flat ceramic plate, and having through holes at intersections of the dividing grooves. In the ceramic substrate, a side of the through hole which intersects with the dividing groove is substantially perpendicular to the dividing groove.
JP5507091U 1991-07-16 1991-07-16 Multi-cavity ceramic board Pending JPH058971U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5507091U JPH058971U (en) 1991-07-16 1991-07-16 Multi-cavity ceramic board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5507091U JPH058971U (en) 1991-07-16 1991-07-16 Multi-cavity ceramic board

Publications (1)

Publication Number Publication Date
JPH058971U true JPH058971U (en) 1993-02-05

Family

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Family Applications (1)

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JP5507091U Pending JPH058971U (en) 1991-07-16 1991-07-16 Multi-cavity ceramic board

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009010103A (en) * 2007-06-27 2009-01-15 Ngk Spark Plug Co Ltd Multiple patterning ceramic substrate
JP2017013428A (en) * 2015-07-03 2017-01-19 ブラザー工業株式会社 Printing fluid cartridge, printing system, substrate, and manufacturing method of substrate
JPWO2018216693A1 (en) * 2017-05-23 2020-03-19 京セラ株式会社 Multi-cavity wiring board, electronic component storage package, and electronic device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6046090A (en) * 1983-08-24 1985-03-12 シヤ−プ株式会社 Electronic circuit board
JPH01100989A (en) * 1987-10-14 1989-04-19 Matsushita Electric Ind Co Ltd Structure of ceramic substrate
JPH0258364A (en) * 1988-08-24 1990-02-27 Hitachi Ltd Circuit board and electronic device using it and its manufacture
JPH04254391A (en) * 1991-02-06 1992-09-09 Nec Corp Printed wiring board

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6046090A (en) * 1983-08-24 1985-03-12 シヤ−プ株式会社 Electronic circuit board
JPH01100989A (en) * 1987-10-14 1989-04-19 Matsushita Electric Ind Co Ltd Structure of ceramic substrate
JPH0258364A (en) * 1988-08-24 1990-02-27 Hitachi Ltd Circuit board and electronic device using it and its manufacture
JPH04254391A (en) * 1991-02-06 1992-09-09 Nec Corp Printed wiring board

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009010103A (en) * 2007-06-27 2009-01-15 Ngk Spark Plug Co Ltd Multiple patterning ceramic substrate
JP2017013428A (en) * 2015-07-03 2017-01-19 ブラザー工業株式会社 Printing fluid cartridge, printing system, substrate, and manufacturing method of substrate
JPWO2018216693A1 (en) * 2017-05-23 2020-03-19 京セラ株式会社 Multi-cavity wiring board, electronic component storage package, and electronic device

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