JPH0496180A - Substrate cad device - Google Patents
Substrate cad deviceInfo
- Publication number
- JPH0496180A JPH0496180A JP2210929A JP21092990A JPH0496180A JP H0496180 A JPH0496180 A JP H0496180A JP 2210929 A JP2210929 A JP 2210929A JP 21092990 A JP21092990 A JP 21092990A JP H0496180 A JPH0496180 A JP H0496180A
- Authority
- JP
- Japan
- Prior art keywords
- mounting surface
- information
- component
- circuit
- board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims description 3
- 238000010586 diagram Methods 0.000 claims description 21
- 238000007726 management method Methods 0.000 abstract description 13
- 238000013523 data management Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 description 2
- 238000012938 design process Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
Landscapes
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明は基板ＣＡＤ装置に関し、特に、プリント板ＣＡ
Ｄシステムにおいて、回路図データと基板設計データ間
で部品実装面情報を一元的に管理する機能に関するもの
である。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a printed circuit board CAD system, and in particular, to a printed circuit board CAD system.
In the D system, this relates to a function that centrally manages component mounting surface information between circuit diagram data and board design data.
（従来の技術）
両面実装プリント基板の設計は、作成された回路図の各
部品をプリント板上の表裏面のどこに配置するかを決定
したり、配線レイアウト等を決定するものであり、一般
に、プリント板設計ＣＡＤシステムを利用して行われる
。(Prior Art) The design of a double-sided printed circuit board involves determining where each component of the created circuit diagram will be placed on the front and back sides of the printed circuit board, and determining the wiring layout, etc. This is done using a printed board design CAD system.
したかって、一般に、表面実装部品の実装面は回路設計
時には特定できず、基板設計時に、配置。Therefore, in general, the mounting surface of surface mount components cannot be specified at the time of circuit design, and the placement is determined at the time of board design.
配線作業者によってはじめて決定される。部品の実装面
（表裏）か決定されると、この実装面情報を回路図にフ
ィードバックしたり、部品マウンタに人力したりする必
要がある。It is decided for the first time by the wiring operator. Once the mounting surfaces (front and back) of a component are determined, this mounting surface information must be fed back to the circuit diagram or manually input to the component mounter.
この場合、表裏それぞれに実装される部品間の識別管理
は、例えば、表、裏いずれかで回路記号のナンバリング
にオフセットを設けたり、回路記号および基板シルクを
大文字と小文字に分けたりして行っている。この作業は
、基板設計完了後に、すべて人出作業によって行われて
いる。In this case, identification management between components mounted on the front and back sides is done, for example, by setting an offset in the numbering of circuit symbols on either the front or back side, or by separating circuit symbols and board silk into uppercase and lowercase letters. There is. All of this work is done by people after the board design is completed.
（発明か解決しようとする課題）
上述した従来の技術では、基板設計完了後に、作業者が
回路記号２部品表および部品マウンタ用出力等に実装面
情報を反映する必要があり、作業が複雑化し、情報の自
動的な一元的管理ができないという問題点がある。(Problem to be solved by the invention) In the conventional technology described above, after the board design is completed, the operator needs to reflect the mounting surface information in the circuit symbol 2 parts list and the output for the component mounter, which complicates the work. , there is a problem that automatic and centralized management of information is not possible.
また、基板の設計変更等、レビジョンアップを行う場合
も同様の問題か発生する。A similar problem may also occur when a revision is made, such as when changing the board design.
本発明はこのような従来技術の問題点に鑑みてなされた
ものであり、その目的は、基板設計（設計変更を含む）
において決定された実装面情報を回路図、部品表、マウ
ンタ出力等に自動的に反映することにある。The present invention has been made in view of the problems of the prior art, and its purpose is to improve board design (including design changes).
The objective is to automatically reflect the mounting surface information determined in the circuit diagram, parts list, mounter output, etc.
（課題を解決するための手段）
本発明は回路図データに基づいて両面実装基板の表裏面
における部品配置を決定する、基板設計作業を支援する
基板ＣＡＤ装置であって、前記部品の実装面が決定され
ると、該部品の回路記号に表裏実装の識別子を付加して
実装面情報管理を行うとともに、この実装面情報を前記
回路図データにフィードバックする情報管理手段を有す
ることを特徴とするものである。(Means for Solving the Problems) The present invention is a board CAD device that supports board design work by determining component placement on the front and back sides of a double-sided mounting board based on circuit diagram data, wherein the mounting surface of the component is Once determined, the device is characterized by having an information management means for managing mounting surface information by adding front and back mounting identifiers to the circuit symbol of the component and feeding back this mounting surface information to the circuit diagram data. It is.
（作用）
各回路記号（部品）に表裏実装の識別子を内部処理によ
って付加してデータ管理を行い、最終的な実装面が決定
された後に、その識別子情報を回路図にフィードバック
するとともに、部品マウンタ等に供給し、自動的に一元
的管理を実現する。(Function) Data management is performed by adding front and back mounting identifiers to each circuit symbol (component) through internal processing, and after the final mounting surface is determined, the identifier information is fed back to the circuit diagram, and the component mounter etc., automatically realizing centralized management.
（実施例）
次に、本発明の実施例について図面を参照して説明する
。(Example) Next, an example of the present invention will be described with reference to the drawings.
第１図は本発明の一実施例の構成を示すブロック図であ
る。FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.
本実施例は、回路設計に使用される回路図用端末８と、
この回路図用端末８上に設けられている制御ソフト９と
、作成された回路図データ２０と、基板設計端末１３と
、基板情報管理手段１０と、プリント基板データ３０と
、部品マウンタ１１と、部品表表示手段１２とを有して
おり、回路図用端末８と情報管理手段１０とはバス１４
て接続されている。In this embodiment, a circuit diagram terminal 8 used for circuit design,
Control software 9 provided on this circuit diagram terminal 8, created circuit diagram data 20, board design terminal 13, board information management means 10, printed circuit board data 30, component mounter 11, The circuit diagram terminal 8 and the information management means 10 are connected to a bus 14.
connected.
また、回路図データ２０は、回路部品情報１と、部品属
性２と、グラフィックスデータ３とからなり、プリント
基板データ３０は、部品および実装面情報４と、結線情
報５と、グラフィックスデータ６とからなっている。Further, the circuit diagram data 20 includes circuit component information 1, component attributes 2, and graphics data 3, and the printed circuit board data 30 includes component and mounting surface information 4, connection information 5, and graphics data 6. It consists of
基板設計者は、基板設計端末１３を用いて基板上におけ
る部品の配置や配線情報を決定する。A board designer uses the board design terminal 13 to determine the arrangement of components and wiring information on the board.
情報管理手段ＩＯは、バス１４を介して部品情報を受取
ると、各回路記号（部品）に表実装のときは識別子“Ｔ
”を付加し、裏実装のときは識別子“Ｂ”を付加してデ
ータ管理を行い、基板設計により実装面が決定されると
、この実装面情報を回路図データ２０にフィードバック
する。また、この情報管理手段１０は、マウンタ１１に
実装面情報２位置情報３部品情報を出力し、部品表表示
手段１２に実装面情報１部品情報を出力するようになっ
ている。When the information management means IO receives the component information via the bus 14, it assigns an identifier "T" to each circuit symbol (component) when it is surface mounted.
” is added, and in the case of back mounting, an identifier “B” is added for data management. When the mounting surface is determined by the board design, this mounting surface information is fed back to the circuit diagram data 20. The information management means 10 outputs mounting surface information 2, position information 3, and component information to the mounter 11, and outputs mounting surface information 1 and component information to the parts table display means 12.
次に、本実施例を使用した基板設計処理の一例を説明す
る。Next, an example of board design processing using this embodiment will be described.
通常設計処理
第２図に示すように、回路設計段階で、設計者が実装面
情報も仮決定し、情報管理手段［０に渡す。Normal design process As shown in FIG. 2, at the circuit design stage, the designer also tentatively determines mounting surface information and passes it to the information management means [0.
この情報管理手段１０は、内部処理により実装面識別子
“Ｔ、 Ｂ”を付加してデータ管理を行い、配置決定後
に変更情報のみをハックアノテーションする。This information management means 10 performs data management by adding mounting surface identifiers "T, B" through internal processing, and performs hack annotation only on change information after determining the layout.
設計変更処理
第３図に示すように、設計変更後に従来との差分を抽出
し、この差分のみをハックアノテーションする。これに
より、処理の高速化を図ることができる。また、変更履
歴管理も行うことかできる。Design change process As shown in FIG. 3, after the design change, the difference from the conventional design is extracted, and only this difference is hack-annotated. This makes it possible to speed up the processing. You can also manage change history.
以上の実施例では、プリント基板の設計支援装置につい
て説明したが、本発明はこれに限定されるものではなく
、ハイブリッドＩＣ等の設計支援装置にも応用できる。In the above embodiments, a design support device for printed circuit boards has been described, but the present invention is not limited thereto, and can also be applied to design support devices for hybrid ICs and the like.
（発明の効果）
以上説明したように本発明は、実装面情報を識別子によ
り管理する機能を設けることにより、以下の効果を得る
ことができる。(Effects of the Invention) As explained above, the present invention can obtain the following effects by providing a function of managing mounting surface information using an identifier.
（１）表、裏の実装面情報を一元的に管理できる。(1) Information on the front and back mounting surfaces can be centrally managed.
これにより、回路図データからＣＡＭデータに至る一連
のデータを自動的に処理でき、設計者の負担を減少させ
ることができる。Thereby, a series of data ranging from circuit diagram data to CAM data can be automatically processed, and the burden on the designer can be reduced.
（２）また、実装部品は全て連番記号によりナンバリン
グでき、従来のような特別な表裏の分類か不要となり、
処理効率か向上する。(2) In addition, all mounted components can be numbered using serial numbers, eliminating the need for special front-back classification as in the past.
Improve processing efficiency.
第１図は本発明の基板ＣＡＤ装置の一実施例の構成を示
す図、
第２図は通常処理時の動作の一例を示す図、第３図は変
更処理時の動作の一例を示す図である。
１・・・回路部品情報
２・・・部品属性
３・・・グラフィックスデータ
４・・・部品および実装面情報
５・・・結線情報
６・・・グラフィックスデータ
８・・・回路図用端末
９・・・制御ソフト
ＩＯ・・・情報管理手段
１１・・・マウンタ
Ｉ２・・・部品表表示
１３・基板設計端末FIG. 1 is a diagram showing the configuration of an embodiment of the substrate CAD device of the present invention, FIG. 2 is a diagram showing an example of the operation during normal processing, and FIG. 3 is a diagram showing an example of the operation during change processing. be. 1... Circuit component information 2... Component attributes 3... Graphics data 4... Component and mounting surface information 5... Connection information 6... Graphics data 8... Circuit diagram terminal 9...Control software IO...Information management means 11...Mounter I2...Parts list display 13/Board design terminal
Claims (1)
る部品配置を決定する、基板設計作業を支援する基板Ｃ
ＡＤ装置であって、 前記部品の実装面が決定されると、該部品の回路記号に
表裏実装の識別子を付加して実装面情報管理を行うとと
もに、この実装面情報を前記回路図データにフィードバ
ックする情報管理手段（１０）を有することを特徴とす
る基板ＣＡＤ装置。[Claims] A board C that supports board design work, which determines component placement on the front and back sides of a double-sided mounting board based on circuit diagram data.
When the mounting surface of the component is determined, the AD device manages the mounting surface information by adding front and back mounting identifiers to the circuit symbol of the component, and also feeds back this mounting surface information to the circuit diagram data. A substrate CAD device characterized in that it has an information management means (10).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2210929A JP2942967B2 (en) | 1990-08-09 | 1990-08-09 | Substrate CAD system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2210929A JP2942967B2 (en) | 1990-08-09 | 1990-08-09 | Substrate CAD system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0496180A true JPH0496180A (en) | 1992-03-27 |
| JP2942967B2 JP2942967B2 (en) | 1999-08-30 |
Family
ID=16597418
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2210929A Expired - Fee Related JP2942967B2 (en) | 1990-08-09 | 1990-08-09 | Substrate CAD system |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2942967B2 (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0644329A (en) * | 1992-04-23 | 1994-02-18 | Hitachi Ltd | Automatic drawing design/manufacture information processing system |
| JP2008244199A (en) * | 2007-03-28 | 2008-10-09 | Furukawa Electric Co Ltd:The | Method for manufacturing metal core circuit board |
-
1990
- 1990-08-09 JP JP2210929A patent/JP2942967B2/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0644329A (en) * | 1992-04-23 | 1994-02-18 | Hitachi Ltd | Automatic drawing design/manufacture information processing system |
| JP2008244199A (en) * | 2007-03-28 | 2008-10-09 | Furukawa Electric Co Ltd:The | Method for manufacturing metal core circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2942967B2 (en) | 1999-08-30 |
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|---|---|---|---|
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