JP2008244199A - Method for manufacturing metal core circuit board - Google Patents

Method for manufacturing metal core circuit board Download PDF

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JP2008244199A
JP2008244199A JP2007083511A JP2007083511A JP2008244199A JP 2008244199 A JP2008244199 A JP 2008244199A JP 2007083511 A JP2007083511 A JP 2007083511A JP 2007083511 A JP2007083511 A JP 2007083511A JP 2008244199 A JP2008244199 A JP 2008244199A
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metal core
punch
die
shearing
manufacturing
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JP5006079B2 (en
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Hideki Nakazato
秀樹 中里
Takahiro Imai
高広 今井
Toru Komiyama
徹 小宮山
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Furukawa Electric Co Ltd
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Furukawa Electric Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To eliminate generation of a defective product by disabling generation of short-circuit even if burrs are generated in the process of external shape of a double-sided wiring circuit board on which circuit patterns are formed on both surfaces. <P>SOLUTION: In the method for manufacturing a metal core circuit board, after a material to be processed 41 on which insulating layers 21a, 21a are laminated on both surfaces of a metal core 11 and a circuit pattern 31b is formed on these insulating layers is obtained, the external shape process is conducted to a base material 43 forming a product from the material to be processed 41 by shearing due to relative movement between a die and a punch. Moreover, the external shape process is conducted to the surface, as the die or punch contact surface, where the circuit pattern 31b is not provided at the area near the internal circumference of a virtual shearing line 44 showing a shearing position, among the front and rear surfaces of the part corresponding to the base material 43 in the material to be processed 41. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

この発明は、ダイとポンチによる打ちぬきで外形加工を行うメタルコア基板の製造方法に関し、より詳しくは、両面に回路パターンが形成された両面配線基板に好適なメタルコア基板の製造方法に関する。   The present invention relates to a method for manufacturing a metal core substrate in which outer shape processing is performed by punching with a die and a punch, and more particularly to a method for manufacturing a metal core substrate suitable for a double-sided wiring substrate having circuit patterns formed on both sides.

両面に回路パターンを有するメタルコア基板は、銅やアルミニウムからなるメタルコアの両面に、エポキシ等からなる絶縁層が形成され、これら絶縁層に回路パターンが形成されている。製造工程の概略を説明すると、まずメタルコアの両面に絶縁層を設けるための積層を行う積層工程と、積層された積層板の所定位置にスルーホールなどの穴をあける穴あけ工程と、積層板に所定の回路パターンを形成する回路パターン形成工程と、表面保護や不要部分への半田の付着防止のためのレジスト塗布工程とを有し、これらの工程を経て形成されたボード(被加工材)に対して製品となる基板素材を回路パターンごとに分離する外形加工を行ってメタルコア基板は製造される。   In a metal core substrate having circuit patterns on both sides, insulating layers made of epoxy or the like are formed on both sides of a metal core made of copper or aluminum, and circuit patterns are formed on these insulating layers. The outline of the manufacturing process will be explained. First, a laminating process for laminating to provide insulating layers on both sides of the metal core, a drilling process for drilling holes such as through holes at predetermined positions of the laminated laminate, and a predetermined on the laminate A circuit pattern forming process for forming the circuit pattern and a resist coating process for protecting the surface and preventing the solder from adhering to unnecessary portions, and for a board (workpiece) formed through these processes. Thus, the metal core substrate is manufactured by performing external processing for separating the substrate material to be a product into circuit patterns.

ところが、上記基板素材の分離は、メタルコア基板であるゆえ、プレス金型を用いてせん断により行うが、せん断をするとメタルコアからバリが生じる難点がある。バリは、ダイとポンチによるせん断の最終段階で生じる素材の残材部分で、ダイやポンチの角に当たる側の部分にできる。はなはだしい場合には、メタルコアに積層した絶縁層の表面から突出する長さになることもある。   However, since the substrate material is separated from the metal core substrate by a shear using a press mold, there is a difficulty in generating burrs from the metal core. The burr is the remaining part of the material that occurs in the final stage of shearing by the die and punch, and can be formed on the side that hits the corner of the die or punch. In extreme cases, the length may protrude from the surface of the insulating layer laminated on the metal core.

表面には上述のようにレジストが塗布されているので、レジストが正常に塗布されていれば打ち抜きによるメタルコアのバリがあって、しかもそのバリが表面から飛び出ていたとしても、バリと回路パターンが接触してショートする危険性は少ない。しかし、表面の吸湿や結露により沿面を伝わってのリークが考えられる。また、万が一レジストが所望通り正常に塗布されていなかった場合や、レジストを塗布していないランドにおいては、ショートを起す可能性が考えられる。   Since the resist is applied to the surface as described above, if the resist is applied normally, there is a metal core burr by punching, and even if the burr protrudes from the surface, the burr and circuit pattern are There is little risk of contact and short circuit. However, leakage along the creepage due to surface moisture absorption and condensation is considered. In addition, in the unlikely event that the resist is not normally applied as desired, or in a land where the resist is not applied, there is a possibility of causing a short circuit.

なお、メタルコア基板ではないが、下記特許文献1のようにバリの発生を考慮した技術がある。特許文献1は、リードフレームのダイパッドのサイズよりも半導体チップのサイズの方が大きい半導体集積回路装置において、チップの搭載不良をなくすために、ダイパッドのチップ搭載面を上に向けて上から打ち抜いて、バリがチップ搭載面の裏面側にできるようにし、バリがチップと接触しないようにするというものである。しかし、この技術はショートの発生を考慮したものではない。   In addition, although it is not a metal core board | substrate, there exists a technique in which generation | occurrence | production of the burr | flash was considered like the following patent document 1. FIG. In Patent Document 1, in a semiconductor integrated circuit device in which the size of the semiconductor chip is larger than the size of the die pad of the lead frame, the die pad is punched from above with the chip mounting surface facing upward in order to eliminate chip mounting defects. The burr is formed on the back side of the chip mounting surface, and the burr is prevented from contacting the chip. However, this technique does not consider the occurrence of short circuits.

また、メタルコア基板においては、これまでバリによるショートの可能性は考慮されてこなかった。   Moreover, in the metal core substrate, the possibility of short-circuit due to burrs has not been considered so far.

特開2002−329829号公報JP 2002-329829 A

そこで、この発明は、両面に回路パターンが形成された両面配線基板の外形加工において万が一バリが出たときでも、ショートの発生可能性をなくし、不良品の発生を回避することを主たる課題とする。   Therefore, the main object of the present invention is to eliminate the possibility of occurrence of a short circuit and avoid the occurrence of defective products even if burrs occur in the external processing of a double-sided wiring board having circuit patterns formed on both sides. .

そのための手段は、メタルコアの両面に絶縁層が積層されるとともに、これらの絶縁層には回路パターンが形成された被加工材を得た後、該被加工材から製品となる基材素材をダイとポンチの相対移動によるせん断で打ち抜く外形加工を行うメタルコア基板の製造方法であって、被加工材における基板素材に対応する部位の表裏両面のうち、せん断を行う位置である仮想せん断線の内周側の近傍部位に回路パターンを有しない方の面をダイ又はポンチに当てる当接面として外形加工を行うメタルコア基板の製造方法である。ダイ又はポンチに当てる当接面は、仮想せん断線と回路パターンとの間の距離が最も短い部位がある方の面と反対側の面、あるいは仮想せん断線と回路パターンとの間の距離が長い部位がある割合が高いほうの面に設定するとよい。   For this purpose, insulating layers are laminated on both surfaces of the metal core, and after obtaining a workpiece on which circuit patterns are formed on these insulating layers, a base material to be a product is die-molded from the workpiece. Is a method of manufacturing a metal core substrate that performs punching by shearing by the relative movement of a punch and a punch, and is an inner circumference of a virtual shear line that is a position where shearing is performed on both the front and back surfaces of the part corresponding to the substrate material in the workpiece This is a method for manufacturing a metal core substrate in which outer shape processing is performed using a surface having no circuit pattern in the vicinity of the side as an abutting surface that contacts a die or punch. The contact surface to be applied to the die or punch has a long distance between the surface opposite to the surface having the shortest distance between the virtual shear line and the circuit pattern, or between the virtual shear line and the circuit pattern. It is good to set it to the surface where the ratio with a part is high.

ダイとポンチによるせん断を行うと、ダイに当たる側とポンチに当たる側にメタルコアのバリが発生するが、バリが発生する側の面における仮想せん断線の内周側の近傍には回路パターンがないので、ショートが発生する可能性をなくすことができる。また、バリが発生する部分の近傍には回路パターンがないので、レジスト塗布が適切になされていなかった場合でも同様に、ショートが発生する可能性をなくすことができる。   When shearing with a die and a punch, burrs of the metal core occur on the side that hits the die and the side that hits the punch, but there is no circuit pattern in the vicinity of the inner peripheral side of the virtual shear line on the side where the burr occurs. The possibility of occurrence of a short circuit can be eliminated. Further, since there is no circuit pattern in the vicinity of the portion where burrs are generated, the possibility of occurrence of a short circuit can be eliminated even when the resist coating is not properly performed.

以上のように、この発明によれば、バリが発生したとしても、そのバリの近傍には回路パターンが存在しないので、ショートの危険性をなくすことができる。このため、製造の最終段階において、不測に不良品の発生を招来してしまうことはなく、良質で質も安定した製品を提供することができる。   As described above, according to the present invention, even if burrs are generated, there is no circuit pattern in the vicinity of the burrs, so the risk of short circuit can be eliminated. For this reason, in the final stage of manufacture, the occurrence of a defective product is not inadvertently caused, and a product with high quality and stable quality can be provided.

メタルコア基板における外形加工でのメタルコアのバリの突出によるショートの発生可能性をなくし、不良品の発生を回避するという目的を、打ち抜きと回路パターンについての構成で実現した。   The purpose of eliminating the possibility of short-circuiting due to metal core burr protrusion in the outer shape processing of the metal core substrate and avoiding the occurrence of defective products has been realized with the configuration of punching and circuit pattern.

この発明の一実施例を、以下図面を用いて説明する。
図1は、メタルコア基板の製造工程における外形加工前の工程を示す断面図である。図1(a)〜(j)にしたがって概略を説明してから、外形加工について説明する。
An embodiment of the present invention will be described below with reference to the drawings.
FIG. 1 is a cross-sectional view showing a process before external processing in a manufacturing process of a metal core substrate. The outline processing will be described after the outline will be described with reference to FIGS.

メタルコア11の材料としては、銅やアルミニウムからなる矩形の金属板(以下、「基材12」という。)が用いられる(a)。   As a material of the metal core 11, a rectangular metal plate made of copper or aluminum (hereinafter referred to as “base material 12”) is used (a).

この基材12に対して機械的に穴13を開け(図2参照)、水洗などの脱脂処理、続いて、表面を粗くする粗化加工を施すことで、メタルコア11が得られる(b)。   The metal core 11 is obtained by mechanically making holes 13 in the base material 12 (see FIG. 2), and performing a degreasing process such as washing with water, followed by roughening to roughen the surface (b).

次に、メタルコア11の両面に、樹脂シート21(たとえばFR−4のようなプリプレグ)と電解銅箔22を配置する。樹脂シート21がメタルコア11側で、電解銅箔22が表面側である(c)。   Next, the resin sheet 21 (for example, prepreg like FR-4) and the electrolytic copper foil 22 are disposed on both surfaces of the metal core 11. The resin sheet 21 is on the metal core 11 side, and the electrolytic copper foil 22 is on the front side (c).

そして、この状態で、熱を加えるとともに真空引きをしながらプレスして、メタルコア11の穴13内に樹脂シート21の溶けた樹脂を注入充填させる。樹脂が固化するとメタルコア11の両面に絶縁層21aが形成された1枚の積層板31となる(d)。   In this state, heat is applied and pressing is performed while evacuating, and the resin in which the resin sheet 21 is melted is injected and filled into the holes 13 of the metal core 11. When the resin is solidified, it becomes a single laminated plate 31 in which insulating layers 21a are formed on both surfaces of the metal core 11 (d).

この後、積層板31の樹脂充填部位に、メタルコア11の穴13よりも小径で厚み方向に貫通するスルーホール31aを開ける(e)。   Thereafter, a through hole 31a having a smaller diameter than the hole 13 of the metal core 11 and penetrating in the thickness direction is opened in the resin filling portion of the laminated plate 31 (e).

つづいて、表面に位置する電解銅箔22の上に銅メッキ層32を形成する。この銅メッキ層32と電解銅箔22とよりなる層が回路パタンーン31bである(f)。   Subsequently, a copper plating layer 32 is formed on the electrolytic copper foil 22 located on the surface. A layer formed of the copper plating layer 32 and the electrolytic copper foil 22 is a circuit pattern 31b (f).

この回路パターン31bの上の所定部位にはマスク33をかけ(g)、マスク33のかかってない部分の回路パターン31bを除去する(h)。   A predetermined portion on the circuit pattern 31b is covered with a mask 33 (g), and a portion of the circuit pattern 31b not covered with the mask 33 is removed (h).

このあと、上記のマスク33を除去し(i)、表面の所定部位に、内部保護のためのソルダーレジスト34を形成する(j)。   Thereafter, the mask 33 is removed (i), and a solder resist 34 for internal protection is formed at a predetermined portion of the surface (j).

つづいて、図3に示したように外形加工を行う。すなわち、図1(a)〜(j)のようにして得られた被加工材41から不要な部分42を切り捨てるべく回路パターン31bごとに打ち抜いて基板素材43を得る。図2、図3中の仮想線が、打ち抜きを行う位置である仮想せん断線44である。そして最後に、適宜、プリフラックスやはんだレベラーなどのコーティングをかけ、基板素材43をメタルコア基板として完成させる。   Subsequently, the outer shape is processed as shown in FIG. That is, the substrate material 43 is obtained by punching each circuit pattern 31b so as to cut off the unnecessary portion 42 from the workpiece 41 obtained as shown in FIGS. A virtual line in FIGS. 2 and 3 is a virtual shear line 44 that is a position where punching is performed. Finally, a coating such as a preflux or a solder leveler is appropriately applied to complete the substrate material 43 as a metal core substrate.

外形加工は、図4に示したようなプレス金型51を用いて行う。
プレス金型51は、ロアプレート52上に固定されたポンチ53と、被加工材41を挟んでポンチ53の上方に配されるストリッパ54と、該ストリッパ54の横でストリッパ54に沿って上下動するダイ55と、被加工材41を挟んでダイ55の下方に配されるストリッパ56とを有する。被加工材41におけるポンチ53とストリッパ54に挟まれる範囲内には回路パターン層31bが存在するので、ポンチ53とストッパ54には逃げのための空間53a,54aが設けられている。
The external shape processing is performed using a press die 51 as shown in FIG.
The press die 51 is moved up and down along the stripper 54 beside the stripper 54, a punch 53 fixed on the lower plate 52, a stripper 54 disposed above the punch 53 across the workpiece 41. And a stripper 56 disposed below the die 55 with the workpiece 41 interposed therebetween. Since the circuit pattern layer 31b exists within a range between the punch 53 and the stripper 54 in the workpiece 41, the punch 53 and the stopper 54 are provided with spaces 53a and 54a for escape.

このようなプレス金型51では、ポンチ53の上に被加工材41を置いてストリッパ54で挟み、ストリッパ54の横に位置するダイ55を押下すると、被加工材41の打ち抜きができる。このとき、ポンチ53とダイ55との間には、プレス金型の保護と適切なせん断のために、図5に示したように隙間(外形加工隙間c)が必要である。   In such a press die 51, the workpiece 41 can be punched by placing the workpiece 41 on the punch 53, sandwiching the workpiece 41 with the stripper 54, and pressing down the die 55 positioned beside the stripper 54. At this time, between the punch 53 and the die 55, a gap (external shape processing gap c) is required as shown in FIG. 5 in order to protect the press die and appropriately shear.

打ち抜きに際しては、まず、外形加工隙間cを設定する。
この外形加工隙間cは、メタルコア11のバリ11a(図5中の仮想線参照)の発生を抑制するように設定されるが、バリ11aのほか、「だれ」11b(図5中の仮想線参照)の発生も抑制するのが好ましい。「だれ」11bは、ダイ55とポンチ53で挟まれて押し潰された時に生じるもので、メタルコア11におけるダイ55やポンチ53と反対側の面の角部分が湾曲したり傾いたりする変形で生じる。「だれ」11bが発生した部分は、絶縁層21aと剥離した部分であり、「だれ」11bも大きくなるとデラミネーション(層間剥離)を招来するおそれが考えられるからである。なお、図5中に仮想線で示した11cはせん断面で、11dは破断面である。
At the time of punching, first, the outer shape machining gap c is set.
The outer shape processing gap c is set so as to suppress the occurrence of burrs 11a (see the phantom line in FIG. 5) of the metal core 11, but in addition to the burrs 11a, “done” 11b (see the phantom line in FIG. 5). ) Is also preferably suppressed. The “sag” 11b is generated when the die 55 and the punch 53 are sandwiched and crushed, and the corner portion of the surface of the metal core 11 opposite to the die 55 or the punch 53 is curved or inclined. . This is because the portion where the “sag” 11b is generated is a portion separated from the insulating layer 21a, and if the “sag” 11b increases, delamination (delamination) may occur. In addition, 11c shown by the virtual line in FIG. 5 is a shear surface, 11d is a torn surface.

バリ11aと「だれ」11bの双方の発生を抑制する外形加工隙間cは、メタルコア11の材質及び厚さに基づいて定められる適正隙間よりも小さく、絶縁層21aの材質及び厚さに基づいて定められる適正隙間よりも大きい値に設定する。   The external processing gap c that suppresses the generation of both the burr 11a and the “sag” 11b is smaller than the appropriate gap determined based on the material and thickness of the metal core 11, and is determined based on the material and thickness of the insulating layer 21a. Set to a value larger than the appropriate clearance.

上記の各適正隙間は、加工後の端面が比較的きれいになる理想的なせん断を可能とする隙間であって、材質と厚さに基づいて周知の方法でおおよその値が見出せる。そしてこれらの値から、メタルコア11の適正隙間の値より小さく絶縁層21aの適正隙間の値よりも大きい範囲内で、メタルコア11のバリ11aと「だれ」11bを許容し得る大きさに抑制する上記の外形加工隙間cが設定される。   Each of the above-mentioned proper gaps is a gap that enables ideal shearing so that the end face after processing is relatively clean, and an approximate value can be found by a known method based on the material and thickness. From these values, the burr 11a and the “sag” 11b of the metal core 11 are suppressed to an allowable size within a range that is smaller than the appropriate gap value of the metal core 11 and larger than the appropriate gap value of the insulating layer 21a. Is set.

設定にあたっては、メタルコア11および絶縁層21aの材質と厚さの違いの程度を考慮する。   In setting, the degree of difference in material and thickness of the metal core 11 and the insulating layer 21a is taken into consideration.

具体的には、外形加工隙間cの値は、メタルコア11の材質及び厚さに基づいて定められた適正隙間と絶縁層21aの材質及び厚さに基づいて定められた適正隙間との中間値に、メタルコア11の材質及び/又は厚さと、絶縁層21aの材質及び/又は厚さに基づく修正を加えて得ることができる。修正は、たとえば絶縁層21aの厚さが厚ければ中間値よりも小さくし、薄ければ中間値よりも大きくするように行う。これは、せん断時に絶縁層21aに掛けたせん断力が、メタルコア11においても同位置で作用するのではなく、絶縁層21aとメタルコア11との間、特に界面部分を中心に、硬度の違いにより屈折に似たような現象が起こり、ダイ55及びポンチ53からかかったそれぞれのせん断力が離間する方向にずれを生じるからであると思われる。絶縁層21aが厚いほど、また絶縁層21aの材質が柔らかいほど、ずれは大きくなる。   Specifically, the value of the external processing clearance c is an intermediate value between the appropriate clearance determined based on the material and thickness of the metal core 11 and the appropriate clearance determined based on the material and thickness of the insulating layer 21a. It can be obtained by making corrections based on the material and / or thickness of the metal core 11 and the material and / or thickness of the insulating layer 21a. The correction is performed, for example, so that the insulating layer 21a is smaller than the intermediate value if the thickness is large, and is larger than the intermediate value if the thickness is small. This is because the shearing force applied to the insulating layer 21a at the time of shearing does not act on the metal core 11 at the same position, but is refracted by the difference in hardness between the insulating layer 21a and the metal core 11, particularly at the interface portion. It seems that this is because a phenomenon similar to the above occurs, and the shearing force applied from the die 55 and the punch 53 is shifted in the separating direction. The thicker the insulating layer 21a and the softer the material of the insulating layer 21a, the greater the deviation.

このような観点から、0.4mm厚の銅板をメタルコアとして、両面に0.2mm厚の樹脂(FR−4(耐燃性ガラス基材エポキシ樹脂積層板))からなる絶縁層21aが形成された被加工材41について、0.03mm以上で0.08mmより小さい外形加工隙間cを得た。特に、以下の理由から0.05mmの外形加工隙間cを得た。   From such a point of view, a 0.4 mm thick copper plate is used as a metal core, and an insulating layer 21a made of 0.2 mm thick resin (FR-4 (flame resistant glass base epoxy resin laminate)) is formed on both sides. About the processed material 41, the outer shape clearance c was 0.03 mm or more and smaller than 0.08 mm. In particular, an outer shape processing gap c of 0.05 mm was obtained for the following reason.

すなわち、メタルコア11の材質及び厚さに基づいて定められる適正隙間は、0.08mmであり、絶縁層21aの材質及び厚さに基づいて定められる適正隙間は、0.01mmである。したがって、これらの中間値は0.045mmであるが、両面の各絶縁層21a,21aの厚さとメタルコア11の厚さとの比(絶縁層厚/メタルコア厚)は1対2である。つまり、合せるとメタルコア11の厚さと同一になる2つの絶縁層21a,21aが形成されていることになる。しかし、上記の通り各絶縁層21aの厚さはメタルコアの半分の0.2mmであり、またエポキシ製の絶縁層21aの硬度は比較的高いので、絶縁層21aを比較的薄いものとみなして、中間値の0.045mmを上方修正し、0.05mmとした。   That is, the appropriate gap determined based on the material and thickness of the metal core 11 is 0.08 mm, and the appropriate gap determined based on the material and thickness of the insulating layer 21a is 0.01 mm. Therefore, although the intermediate value of these is 0.045 mm, the ratio (insulating layer thickness / metal core thickness) between the thicknesses of the insulating layers 21a and 21a on both sides and the thickness of the metal core 11 is 1: 2. That is, two insulating layers 21a and 21a having the same thickness as the metal core 11 are formed. However, as described above, the thickness of each insulating layer 21a is 0.2 mm, which is half of the metal core, and since the hardness of the insulating layer 21a made of epoxy is relatively high, the insulating layer 21a is considered to be relatively thin, The intermediate value of 0.045 mm was corrected upward to 0.05 mm.

この0.05mmはメタルコアの厚さ0.4mmに対して12.5%であり、絶縁層の厚さ0.2mmに対しては25%である。材質が同じで厚さが異なる場合には、各部の厚さから上記の割合を用いて外形加工隙間cを得ることができる。   This 0.05 mm is 12.5% for a metal core thickness of 0.4 mm, and 25% for an insulating layer thickness of 0.2 mm. In the case where the materials are the same and the thicknesses are different, the outer shape processing gap c can be obtained from the thicknesses of the respective parts using the above ratio.

このようにして外形加工隙間cを設定した後、被加工材41の表裏を確認した上で、プレス金型51による打ち抜きを行う。すなわち、被加工材41における基板素材43に対する部位の表裏両面のうち、せん断を行う位置である仮想せん断線44の内周側の近傍部位に回路パターン31b(図6参照)を有しない方の面をポンチ53に当てる当接面43aとして外形加工を行う。図5に示したプレス金型51では、打ち抜かれる基板素材43に対応する部分をポンチ53に当てるようにした装置であるので、当接面43aをポンチ53に当てるようにしたが、基板素材43に対応する部分をダイ55に当てるようにした装置では、当接面43aをダイ55に当てて打ち抜きを行う。   After setting the outer shape machining gap c in this manner, the front and back of the workpiece 41 are confirmed, and then punching with the press die 51 is performed. That is, the surface that does not have the circuit pattern 31b (see FIG. 6) in the vicinity of the inner peripheral side of the virtual shear line 44, which is the position to perform shearing, of the front and back surfaces of the portion of the workpiece 41 with respect to the substrate material 43. Is processed as an abutment surface 43 a that hits the punch 53. The press mold 51 shown in FIG. 5 is an apparatus in which the portion corresponding to the substrate material 43 to be punched is applied to the punch 53, so that the contact surface 43 a is applied to the punch 53. In the apparatus in which the portion corresponding to is applied to the die 55, the contact surface 43a is applied to the die 55 to perform punching.

「仮想せん断線44の内周側の近傍部位に回路パターン31bを有しない」とは、図6に示したように、仮想せん断線44の内周側に回路パターン31bのない部分を長く、広く取れることを意味しており、図6の例では、裏面(下面)の方が表面(上面)の場合よりも仮想せん断線44と回路パターン31bの端との長さを長くとることができる(L1>L2)。このため、裏面をポンチ53に当てる当接面43aとして外形加工を行う。   “There is no circuit pattern 31b in the vicinity of the inner peripheral side of the virtual shear line 44” means that the portion without the circuit pattern 31b is longer and wider on the inner peripheral side of the virtual shear line 44 as shown in FIG. In the example of FIG. 6, the length of the virtual shear line 44 and the end of the circuit pattern 31 b can be made longer than the case where the back surface (lower surface) is the front surface (upper surface) ( L1> L2). For this reason, the outer shape is processed as the contact surface 43 a that contacts the back surface with the punch 53.

回路パターン31bの形状によっては、仮想せん断線44と回路パターン31bとの間の距離が最も短い部位がある方の面と反対側の面を当接面43aとしたり、仮想せん断線44と回路パターン31bとの間の距離が長い部位がある割合が高い方の面を当接面43aとしたりするとよい。換言すれば、メタルコア11にバリ11aができたとしても、ショートが起こる可能性がより低くなるようにすべく外形加工時の表裏を設定する。   Depending on the shape of the circuit pattern 31b, the surface opposite to the surface having the shortest distance between the virtual shear line 44 and the circuit pattern 31b may be the contact surface 43a, or the virtual shear line 44 and the circuit pattern A surface having a higher ratio of a portion having a long distance to 31b may be used as the contact surface 43a. In other words, even if the burr 11a is formed on the metal core 11, the front and back during the outer shape processing are set so as to reduce the possibility of a short circuit.

また、形成される被加工材41の表裏のいずれかの面を外形加工時にダイ55又はポンチ53に当てる当接面43aに設定した上で、仮想せん断線44の内周側の近傍部位に当該回路パターン31bが存在しないように設計した上記回路パターン31bを形成するのが望ましい。   In addition, after setting one of the front and back surfaces of the workpiece 41 to be formed as a contact surface 43a that contacts the die 55 or the punch 53 during the outer shape processing, It is desirable to form the circuit pattern 31b designed so that the circuit pattern 31b does not exist.

上記のようにして設定される表裏は、外形加工前の被加工材41に対して予め付された表裏識別子45(図2参照)によって識別される。   The front and back set as described above are identified by a front and back identifier 45 (see FIG. 2) attached in advance to the workpiece 41 before the outer shape processing.

表裏識別子45は、穴あけ工程においてメタルコア11における不要な部分42に対応する部位に形成した穴の存在やその配置等で図2に示したように構成したりするも、図示はしないがレジストの塗布工程においてのレジストを塗布しない非塗布部の存在やその形状等で構成したりするもよい。その他、識別力がある構成であるものであれば適宜に様々な構成を採用し得る。   The front / back identifier 45 may be configured as shown in FIG. 2 by the presence or arrangement of holes formed in the portion corresponding to the unnecessary portion 42 in the metal core 11 in the drilling step. It may be configured by the presence or shape of a non-application portion where no resist is applied in the process. In addition, various configurations can be appropriately employed as long as the configuration has discriminating power.

このように被加工材41の表裏を設定してからプレス金型51のダイ55とポンチ53によるせん断を行うと、基板素材43のポンチ53に当たる側にメタルコア11のバリ11aが発生する(図5の仮想線参照)。しかし、バリ11aが発生する側の面における仮想せん断線44の内周側の近傍には図6に示したように回路パターン31bがないので、換言すれば回路パターン31bをできるだけ遠ざけていて距離を長く取っているので、ショートが発生する可能性をなくすことができる。また、回路パターン31bが近傍にないので、レジスト塗布が万が一適切になされていなかった場合でも同様に、ショートが発生する可能性をなくすことができる。   When the front and back surfaces of the workpiece 41 are set in this way and then sheared by the die 55 and the punch 53 of the press die 51, the burr 11a of the metal core 11 is generated on the side of the substrate material 43 that contacts the punch 53 (FIG. 5). Virtual line reference). However, since there is no circuit pattern 31b near the inner peripheral side of the virtual shear line 44 on the surface where the burr 11a is generated, as shown in FIG. 6, in other words, the circuit pattern 31b is kept as far away as possible. Since it takes long, the possibility that a short circuit occurs can be eliminated. Further, since the circuit pattern 31b is not in the vicinity, the possibility of occurrence of a short circuit can be eliminated even if the resist is not properly applied.

この効果は、外形加工隙間cを適正に設定してバリ11aの発生を抑えたので、一層高められる。   This effect is further enhanced because the outer shape processing gap c is set appropriately to suppress the generation of the burr 11a.

このようにしてショートの発生の危険性をなくせるので、製造の最終段階において、不測に不良品の発生を将来してしまうことはなく、良質で質も安定した製品を提供することができる。しかも、上記の外形加工隙間cによりバリ11aのほかに、「だれ」11bの発生も抑制できるので、この点からも良質の製品を安定して得ることができるようになる。   In this way, since the risk of occurrence of a short circuit can be eliminated, it is possible to provide a product with high quality and stable quality without unexpected occurrence of defective products in the final stage of production. In addition to the burrs 11a, the occurrence of “sag” 11b can be suppressed by the above-described outer shape processing gap c, so that a high-quality product can be stably obtained from this point.

上述の構成はこの発明の一実施例であり、この発明は上述の構成のみに限定されるものではなく、その他の形態を採用することもできる。   The above-described configuration is one embodiment of the present invention, and the present invention is not limited to the above-described configuration, and other forms can be adopted.

メタルコア基板の製造工程における外形加工前を示す断面図。Sectional drawing which shows before the external shape process in the manufacturing process of a metal core board | substrate. メタルコアの平面図。The top view of a metal core. 外形加工の説明図。Explanatory drawing of external shape processing. プレス金型の断面図。Sectional drawing of a press die. 外形加工の動作を示す断面図。Sectional drawing which shows operation | movement of external shape processing. 被加工材の断面図。Sectional drawing of a workpiece.

符号の説明Explanation of symbols

11…メタルコア
21a…絶縁層
31b…回路パターン
41…被加工材
43…基板素材
43a…当接面
44…仮想せん断線
45…表裏識別子
53…ポンチ
55…ダイ
DESCRIPTION OF SYMBOLS 11 ... Metal core 21a ... Insulating layer 31b ... Circuit pattern 41 ... Work material 43 ... Substrate material 43a ... Contact surface 44 ... Virtual shear line 45 ... Front / back identifier 53 ... Punch 55 ... Die

Claims (5)

メタルコアの両面に絶縁層が積層されるとともに、これらの絶縁層には回路パターンが形成された被加工材を得た後、該被加工材から製品となる基材素材をダイとポンチの相対移動によるせん断で打ち抜く外形加工を行うメタルコア基板の製造方法であって、
被加工材における基板素材に対応する部位の表裏両面のうち、せん断を行う位置である仮想せん断線の内周側の近傍部位に回路パターンを有しない方の面をダイ又はポンチに当てる当接面として外形加工を行う
メタルコア基板の製造方法。
Insulating layers are laminated on both sides of the metal core, and after obtaining workpieces with circuit patterns formed on these insulating layers, the base material that is the product from the workpieces is moved relative to the die and punch. A method of manufacturing a metal core substrate that performs outer shape punching by shearing with,
Of the front and back surfaces of the part corresponding to the substrate material in the work material, the contact surface that hits the die or punch with the surface that does not have the circuit pattern in the vicinity of the inner peripheral side of the virtual shear line that is the position to perform shearing As a manufacturing method of a metal core substrate that performs external processing.
メタルコアの両面に絶縁層が積層されるとともに、これらの絶縁層には回路パターンが形成された被加工材を得た後、該被加工材から製品となる基材素材をダイとポンチの相対移動によるせん断で打ち抜く外形加工を行うメタルコア基板の製造方法であって、
被加工材における基板素材に対応する部位の表裏両面のうち、せん断を行う位置である仮想せん断線と回路パターンとの間の距離が最も短い部位がある方の面と反対側の面をダイ又はポンチに当てる当接面として外形加工を行う
メタルコア基板の製造方法。
Insulating layers are laminated on both sides of the metal core, and after obtaining workpieces with circuit patterns formed on these insulating layers, the base material that is the product from the workpieces is moved relative to the die and punch. A method of manufacturing a metal core substrate that performs outer shape punching by shearing with,
Of the front and back surfaces of the part corresponding to the substrate material in the workpiece, the surface on the opposite side to the surface having the part with the shortest distance between the virtual shear line that is the position to perform shearing and the circuit pattern is die or A method for manufacturing a metal core substrate, in which an outer shape is processed as an abutting surface to be applied to a punch.
メタルコアの両面に絶縁層が積層されるとともに、これらの絶縁層には回路パターンが形成された被加工材を得た後、該被加工材から製品となる基材素材をダイとポンチの相対移動によるせん断で打ち抜く外形加工を行うメタルコア基板の製造方法であって、
被加工材における基板素材に対応する部位の表裏両面のうち、せん断を行う位置である仮想せん断線と回路パターンとの間の距離が長い部位がある割合が高い方の面をダイ又はポンチに当てる当接面として外形加工を行う
メタルコア基板の製造方法。
Insulating layers are laminated on both sides of the metal core, and after obtaining workpieces with circuit patterns formed on these insulating layers, the base material that is the product from the workpieces is moved relative to the die and punch. A method of manufacturing a metal core substrate that performs outer shape punching by shearing with,
Of the front and back surfaces of the part corresponding to the substrate material in the work material, the surface with the higher ratio of the part where the distance between the virtual shear line, which is the shearing position, and the circuit pattern is long is applied to the die or punch. A method of manufacturing a metal core substrate that performs external processing as a contact surface.
メタルコアの両面に絶縁層が積層されるとともに、これらの絶縁層には回路パターンが形成された被加工材を得た後、該被加工材から製品となる基材素材をダイとポンチの相対移動によるせん断で打ち抜く外形加工を行うメタルコア基板の製造方法であって、
被加工材における表裏いずれかの面を、外形加工時にダイ又はポンチに当てる当接面に設定した上で、せん断を行う位置である仮想せん断線の内周側の近傍部位に当該回路パターンが存在しないように設計した上記回路パターンを形成し、
上記当接面をダイ又はポンチに当てて外形加工を行う
メタルコア基板の製造方法。
Insulating layers are laminated on both sides of the metal core, and after obtaining workpieces with circuit patterns formed on these insulating layers, the base material that is the product from the workpieces is moved relative to the die and punch. A method of manufacturing a metal core substrate that performs outer shape punching by shearing with,
The circuit pattern exists in the vicinity of the inner circumference side of the virtual shear line, which is the position to perform shearing, after setting either the front or back surface of the workpiece to the contact surface that contacts the die or punch during external processing Form the above circuit pattern designed not to
A method of manufacturing a metal core substrate in which the contact surface is applied to a die or a punch to perform external processing.
前記回路パターンと仮想せん断線との位置関係に基づいて定められる外形加工時の表裏を識別する表裏識別子を、外形加工前の被加工材に対して予め付しておく
請求項1から請求項3のうちのいずれか一項に記載のメタルコア基板の製造方法。
The front-and-back identifier which identifies the front and back at the time of the external shape process defined based on the positional relationship of the said circuit pattern and a virtual shear line is previously attached | subjected with respect to the workpiece before an external shape process. The manufacturing method of the metal core board | substrate as described in any one of these.
JP2007083511A 2007-03-28 2007-03-28 Metal core substrate manufacturing method Active JP5006079B2 (en)

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0471285A (en) * 1990-07-12 1992-03-05 Nippon Avionics Co Ltd Metal core printed-wiring board and profiling method thereof
JPH0496180A (en) * 1990-08-09 1992-03-27 Yokogawa Electric Corp Substrate cad device
JPH11284335A (en) * 1998-03-30 1999-10-15 Denki Kagaku Kogyo Kk Metal-based circuit board and manufacture thereof
JP2000012987A (en) * 1998-06-26 2000-01-14 Sanyo Electric Co Ltd Circuit pattern for insulation metal substrate
JP2002120195A (en) * 2000-10-13 2002-04-23 Hitachi Ltd Method of machining laminated board

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0471285A (en) * 1990-07-12 1992-03-05 Nippon Avionics Co Ltd Metal core printed-wiring board and profiling method thereof
JPH0496180A (en) * 1990-08-09 1992-03-27 Yokogawa Electric Corp Substrate cad device
JPH11284335A (en) * 1998-03-30 1999-10-15 Denki Kagaku Kogyo Kk Metal-based circuit board and manufacture thereof
JP2000012987A (en) * 1998-06-26 2000-01-14 Sanyo Electric Co Ltd Circuit pattern for insulation metal substrate
JP2002120195A (en) * 2000-10-13 2002-04-23 Hitachi Ltd Method of machining laminated board

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