JPH0482859U - - Google Patents
Info
- Publication number
- JPH0482859U JPH0482859U JP12516390U JP12516390U JPH0482859U JP H0482859 U JPH0482859 U JP H0482859U JP 12516390 U JP12516390 U JP 12516390U JP 12516390 U JP12516390 U JP 12516390U JP H0482859 U JPH0482859 U JP H0482859U
- Authority
- JP
- Japan
- Prior art keywords
- external lead
- semiconductor device
- terminal
- composite semiconductor
- conductor layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 6
- 239000002131 composite material Substances 0.000 claims description 5
- 239000004020 conductor Substances 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 2
- 239000002184 metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
Description
第１図は、本考案の実施例を示す複合半導体装
置の一部を示す斜視図、第２図ａ，ｂおよびｃは
、それぞれ上記複合半導体装置に使用する中継端
子の斜視図、第３図は従来の複合半導体装置の一
部を示す斜視図である。
１……基板、２……金属板、３……絶縁層、４
……導体層、５……半導体チツプ、７……ボンデ
イングワイヤ、６１……板状の外部導出端子、６
２……箱型の中継端子。
FIG. 1 is a perspective view showing a part of a composite semiconductor device showing an embodiment of the present invention, FIGS. 2a, b, and c are perspective views of a relay terminal used in the composite semiconductor device, and FIG. 3 1 is a perspective view showing a part of a conventional composite semiconductor device. 1...Substrate, 2...Metal plate, 3...Insulating layer, 4
... Conductor layer, 5 ... Semiconductor chip, 7 ... Bonding wire, 61 ... Plate-shaped external lead-out terminal, 6
2...Box-shaped relay terminal.
Claims (1)
端子が半田固着される複合半導体装置において、
前記導体層と外部導出端子との間に、該外部導出
端子の下端が収納固着される相対的に高さの低い
箱型の中継端子を介在させたことを特徴とする複
合半導体装置。 In a composite semiconductor device in which a plate-shaped external lead terminal is soldered onto a conductor layer formed on a substrate,
A composite semiconductor device characterized in that a relatively low-height box-shaped relay terminal is interposed between the conductor layer and the external lead-out terminal, and the lower end of the external lead-out terminal is housed and fixed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12516390U JPH0482859U (en) | 1990-11-29 | 1990-11-29 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP12516390U JPH0482859U (en) | 1990-11-29 | 1990-11-29 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0482859U true JPH0482859U (en) | 1992-07-20 |
Family
ID=31872778
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP12516390U Pending JPH0482859U (en) | 1990-11-29 | 1990-11-29 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0482859U (en) |
-
1990
- 1990-11-29 JP JP12516390U patent/JPH0482859U/ja active Pending