JPS6429846U - - Google Patents
Info
- Publication number
- JPS6429846U JPS6429846U JP12426687U JP12426687U JPS6429846U JP S6429846 U JPS6429846 U JP S6429846U JP 12426687 U JP12426687 U JP 12426687U JP 12426687 U JP12426687 U JP 12426687U JP S6429846 U JPS6429846 U JP S6429846U
- Authority
- JP
- Japan
- Prior art keywords
- pellet
- semiconductor
- metal substrate
- aluminum electrode
- lead terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000008188 pellet Substances 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 4
- 239000002184 metal Substances 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims description 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 claims 1
- 229910000679 solder Inorganic materials 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
Landscapes
- Wire Bonding (AREA)
Description
第1図は本考案の一実施例に係る半導体装置の
断面図、第2図は従来の半導体装置でaは上面図
、bは断面図、第3図は本考案の半導体装置に用
いられるトランジスタペレツトで、aは上面図、
bは等価回路を示す。
11……金属基板、12……半導体ペレツト、
15……アルミワイヤ、16……半田、17……
外部引出し端子板。
FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a conventional semiconductor device, a is a top view, b is a sectional view, and FIG. 3 is a transistor used in the semiconductor device of the present invention. pellet, a is top view,
b shows an equivalent circuit. 11...Metal substrate, 12...Semiconductor pellet,
15... Aluminum wire, 16... Solder, 17...
External drawer terminal board.
Claims (1)
このペレツトのアルミ電極から引き出されたリー
ドワイヤが金属基板上で絶縁板を介して固着され
る外部引出し端子板に接続されてなるものにおい
て、前記半導体ペレツトのアルミ電極の一部に金
属層を積層し、この積層部に外部引出し端子をろ
う付けすることを特徴とする半導体装置。 Equipped with semiconductor pellets fixed to a metal substrate,
A lead wire drawn out from the aluminum electrode of this pellet is connected to an external lead terminal board fixed on a metal substrate via an insulating plate, in which a metal layer is laminated on a part of the aluminum electrode of the semiconductor pellet. A semiconductor device characterized in that an external lead terminal is brazed to this laminated portion.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12426687U JPS6429846U (en) | 1987-08-13 | 1987-08-13 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP12426687U JPS6429846U (en) | 1987-08-13 | 1987-08-13 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS6429846U true JPS6429846U (en) | 1989-02-22 |
Family
ID=31373850
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP12426687U Pending JPS6429846U (en) | 1987-08-13 | 1987-08-13 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6429846U (en) |
-
1987
- 1987-08-13 JP JP12426687U patent/JPS6429846U/ja active Pending
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