JPH0470784B2 - - Google Patents

Info

Publication number
JPH0470784B2
JPH0470784B2 JP58221603A JP22160383A JPH0470784B2 JP H0470784 B2 JPH0470784 B2 JP H0470784B2 JP 58221603 A JP58221603 A JP 58221603A JP 22160383 A JP22160383 A JP 22160383A JP H0470784 B2 JPH0470784 B2 JP H0470784B2
Authority
JP
Japan
Prior art keywords
gate array
type
master slice
gates
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58221603A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60113946A (ja
Inventor
Sadaji Tasai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Electric Co Ltd filed Critical Nippon Electric Co Ltd
Priority to JP58221603A priority Critical patent/JPS60113946A/ja
Publication of JPS60113946A publication Critical patent/JPS60113946A/ja
Publication of JPH0470784B2 publication Critical patent/JPH0470784B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits
    • H10D84/901—Masterslice integrated circuits comprising bipolar technology

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP58221603A 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ Granted JPS60113946A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58221603A JPS60113946A (ja) 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58221603A JPS60113946A (ja) 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ

Publications (2)

Publication Number Publication Date
JPS60113946A JPS60113946A (ja) 1985-06-20
JPH0470784B2 true JPH0470784B2 (enExample) 1992-11-11

Family

ID=16769342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58221603A Granted JPS60113946A (ja) 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ

Country Status (1)

Country Link
JP (1) JPS60113946A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62113463A (ja) * 1985-11-12 1987-05-25 Nec Corp モノリシツク集積回路
JPH02216864A (ja) * 1989-02-17 1990-08-29 Nec Ic Microcomput Syst Ltd 半導体集積回路装置

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850768A (ja) * 1981-09-21 1983-03-25 Matsushita Electronics Corp 半導体集積回路装置

Also Published As

Publication number Publication date
JPS60113946A (ja) 1985-06-20

Similar Documents

Publication Publication Date Title
EP0342131A3 (en) Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit
EP0074825B1 (en) Manufacture of integrated circuits by masterslice methods
US5986292A (en) Semiconductor integrated logic circuit device
JPH0470784B2 (enExample)
KR900003029B1 (ko) 칩을 갖는 집적회로 장치
US6335640B1 (en) Semiconductor integrated circuit device with its layout designed by the cell base method
US5506428A (en) Gate array LSI
JPH0630377B2 (ja) 半導体集積回路装置
EP0347332B1 (en) Method of forming semiconductor integrated circuit using master slice approach
US6400182B2 (en) Semiconductor integrated circuit device and method of laying out clock driver used in the semiconductor integrated circuit device
KR100233285B1 (ko) Cmos 로직 게이트 어레이
KR920001638B1 (ko) 반도체기억장치
KR20080110244A (ko) 전압 레귤레이터 및 그 제조 방법
EP0453279B1 (en) Semi-conductor integrated circuit
JP2671537B2 (ja) 半導体集積回路
US6617620B1 (en) Gate array with border element
KR100480558B1 (ko) 내부전압발생회로및이를구비한반도체메모리장치
JPH04225548A (ja) 集積回路装置
JPS63299247A (ja) スタンダ−ドセル方式の半導体集積回路
JPS63232352A (ja) マスタスライス方式半導体集積回路装置
JPH02191361A (ja) 集積回路
JPS60158644A (ja) 大規模集積回路装置
JPS62113463A (ja) モノリシツク集積回路
KR970023925A (ko) 반도체 장치의 패드 배치구조
JPS6421972A (en) Semiconductor integrated circuit