JPS6421972A - Semiconductor integrated circuit - Google Patents

Semiconductor integrated circuit

Info

Publication number
JPS6421972A
JPS6421972A JP17934287A JP17934287A JPS6421972A JP S6421972 A JPS6421972 A JP S6421972A JP 17934287 A JP17934287 A JP 17934287A JP 17934287 A JP17934287 A JP 17934287A JP S6421972 A JPS6421972 A JP S6421972A
Authority
JP
Japan
Prior art keywords
gate
bent
source
pattern
drains
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17934287A
Other languages
Japanese (ja)
Inventor
Minoru Noda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP17934287A priority Critical patent/JPS6421972A/en
Publication of JPS6421972A publication Critical patent/JPS6421972A/en
Pending legal-status Critical Current

Links

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To make possible a reduction in the size of a chip by a method wherein the gate pattern of an active element is bent and at the same time, a source and drains are arranged along the bent gate pattern. CONSTITUTION:In a semiconductor integrated circuit constituted by integrating a plurality of pieces of active elements, in each of which the currents between a source 1 and drains 3 are controlled by a voltage to be applied to the gate 2, in a constant array, the gate pattern of an active element among the above active elements is bent and at the same time, the active element, wherein the source 1 and the drains 3 and arranged along the bent gate pattern, is formed in the above semiconductor integrated circuit one piece or more. For example, two FETs, wherein the gate 2 and the source 1 are used in common and the direction of the gate is different from that of the source 1, are formed in a constitution, wherein the pattern of the gate 2 is bent at 90 deg. and at the same time, the drains 3a and 3b to correspond to the source 1 along the bent pattern of the gate 2 are arranged. Thereby, the density of integration of the active elements can be augmented and a reduction in the size of a chip becomes possible.
JP17934287A 1987-07-16 1987-07-16 Semiconductor integrated circuit Pending JPS6421972A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17934287A JPS6421972A (en) 1987-07-16 1987-07-16 Semiconductor integrated circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17934287A JPS6421972A (en) 1987-07-16 1987-07-16 Semiconductor integrated circuit

Publications (1)

Publication Number Publication Date
JPS6421972A true JPS6421972A (en) 1989-01-25

Family

ID=16064163

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17934287A Pending JPS6421972A (en) 1987-07-16 1987-07-16 Semiconductor integrated circuit

Country Status (1)

Country Link
JP (1) JPS6421972A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100228373B1 (en) * 1995-07-11 1999-11-01 김영환 Mos transistor
KR100237628B1 (en) * 1996-12-13 2000-01-15 김영환 Semiconductor device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053087A (en) * 1983-09-02 1985-03-26 Hitachi Ltd Field-effect transistor
JPS60149174A (en) * 1984-01-17 1985-08-06 Toshiba Corp Field effect type semiconductor device
JPS61232682A (en) * 1985-04-09 1986-10-16 Fujitsu Ltd Field effect transistor

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6053087A (en) * 1983-09-02 1985-03-26 Hitachi Ltd Field-effect transistor
JPS60149174A (en) * 1984-01-17 1985-08-06 Toshiba Corp Field effect type semiconductor device
JPS61232682A (en) * 1985-04-09 1986-10-16 Fujitsu Ltd Field effect transistor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100228373B1 (en) * 1995-07-11 1999-11-01 김영환 Mos transistor
KR100237628B1 (en) * 1996-12-13 2000-01-15 김영환 Semiconductor device

Similar Documents

Publication Publication Date Title
DE69113987D1 (en) Monolithic semiconductor arrangement consisting of an integrated control circuit and at least one power transistor, which are integrated on the same chip, and production method.
DE3571534D1 (en) Semiconductor integrated circuit with cmos gate array
DE3782367D1 (en) MOS SEMICONDUCTOR CIRCUIT.
KR860000712A (en) Semiconductor integrated circuit and circuit pattern design method
KR860004457A (en) Semiconductor integrated circuit device and its manufacturing method and manufacturing device
DE3884058D1 (en) High voltage semiconductor with integrated low voltage circuit.
KR910016236A (en) Semiconductor integrated circuit
IT8422056A0 (en) SEMICONDUCTOR SUBSTRATE AND PROCESS FOR MANUFACTURING THE SAME.
DE3853814D1 (en) Integrated semiconductor circuit.
DE3789826D1 (en) MOS semiconductor device and manufacturing method.
EP0317136A3 (en) A method of producing a semiconductor integrated circuit device
DE3880996D1 (en) MANUFACTURING METHOD FOR A MONOLITHIC SEMICONDUCTOR ARRANGEMENT WITH AT LEAST ONE TRANSISTOR, AN INTEGRATED CONTROL CIRCUIT AND A POWER TRANSISTOR INTEGRATED ON THE SAME CHIP.
IT1210872B (en) PROCESS FOR THE MANUFACTURE OF COMPLEMENTARY MOS TRANSISTORS IN HIGH DENSITY INTEGRATED CIRCUITS FOR HIGH VOLTAGES.
DE3483437D1 (en) SEMICONDUCTOR ROM ARRAY AND MANUFACTURING METHOD.
EP0026233A4 (en) Semiconductor integrated circuit and wiring method therefor.
KR890015418A (en) Semiconductor integrated circuit and its manufacturing method
DE3881264D1 (en) GATE CONTROLLABLE BILATERAL SEMICONDUCTOR CIRCUIT ARRANGEMENT.
EP0231811A3 (en) Method for manufacturing integrated electronic devices, in particular high voltage p-channel mos transistors
DE68915619D1 (en) Manufacturing method of semiconductor devices that contain at least one reactive ionic etching stage.
DE3583113D1 (en) INTEGRATED SEMICONDUCTOR CIRCUIT ARRANGEMENT IN POLYCELL TECHNOLOGY.
DE3586810D1 (en) SEMICONDUCTOR CIRCUIT.
GB2168846B (en) Semiconductor device having multi-thickness metallization and process for the fabrication thereof
KR860005450A (en) Semiconductor integrated circuit device and manufacturing method thereof
DE3581159D1 (en) SEMICONDUCTOR ARRANGEMENT WITH INTEGRATED CIRCUIT.
JPS6421972A (en) Semiconductor integrated circuit