JPS60113946A - 特性補正型マスタ−スライスゲ−トアレイ - Google Patents

特性補正型マスタ−スライスゲ−トアレイ

Info

Publication number
JPS60113946A
JPS60113946A JP58221603A JP22160383A JPS60113946A JP S60113946 A JPS60113946 A JP S60113946A JP 58221603 A JP58221603 A JP 58221603A JP 22160383 A JP22160383 A JP 22160383A JP S60113946 A JPS60113946 A JP S60113946A
Authority
JP
Japan
Prior art keywords
gate array
gates
pattern
master slice
generating circuits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP58221603A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0470784B2 (enExample
Inventor
Sadaji Tasai
太細 貞治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP58221603A priority Critical patent/JPS60113946A/ja
Publication of JPS60113946A publication Critical patent/JPS60113946A/ja
Publication of JPH0470784B2 publication Critical patent/JPH0470784B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90Masterslice integrated circuits
    • H10D84/901Masterslice integrated circuits comprising bipolar technology

Landscapes

  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
JP58221603A 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ Granted JPS60113946A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58221603A JPS60113946A (ja) 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58221603A JPS60113946A (ja) 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ

Publications (2)

Publication Number Publication Date
JPS60113946A true JPS60113946A (ja) 1985-06-20
JPH0470784B2 JPH0470784B2 (enExample) 1992-11-11

Family

ID=16769342

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58221603A Granted JPS60113946A (ja) 1983-11-25 1983-11-25 特性補正型マスタ−スライスゲ−トアレイ

Country Status (1)

Country Link
JP (1) JPS60113946A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62113463A (ja) * 1985-11-12 1987-05-25 Nec Corp モノリシツク集積回路
JPH02216864A (ja) * 1989-02-17 1990-08-29 Nec Ic Microcomput Syst Ltd 半導体集積回路装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850768A (ja) * 1981-09-21 1983-03-25 Matsushita Electronics Corp 半導体集積回路装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5850768A (ja) * 1981-09-21 1983-03-25 Matsushita Electronics Corp 半導体集積回路装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62113463A (ja) * 1985-11-12 1987-05-25 Nec Corp モノリシツク集積回路
JPH02216864A (ja) * 1989-02-17 1990-08-29 Nec Ic Microcomput Syst Ltd 半導体集積回路装置

Also Published As

Publication number Publication date
JPH0470784B2 (enExample) 1992-11-11

Similar Documents

Publication Publication Date Title
EP0342131A3 (en) Gate array device having macro cells for forming master and slave cells of master-slave flip-flop circuit
EP3790043A1 (en) Circuit module and power supply chip module
IT7303049A1 (it) Procedimento per sagomare pezzi di lavoro mediante scarica elettrica e apparecchiatura relativa.
US4996672A (en) Selecting circuit for a memory operating mode
JPS60113946A (ja) 特性補正型マスタ−スライスゲ−トアレイ
EP1514737A3 (de) Stromversorgung für Fahrzeuge
US5177372A (en) Parallel operation power supply control system
JPH0630377B2 (ja) 半導体集積回路装置
EP0347332A2 (en) Method of forming semiconductor integrated circuit using master slice approach
JPS57122529A (en) Drawing data processing system for electron beam exposure apparatus
CA2024933A1 (en) Uniform current and voltage distribution device
JPS6439042A (en) Semiconductor integrated circuit
JPS6489537A (en) Lsi
SU1243068A1 (ru) Преобразователь переменного напр жени дл регулировани мощности
SU1241422A1 (ru) Многоканальный релаксационный генератор
JP2661337B2 (ja) 半導体集積回路装置
JPH0243762A (ja) モノリシック集積回路
JP2850946B2 (ja) 電子表示装置の給電方法
SU1534450A2 (ru) Многоканальна система электропитани с равномерным токораспределением
JPS5868947A (ja) 半導体装置の製造方法
JPS60158644A (ja) 大規模集積回路装置
JPH0287550A (ja) マスタースライス方式半導体集積回路
KR950013048B1 (ko) 반도체 장치
JPH04123609A (ja) ゲート回路
JPS62113463A (ja) モノリシツク集積回路