JPS6489537A - Lsi - Google Patents

Lsi

Info

Publication number
JPS6489537A
JPS6489537A JP24754987A JP24754987A JPS6489537A JP S6489537 A JPS6489537 A JP S6489537A JP 24754987 A JP24754987 A JP 24754987A JP 24754987 A JP24754987 A JP 24754987A JP S6489537 A JPS6489537 A JP S6489537A
Authority
JP
Japan
Prior art keywords
type semiconductor
row
cell
type
column directions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24754987A
Other languages
Japanese (ja)
Inventor
Akiyasu Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP24754987A priority Critical patent/JPS6489537A/en
Publication of JPS6489537A publication Critical patent/JPS6489537A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H01L27/118—Masterslice integrated circuits
    • H01L27/11803—Masterslice integrated circuits using field effect technology
    • H01L27/11807—CMOS gate arrays

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To shorten wiring lengths by arranging both P-type semiconductor cells and N-type semiconductor cells so that each type of cell relatively neighbors in both row and column directions. CONSTITUTION:P-type semiconductor cells and N-type semiconductor cells are so arranged that each type of cell relatively neighbors in both row and column directions, or a pattern of P, N, P, N... in the row direction and a pattern of N, P, N, P... appear. According to the constitution, it is possible to make connections between the P-type semiconductor cell and the N-type semiconductor cell in both row and column directions, thereby allowing formation of a flip-flop, etc., in either direction, lengthwise or widthwise. Hence, when forming a flip-flop, etc., wiring lengths can be shortened, whereby a delay time can be reduced.
JP24754987A 1987-09-30 1987-09-30 Lsi Pending JPS6489537A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24754987A JPS6489537A (en) 1987-09-30 1987-09-30 Lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24754987A JPS6489537A (en) 1987-09-30 1987-09-30 Lsi

Publications (1)

Publication Number Publication Date
JPS6489537A true JPS6489537A (en) 1989-04-04

Family

ID=17165149

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24754987A Pending JPS6489537A (en) 1987-09-30 1987-09-30 Lsi

Country Status (1)

Country Link
JP (1) JPS6489537A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0316174A (en) * 1989-03-17 1991-01-24 Kawasaki Steel Corp Fundamental cell and arrangement structure of fundamental cells
US5444275A (en) * 1990-07-10 1995-08-22 Kawasaki Steel Corporation Radial gate array cell
US5635744A (en) * 1994-09-08 1997-06-03 Mitsubushi Denki Kabushiki Kaisha Semiconductor memory and semiconductor device having SOI structure
US5957149A (en) * 1997-06-25 1999-09-28 Karg; Jeffrey A. Fluid diverter valve

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0316174A (en) * 1989-03-17 1991-01-24 Kawasaki Steel Corp Fundamental cell and arrangement structure of fundamental cells
US5444275A (en) * 1990-07-10 1995-08-22 Kawasaki Steel Corporation Radial gate array cell
US5635744A (en) * 1994-09-08 1997-06-03 Mitsubushi Denki Kabushiki Kaisha Semiconductor memory and semiconductor device having SOI structure
US5773865A (en) * 1994-09-08 1998-06-30 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory and semiconductor device having SOI structure
US5957149A (en) * 1997-06-25 1999-09-28 Karg; Jeffrey A. Fluid diverter valve

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