JPS55115352A - Clock distributing circuit of ic device - Google Patents

Clock distributing circuit of ic device

Info

Publication number
JPS55115352A
JPS55115352A JP2209979A JP2209979A JPS55115352A JP S55115352 A JPS55115352 A JP S55115352A JP 2209979 A JP2209979 A JP 2209979A JP 2209979 A JP2209979 A JP 2209979A JP S55115352 A JPS55115352 A JP S55115352A
Authority
JP
Japan
Prior art keywords
clock
net
cells
driver
cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2209979A
Other languages
Japanese (ja)
Inventor
Koji Hashiguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP2209979A priority Critical patent/JPS55115352A/en
Publication of JPS55115352A publication Critical patent/JPS55115352A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To make the line lengths between the clock nets and the load gates equal to each other and to minimize the clock skew by forming a clock net for each area which is obtained by splitting the LSI circuit, by providing a clock driver to each clock net to feed a clock to the net and by making the floating capacitance of each clock net regulable. CONSTITUTION:The clock net 6 similar to the power net 5 is divided into three function blocks 2, the clock driver 7 is provided to each net to feed a clock from the outside to the net through the pad 8. In each block 2, the clock cell 9 is placed between both rows of the power blocks 4 and the base cells 3, a clock is fed to the required cell 3 through the cell 9 and the channels 61, 62. The net 6 is of Al wiring, the resistance can be disregarded, the delay times from the drivers 7 to the respective cells 9 are all the same and are determined by both the floating capacitance which the net 6 has and the time constant of the output resistance of the driver 7. The delay times from the cells 9 to the respective load cells 3 become the same because the channels 61, 62 are of the same form. Accordingly there exists no skew actually.
JP2209979A 1979-02-27 1979-02-27 Clock distributing circuit of ic device Pending JPS55115352A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2209979A JPS55115352A (en) 1979-02-27 1979-02-27 Clock distributing circuit of ic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2209979A JPS55115352A (en) 1979-02-27 1979-02-27 Clock distributing circuit of ic device

Publications (1)

Publication Number Publication Date
JPS55115352A true JPS55115352A (en) 1980-09-05

Family

ID=12073427

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2209979A Pending JPS55115352A (en) 1979-02-27 1979-02-27 Clock distributing circuit of ic device

Country Status (1)

Country Link
JP (1) JPS55115352A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61129844A (en) * 1984-11-29 1986-06-17 Nec Corp Lsi block
JPS639133A (en) * 1986-06-27 1988-01-14 エツセジ−エツセ　ミクロエレツトロニカ　ソチエタ　ペル　アノニマ Method of designing integrated microcomputer and integrated microcomputer with module construction obtained by the method
JPH01246845A (en) * 1988-03-29 1989-10-02 Toshiba Corp Integrated circuit
EP0351819A2 (en) * 1988-07-19 1990-01-24 Kabushiki Kaisha Toshiba Standard cells with flip-flops
JPH0229113A (en) * 1988-07-19 1990-01-31 Nec Corp Semiconductor device
JPH0251252A (en) * 1988-08-15 1990-02-21 Toshiba Corp Wiring structure of integrated circuit
JPH0254950A (en) * 1988-08-19 1990-02-23 Toshiba Corp Clock supply circuit
JPH02208956A (en) * 1989-02-08 1990-08-20 Toshiba Corp Arrangement and wiring system of integrated circuit
JPH0368207A (en) * 1989-08-07 1991-03-25 Fujitsu Ltd Semiconductor integrated circuit device

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61129844A (en) * 1984-11-29 1986-06-17 Nec Corp Lsi block
JPS639133A (en) * 1986-06-27 1988-01-14 エツセジ−エツセ　ミクロエレツトロニカ　ソチエタ　ペル　アノニマ Method of designing integrated microcomputer and integrated microcomputer with module construction obtained by the method
JPH0812900B2 (en) * 1986-06-27 1996-02-07 エツセジ−エツセ ミクロエレツトロニカ ソチエタ ペル アノニマ 1-chip microcomputer manufacturing method and 1-chip microcomputer manufactured by the method
JPH01246845A (en) * 1988-03-29 1989-10-02 Toshiba Corp Integrated circuit
EP0351819A2 (en) * 1988-07-19 1990-01-24 Kabushiki Kaisha Toshiba Standard cells with flip-flops
JPH0229113A (en) * 1988-07-19 1990-01-31 Nec Corp Semiconductor device
JPH0251252A (en) * 1988-08-15 1990-02-21 Toshiba Corp Wiring structure of integrated circuit
JPH0254950A (en) * 1988-08-19 1990-02-23 Toshiba Corp Clock supply circuit
JPH02208956A (en) * 1989-02-08 1990-08-20 Toshiba Corp Arrangement and wiring system of integrated circuit
JPH0368207A (en) * 1989-08-07 1991-03-25 Fujitsu Ltd Semiconductor integrated circuit device

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