JPH0468789B2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to charge coupled devices.

Since the charge-coupled device (hereinafter referred to as CCD) was announced in 1970, it has been based on conventional advanced integrated circuit technology, and has been rapidly developed along with its advancement. It has come to be used in various applications. Especially CCD
Solid-state imaging devices or analog delay lines using
It has many features such as the ability to obtain The output of these charge-coupled devices is typically constructed with an on-chip output amplifier of floating diffusions and MOS gates, resulting in an inherently high signal-to-noise ratio device with extremely low output capacitance.

Incidentally, in recent years, for various reasons, attempts have been made to form these charge-coupled devices in a semiconductor layer of a conductivity type opposite to that of a semiconductor substrate. For example, when an N-type semiconductor smart body board is used, a P-type semiconductor region is formed on the surface of the substrate by means such as ion implantation or epitaxial growth. This P-type semiconductor region is usually called a P-well, and a charge-coupled device is intended to be formed on this P-well. Hereinafter, for convenience of explanation, the case of this N-type substrate will be explained.

Usually, the impurity concentration of this P-well is about 10 ¹⁵ /cm ² and the thickness is about several μm. Therefore, the specific resistance of this P-well reaches several tens of kilohms. This is a resistance value that is about two orders of magnitude larger than that when it is formed on a normal buying bulk. In addition, the potential for this P-well is usually set by providing contacts at the periphery of the device, and when forming on a normal bulk, contacts are provided over the entire bottom of the device. Compared to this, there is a drawback that the potential of the P well is difficult to stabilize during operation. Therefore, during operation, the P-well potential fluctuates due to the induction of clock pulses, and this fluctuation propagates to the output amplifier formed on the same P-well, resulting in an increase in noise at the output amplifier.

FIG. 1 shows a cross-sectional view of the main parts of a conventional charge coupled device formed on a P-well. In FIG. 1, 1 is an N-type semiconductor substrate, and 2 is a semiconductor region formed on this semiconductor substrate and having a conductivity type opposite to the substrate, which is a P well in this example. 3 is
Floating diffusion layer of CCD output section, 4 is floating diffusion phase layer 3
16 is the gate of the reset transistor (hereinafter referred to as reset gate), 5 is the drain of the output amplifier, and 6 is the output. The output diffusion layer of the amplifier, 7 is the ground diffusion layer of the output amplifier, 17 is the gate of the drive transistor of the output amplifier, and 18 is the gate of the load transistor of the output amplifier. In this example, a general source follower amplifier is shown as the output amplifier. Also,
The floating diffusion layer 3 and the gate 17 of the output amplifier are coupled by a wiring 19. 10-15 is
Transfer electrodes of CCD, 20 to 25 are transfer electrodes 10 to 25
26 is a terminal for the reset gate 16, 27 is a terminal for the reset drain 4, 28 is a terminal for the drain 5 of the output amplifier, 29 is an output terminal, and 30 is a terminal for applying a predetermined voltage to the gate 18. Terminals 31 are ground terminals for applying a voltage, 9 are contacts of the P well 2, and 8 are terminals for applying a voltage to the P well 2, and these contacts are usually provided at the periphery of the device.

By the way, in a device in which a CCD is formed on such a P-well, the potential of the P-well is usually set to 0 volts, and the drive electrodes 10 to 10 are connected to the P-well.
A positive pulse voltage or DC voltage is applied to each terminal including terminals 20 to 25 of No. 15. CCD
The signal charges transferred by the output floating diffusion layer 3
Here, the voltage is converted into a voltage by various capacitances associated with the floating diffusion layer, and is taken out from the output terminal 29 via the output amplifier. However, in a device with this conventional configuration, the P well 2 has a very high resistance, so even if the P well 2 is
Even if the potential of well 2 is fixed, the P well is subject to potential fluctuations due to pulses applied to the transfer electrode.
This potential fluctuation has various frequency components due to the distributed capacitance or resistance parasitic to the P-well, drive pulses, etc. This potential variation directly causes the P-well directly below the output amplifier to vary.
This is because the P-well in which the CCD is formed and the P-well in which the output amplifier is formed are connected by a finite P-well resistance. For this reason, although the conventional CCD has a high S/N ratio, the fluctuation of the P-well directly under the amplifier introduces induced noise in the drive pulse.

SUMMARY OF THE INVENTION An object of the present invention is to provide a charge-coupled device which eliminates the above-mentioned conventional drawbacks.

According to the present invention, a charge-coupled device is formed on a semiconductor substrate having one conductivity, is formed on a semiconductor region of the opposite conductivity type to the semiconductor substrate, and includes a charge transfer path section, a charge detection section, and an output amplifier. In,
A charge-coupled device characterized in that at least a part of the semiconductor substrate immediately below the semiconductor region where the output amplifier is formed is formed with a semiconductor region having the same conductivity type as the semiconductor substrate and having a higher concentration of impurities. can get.

FIG. 2 shows another embodiment of a charge coupled device according to the invention. In FIG. 2, the same numbers as in FIG. 1 indicate the same objects. The difference between the device according to the present invention shown in FIG. 2 and the conventional device shown in FIG. 1 is that in FIG. It is formed by This highly doped N-type region forms a large junction capacitance with the P-well directly below the output amplifier. This junction capacitance, together with other parasitic capacitances and the finite resistance that exists between the P-well directly below the CCD and the P-well directly below the output amplifier, forms a high-pass rejection filter.
Therefore, noise components caused by fluctuations in the P-well potential immediately below the CCD due to induction of external pulses are blocked, and the P-well potential immediately below the output amplifier is stabilized. Therefore, an output amplifier with high S/N is realized. Moreover, the area does not need to be increased. In the embodiment shown in FIG. 2, a more effective device can be realized by separating the P-well directly below the CCD and the P-well immediately below the output amplifier by the substrate. Further, in FIG. 2, the N-type high concentration region is formed only directly below the output amplifier, but this high concentration region may also be formed directly below the P well directly below the CCD.

This is because the junction capacitance between the P-well directly under the CCD and the N-type substrate can be increased, and the potential of the P-well can be stabilized. Therefore, fluctuations in the P-well directly below the CCD are also reduced, resulting in lower noise.

As described above, according to the present invention, even a CCD formed on a P-well can realize an extremely low-noise device.

Furthermore, although all of the above explanations have been made in the case of an N-type substrate, the gist of the present invention can be similarly applied to a P-type substrate by reversing the conductivity type or voltage relationship of other impurities.

[Brief explanation of the drawing]

FIG. 1 is a sectional view of a conventional CCD, and FIG. 2 is a sectional view showing an embodiment of a CCD according to the present invention. In the figure, 1 is a semiconductor substrate having one conductivity type, 2 is a semiconductor region formed on this substrate and has a conductivity type opposite to that of the semiconductor substrate, 3 is a floating diffusion layer, 4 is a reset drain, 5, 6, 7 is the drain of the output amplifier, an output diffusion layer, and a ground diffusion layer, 9 is a contact for setting the potential of the semiconductor region 2, 8 is this terminal, 10 to 15 are
CCD transfer electrodes, 20 to 25 are these terminals,
16 is the reset gate, 17 is the gate of the drive transistor of the output amplifier, 18 is the gate of the load transistor, 19 is the floating diffusion layer 3 and the gate 17
Wirings 26 to 31 connect the reset gate 1.
6, terminals of the reset drain 4, amplifier drain 5, output diffusion layer 6, gate 18, and ground diffusion layer 7. Reference numeral 60 denotes a semiconductor region containing high concentration impurities and having the same conductivity type as the semiconductor substrate.

Claims (1)

[Claims] 1. A charge-coupled device formed on a semiconductor substrate having one conductivity type, formed on a semiconductor region of the opposite conductivity type to the semiconductor substrate, and comprising a charge transfer path section, a charge detection section, and an output amplifier, wherein the output amplifier is A charge-coupled device characterized in that at least a part of the semiconductor substrate immediately below the formed semiconductor region is formed with a semiconductor region having the same conductivity type as the semiconductor substrate and having a higher concentration of impurities.