JP3021533B2 - CCD image sensor - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CCD imaging device, in particular, a CCD imaging device having a so-called floating diffusion amplifier for converting a signal charge from a charge transfer unit constituted by a CCD into an output voltage. Related to the element.

[Summary of the Invention]

The present invention temporarily accumulates signal charges from a charge transfer unit constituted by a CCD in a floating diffusion,
By supplying a voltage change based on the accumulated charge to an output circuit composed of a plurality of switching elements, a CCD image pickup device having an output unit configured to extract an output voltage from an output terminal of the output circuit. A wire extending from the terminal is formed below the wire connecting the floating diffusion and the output circuit, and a well region where an output terminal of the output circuit is formed and a well region where a charge transfer portion is formed are independent of each other. With such a configuration, the capacitance relating to the floating diffusion can be reduced to achieve higher sensitivity.

[Conventional technology]

As shown in FIG. 4, a conventional CCD image sensor, particularly an output unit thereof, is provided with a floating diffusion (FD) via an output gate (OG) next to a charge transfer unit (41) formed of a CCD. A discharge element (42) comprising a reset gate (RG) and a drain region (DD), and a source comprising an output element (43) and a load resistance element (44) subsequent to the discharge element (42). An output buffer (46) having a follower circuit (45) is provided.

In the charge transfer section (41), the signal charge transferred from the accumulated charge (47) in the last stage is temporarily accumulated in a floating diffusion (FD), and a voltage change based on the accumulated charge is converted into a source follower in a subsequent stage. By supplying the voltage to the circuit (45), the output voltage _Vout is extracted from the output terminal φ _out of the source follower circuit (45). After taking _{out the} output voltage V _out from the output terminal φ _out ,
Supplying a reset pulse P _R to the reset gate (RG) to the floating diffusion (FD) the initial voltage V _dd
Reset to floating diffusion (F
The charge accumulated in D) is discharged to the drain region (DD) side.

[Problems to be solved by the invention]

In general, the voltage change ΔV from the floating diffusion (FD) supplied to the source follower circuit (45), particularly the gate of the output element (43), depends on the total capacitance C _FD of the floating diffusion (FD). It is expressed by an equation.

ΔV = Q / C _FD ‥‥ (1) where Q is a floating diffusion (F
D) is the amount of signal charge stored in D). The total capacity for floating diffusion (FD) is 5th.
As shown in the figure, the junction capacitances C ₁ , C ₂ , and C ₃ between the floating diffusion (FD) and the substrate (48), the capacitance C ₄ between the floating diffusion (FD) and the output gate (OG), and the floating capacitance The capacitance C ₅ between the diffusion (FD) and the reset gate (RG), the gate electrode (4) of the floating diffusion (FD) and the output element (43)
9) The capacitance C ₆ between the wiring (50) and the substrate (48), the capacitance C ₇ between the drain region (51) and the gate electrode (49) of the output element (43), the source region (52) and the gate electrode ( 49) Capacity between C ₈
And it becomes a gate electrode and (49) from the capacitance C ₉ between the substrate (48).

And, as can be seen from the above (1), the total capacitance C _{FD of} this floating diffusion (FD)
, The voltage change ΔV from the floating diffusion (FD) can be efficiently supplied to the gate of the output element (43), which leads to an increase in the sensitivity of the CCD image sensor.

By the way, the conventional output section, particularly the configuration between the floating diffusion (FD) and the output element (43),
As shown in the figure, a wiring (50) connecting the floating diffusion (FD) and the gate of the output element (43) is formed on the substrate (48) via an interlayer insulating layer (53).
Voltage change from the floating diffusion (FD) is supplied as the input voltage V _in to the wiring (50),
Since the substrate (48) is fixed at the ground potential V _SS ,
Wiring (50) and a potential difference occurs between the substrate (48), this potential difference, the wiring (50) and the capacitance C ₆ is formed between the substrate (48). Further, in the conventional output portion, as shown in FIG. 4, since the bias potential V _BS of the output element (43) is fixed to the ground potential V _SS, input voltage applied to the gate of the output element (43) When the bias potential V _BS is viewed based on V _in or the output voltage V _out output from the source region (52),
The bias potential V _BS becomes a negative potential, and this bias potential V _BS
Is applied to the gate, the drain current I _D decreases in characteristic, and the output voltage V _out decreases accordingly (generally,
Called the back gate effect). Therefore, the input voltage V _in
, Ie, the gain of the output voltage V _out with respect to When the gain is reduced to less than 1, the potential difference between the input voltage V _in and the output voltage V _out, a source region a gate electrode (49) (52) capacitor C ₈ is formed between, The bias potential V _BS
From the fact that There has been fixed to the ground potential V _SS, the input voltage V _in
And a potential difference occurs between the bias potential V _BS, the capacitance C ₉ occur with the gate electrode (49) by the potential difference between the substrate (48).

Thus, in the conventional CCD image sensor, the wiring (5
0) and a capacitance C ₆ between the substrate (48), a capacitance C ₈ between the gate and the source of the output element (43), and a capacitance C ₉ between the gate and the substrate (48) of the output element (43). diffusion not Hakare reduction of capacitance C _FD relates (FD), a high sensitivity is a disadvantage that can not be realized.

The present invention has been made in view of such a point, and an object of the present invention is to reduce the capacitance related to the floating diffusion, in particular, to reduce the capacitances C ₆ , C ₈ and C ₉ to increase the sensitivity. An object of the present invention is to provide a CCD image sensor capable of realizing the above.

[Means for solving the problem]

According to the present invention, a signal charge from a charge transfer unit (2) constituted by a CCD is temporarily stored in a floating diffusion (F
D), and changes the voltage based on the stored charge into the input voltage V
By supplying a plurality of switching elements (4) and consisting of (5) the output circuit (6) as _in, an output unit was taken out as the output voltage V _out from the output terminal phi _out of the output circuit (6) (1 ), The wiring (10) extending from the output terminal φ _out of the output circuit (6) is connected to the floating diffusion (FD).
A well region (23) in which an output terminal φ _out of the output circuit (6) is formed and a well in which a charge transfer section (2) is formed, under a wiring (13) connecting the output circuit and the output circuit (6). The region (22) is formed independently of each other.

[Action]

According to the above configuration of the present invention, the wiring (10) extending from the output terminal φ _out of the output circuit (6) is formed below the wiring (13) connecting the floating diffusion (FD) and the output circuit (6). Therefore, the wirings (10) and (13) are formed in two layers, so that the input voltage V
_in and the output voltage _Vout appear on each of the two layers of wirings (10) and (13). As a result, the potential difference between the wirings (10) and (13) almost disappears, and the wiring (10) ) and the capacity C ₆ between the substrate (well region) is reduced.

Thus, since the capacitance C ₆ is reduced, the capacitance C _FD about the floating diffusion (FD) is also reduced, it is possible to realize the high sensitivity of the CCD image pickup device (A).

Also, the well region (23) where the output terminal φ _out of the output circuit (6) is formed and the well region (22) where the charge transfer section (2) is formed are formed independently of each other. The potential of the well region (22) in which the charge transfer section (2) is formed does not fluctuate due to the change of the output voltage _Vout , and good charge transfer can be performed in the charge transfer section (2).

〔Example〕

An embodiment of the present invention will be described below with reference to FIGS.

FIG. 1 is a configuration diagram showing an output unit (1) of a CCD image sensor (A) according to the present embodiment.

The output section (1) has a configuration of a so-called floating diffusion amplifier that converts a signal charge from a charge transfer section (2) configured by a CCD into an output voltage.
That is, a discharge element (3) including a floating diffusion (FD), a reset gate (RG), and a drain region (DD) is provided at the next stage of the charge transfer section (2) with an output gate (OG) interposed therebetween. Further, an output buffer (7) having a source follower circuit (6) comprising at least an output element (4) and a load resistance element (5) is provided at a stage subsequent to the discharging element (3). The output element (4) and the load resistance element (5) are composed of, for example, MOSFETs (MOS field effect transistors).

The charge transfer section (2) supplies a transfer clock pulse _PT to the transfer electrode (8) and the storage electrode (9) to sequentially output signal charges from a sensor section (not shown) to the output section (1) side. Has been made to transfer to.

Then, among the charge transfer section (2), the signal charge transferred from the final stage storage electrode (9) is temporarily stored in the floating diffusion (FD), the input voltage V _in a voltage change based on the accumulated charge as by feeding to the subsequent source follower circuit (6) it is adapted to take out as an output voltage V _out from the output terminal phi _out of the source follower circuit (6). Output terminal φ _out to output voltage V
signal after removal of the _out by supplying a reset pulse P _R to the reset gate (RG), the floating diffusion the (FD) is reset to the initial voltage V _dd, accumulated in the floating diffusion (FD) The charge is discharged to the drain region (DD) side.

Thus, in this example, as shown in FIG. 2, a wiring (10) extending from the output terminal φ _out (see FIG. 1) is formed of, for example, a polycrystalline silicon layer, and the wiring (10) is further formed on a substrate. (11) on, for example, the first interlayer insulating layer made of SiO ₂ (1
2) formed through. Thereafter, an Al wiring (13) connecting the floating diffusion (FD) and the gate of the output element (4) (see FIG. 1) is formed on the wiring (10) via a second interlayer insulating layer (14). I do. That is, the wiring (10)
And the Al wiring (13) have a two-layer structure. At this time, since the output voltage V _out fed in phase to each other in the wiring between the input voltage V _in supplied to the Al wiring (13) (10), the Al wiring (13) and wiring (10) between the The potential difference almost disappears.
However, the output voltage V _out is, by the back gate effect of the normal output element (4), the potential (amplitude) is smaller than the input voltage V _in. Therefore, the Al wiring (13) and the wiring (10)
There is a slight potential difference between them. Therefore, in this embodiment, as shown in FIG. 1, using the output voltage V _out to be outputted from the output terminal phi _out as a bias potential V _BS of the output element (4). From doing so, if on the basis of the input voltage V _in or the output voltage V _out saw a bias potential V _BS, bias potential V _BS, since it becomes the input voltage V _in the same phase, not the negative voltage, reduction and a decrease in the output voltage V _out of _the characteristics on the drain current I _d is suppressed, resulting in the input voltage V _in and the output voltage V _out potential (amplitude) is approximately the same. That is, the gain becomes 1, and the Al wiring (13) and the wiring (1
The potential difference between 0) becomes almost zero.

To the output voltage V _out and the same potential bias potential V _BS of the output element (4), for example, as shown in FIG. 3, for example, using N-type substrate as the substrate (21), the substrate (21) A plurality of P-type well regions (22), (23) and (24) are formed on the surface of the substrate. Then, in the first well region (22), the charge transfer section (2), the output gate (OG), the floating diffusion (FD), and the reset gate (R
G), a discharge element (3) comprising a drain region (DD), an output element (4) in a second well region (23), and a load resistance element in a third well region (24). Form (5). That is, the second well region (23) where the output element (4) is formed is separated from the first and third well regions (22) and (24). Thereby, the potential of the first well region (22) in which the charge transfer section (2) is formed does not change due to the change of the output voltage _Vout , and good charge transfer is performed in the charge transfer section (2). be able to.

Thereafter, the floating diffusion (FD) and the gate electrode (25) of the output element (4) are electrically connected by an Al wiring (13), and the source region (26) of the output element (4) and the load resistance element ( The drain region (27) of 5) is electrically connected by a wiring (28), and an output terminal φ _out is derived from the wiring (28). At this time, for example, the contact hole of the wiring (28) is formed at the boundary between the source region (26) and the well region (23) such that the output voltage _Vout applied to the wiring (28) is also applied to the second well region (23). The wiring (28) is connected to both the source region (26) and the well region (23) by being formed in the portion. Of course, another wiring may be used to connect the wiring (28) and the well region (23). The power supply voltage _Vdd is applied to the drain region (DD) of the discharging element (3) and the drain region (29) of the output element (4), respectively, and the source region (30) of the load resistance element (5), The ground potential _VSS is applied to each of the first well region (22) and the third well region (24). Also,
A gate voltage _Vgg is applied to the gate electrode (31) of the load resistance element (5).

In the illustrated example, the first well region (22) and the third well region (24) are shown separately, but the first and third well regions (22) and (24) are not separated. One well region, and the charge transfer portion (2)
An output gate (OG), a discharge element (3), and a load resistance element (5) may be formed to isolate only the second well region (23) where the output element (4) is formed. .

As described above, according to this example, the wiring (polycrystalline silicon layer) (10) extending from the output terminal φ _{out of the} source follower circuit (6) is connected to the floating diffusion (F).
D) is formed under the Al wiring (13) connecting the gate of the output element (4) and the wiring (10) and the Al wiring (13) have a two-layer structure. V _in the output voltage V _out is respectively appear that each wire has a two-layer (10) and (13), so that each wire (10) and (1
3) the potential difference almost disappears between, it is possible to reduce Al wiring (13) the capacitance C ₆ of the substrate (or well region).

Further, the bias potential V _BS of the output element (4) is changed to the output voltage V _BS.
Since so as to set _out the same potential, next to the V _in = V _out the relationship between the input voltage V _in and the output voltage V _out, the gain is 1. As a result, there is no potential difference between the gate and the lease of the output element (4), it is possible to reduce the capacitance C ₈ between the gate and the source. At the same time, the bias potential V _BS
Is _in phase with the input voltage Vin, so the output element (4)
The gate and the substrate (or well region) capacitance between C ₉ can be reduced. Therefore, the capacitance C _FD about the floating diffusion (FD) is reduced, it is possible to realize the high sensitivity of the CCD image pickup device (A).

In the above embodiment, only the first stage is shown as the source follower circuit (6) of the output section (1). However, the source follower circuit is actually composed of two or three stages of source follower circuits. In this case, if the output voltage output from each output terminal of the second or third stage is _in phase with the input voltage Vin, the wiring derived from the output terminal of the second or third stage is shown in FIG. As shown, it may be formed on the Al wiring (13).

〔The invention's effect〕

According to the CCD image sensor according to the present invention, the floating diffusion amplifier has
The capacity related to diffusion can be reduced, and the sensitivity of the CCD imaging device can be increased.

[Brief description of the drawings]

1 is a configuration diagram showing a CCD image sensor according to the present embodiment, FIG. 2 is an enlarged cross-sectional view showing a main part thereof, FIG. 3 is a schematic cross-sectional view showing the present embodiment, and FIG. FIG.
FIG. 1 is a schematic cross-sectional view thereof, and FIG. (A) is a CCD image sensor, (1) is an output section, (2) is a charge transfer section, (3) is a discharge element, (4) is an output element,
(5) is a load resistance element, (6) is a source follower circuit,
(7) is an output buffer, (OG) is an output gate, (FD) is a floating diffusion, (RG) is a reset gate, (DD) is a drain region, (10) is a wiring, (13)
Is an Al wiring.

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/762 H01L 21/339 H01L 27/148 H04N 5/335

Claims (1)

(57) [Claims] A signal charge from a charge transfer unit constituted by a CCD is temporarily stored in a floating diffusion,
By supplying a voltage change based on the accumulated charge to an output circuit composed of a plurality of switching elements, a CCD image pickup device having an output unit configured to extract an output voltage from an output terminal of the output circuit. A wire extending from the terminal is formed below the wire connecting the floating diffusion and the output circuit, and a well region where an output terminal of the output circuit is formed and a well region where the charge transfer unit is formed. CCD image sensors formed independently of each other.