JPH0467381B2 - - Google Patents

Info

Publication number
JPH0467381B2
JPH0467381B2 JP59011228A JP1122884A JPH0467381B2 JP H0467381 B2 JPH0467381 B2 JP H0467381B2 JP 59011228 A JP59011228 A JP 59011228A JP 1122884 A JP1122884 A JP 1122884A JP H0467381 B2 JPH0467381 B2 JP H0467381B2
Authority
JP
Japan
Prior art keywords
circuit
data
multiplexed
input signal
register
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59011228A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60153649A (ja
Inventor
Hiroyuki Noguchi
Kazuo Wani
Toshuki Yamamoto
Tetsumasa Ooyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP59011228A priority Critical patent/JPS60153649A/ja
Publication of JPS60153649A publication Critical patent/JPS60153649A/ja
Publication of JPH0467381B2 publication Critical patent/JPH0467381B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/16Time-division multiplex systems in which the time allocation to individual channels within a transmission cycle is variable, e.g. to accommodate varying complexity of signals, to vary number of channels transmitted
    • H04J3/1682Allocation of channels according to the instantaneous demands of the users, e.g. concentrated multiplexers, statistical multiplexers

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Dc Digital Transmission (AREA)
  • Monitoring And Testing Of Transmission In General (AREA)
JP59011228A 1984-01-24 1984-01-24 検出回路 Granted JPS60153649A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59011228A JPS60153649A (ja) 1984-01-24 1984-01-24 検出回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59011228A JPS60153649A (ja) 1984-01-24 1984-01-24 検出回路

Publications (2)

Publication Number Publication Date
JPS60153649A JPS60153649A (ja) 1985-08-13
JPH0467381B2 true JPH0467381B2 (cs) 1992-10-28

Family

ID=11772086

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59011228A Granted JPS60153649A (ja) 1984-01-24 1984-01-24 検出回路

Country Status (1)

Country Link
JP (1) JPS60153649A (cs)

Also Published As

Publication number Publication date
JPS60153649A (ja) 1985-08-13

Similar Documents

Publication Publication Date Title
GB1517750A (en) Reframing circuit for a time division multiplex system
JPH0467381B2 (cs)
US4528660A (en) Multiplexed data stream monitor
US5235603A (en) System for determining loss of activity on a plurality of data lines
JPS62181540A (ja) 同期式デ−タ入力回路
JP3010634B2 (ja) フレーム同期多重処理方式
JPS6135738B2 (cs)
JPH0771063B2 (ja) 入力信号周波数異常検出回路
JP2531720B2 (ja) デジタル多重変換装置の同期回路方式
JPS6238629A (ja) フレ−ム同期方法
SU1282142A1 (ru) Многоканальное устройство дл сопр жени
SU742940A1 (ru) Мажоритарно-резервированное устройство
JPS61192140A (ja) 光時分割多重通信方式
JPS5797247A (en) Stuff control system
JPS6137819B2 (cs)
JPH0220937A (ja) 同期検出回路
JPS63278431A (ja) フレ−ムパタ−ン検出方式
JPH02166846A (ja) マルチフレーム検出回路
JPH02118800A (ja) 警報検出回路
JPH0714184B2 (ja) クロックダウン検出回路
JPH0595387A (ja) 回線監視回路
JPS61101139A (ja) シンク検出装置
JPS63227300A (ja) デ−タ伝送システム
JPS6316934B2 (cs)
JPH0286343A (ja) 時分割多重化装置