JPH0459956U - - Google Patents
Info
- Publication number
- JPH0459956U JPH0459956U JP10238390U JP10238390U JPH0459956U JP H0459956 U JPH0459956 U JP H0459956U JP 10238390 U JP10238390 U JP 10238390U JP 10238390 U JP10238390 U JP 10238390U JP H0459956 U JPH0459956 U JP H0459956U
- Authority
- JP
- Japan
- Prior art keywords
- island
- lead frame
- bonding
- suspension
- pad
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000725 suspension Substances 0.000 claims description 3
- 238000010586 diagram Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
Landscapes
- Wire Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990102383U JP2520527Y2 (ja) | 1990-09-29 | 1990-09-29 | リードフレーム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1990102383U JP2520527Y2 (ja) | 1990-09-29 | 1990-09-29 | リードフレーム |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0459956U true JPH0459956U (US07135483-20061114-C00003.png) | 1992-05-22 |
| JP2520527Y2 JP2520527Y2 (ja) | 1996-12-18 |
Family
ID=31846594
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1990102383U Expired - Lifetime JP2520527Y2 (ja) | 1990-09-29 | 1990-09-29 | リードフレーム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2520527Y2 (US07135483-20061114-C00003.png) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0878595A (ja) * | 1994-08-29 | 1996-03-22 | Analog Devices Inc <Adi> | 改善された熱放散を備えたｉｃパッケージ |
| JP2006032775A (ja) * | 2004-07-20 | 2006-02-02 | Denso Corp | 電子装置 |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5910249A (ja) * | 1982-07-09 | 1984-01-19 | Nec Corp | 半導体装置用リ−ドフレ−ム |
| JPS6070755A (ja) * | 1983-09-28 | 1985-04-22 | Hitachi Micro Comput Eng Ltd | 半導体装置 |
| JPS60105747A (ja) * | 1983-11-14 | 1985-06-11 | 株式会社イナックス | タイルパネル構成体を利用した吊天井構造 |
| JPS60123046A (ja) * | 1983-12-07 | 1985-07-01 | Toshiba Corp | 半導体装置 |
| JPS60119756U (ja) * | 1984-01-20 | 1985-08-13 | 三洋電機株式会社 | リ−ドフレ−ム |
| JPS639149U (US07135483-20061114-C00003.png) * | 1986-07-03 | 1988-01-21 | ||
| JPS63108759A (ja) * | 1986-10-27 | 1988-05-13 | Rohm Co Ltd | 半導体装置の製造方法 |
| JPH01143246A (ja) * | 1987-11-30 | 1989-06-05 | Nec Corp | 半導体装置 |
| JPH01244654A (ja) * | 1988-03-25 | 1989-09-29 | Nec Kyushu Ltd | リードフレーム |
| JPH02174254A (ja) * | 1988-12-27 | 1990-07-05 | Nec Corp | Ｉｃパッケージ |
-
1990
- 1990-09-29 JP JP1990102383U patent/JP2520527Y2/ja not_active Expired - Lifetime
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5910249A (ja) * | 1982-07-09 | 1984-01-19 | Nec Corp | 半導体装置用リ−ドフレ−ム |
| JPS6070755A (ja) * | 1983-09-28 | 1985-04-22 | Hitachi Micro Comput Eng Ltd | 半導体装置 |
| JPS60105747A (ja) * | 1983-11-14 | 1985-06-11 | 株式会社イナックス | タイルパネル構成体を利用した吊天井構造 |
| JPS60123046A (ja) * | 1983-12-07 | 1985-07-01 | Toshiba Corp | 半導体装置 |
| JPS60119756U (ja) * | 1984-01-20 | 1985-08-13 | 三洋電機株式会社 | リ−ドフレ−ム |
| JPS639149U (US07135483-20061114-C00003.png) * | 1986-07-03 | 1988-01-21 | ||
| JPS63108759A (ja) * | 1986-10-27 | 1988-05-13 | Rohm Co Ltd | 半導体装置の製造方法 |
| JPH01143246A (ja) * | 1987-11-30 | 1989-06-05 | Nec Corp | 半導体装置 |
| JPH01244654A (ja) * | 1988-03-25 | 1989-09-29 | Nec Kyushu Ltd | リードフレーム |
| JPH02174254A (ja) * | 1988-12-27 | 1990-07-05 | Nec Corp | Ｉｃパッケージ |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0878595A (ja) * | 1994-08-29 | 1996-03-22 | Analog Devices Inc <Adi> | 改善された熱放散を備えたｉｃパッケージ |
| JP2006032775A (ja) * | 2004-07-20 | 2006-02-02 | Denso Corp | 電子装置 |
| JP4590961B2 (ja) * | 2004-07-20 | 2010-12-01 | 株式会社デンソー | 電子装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2520527Y2 (ja) | 1996-12-18 |
Similar Documents
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
| EXPY | Cancellation because of completion of term |