JPH0459941U - - Google Patents

Info

Publication number
JPH0459941U
JPH0459941U JP10349890U JP10349890U JPH0459941U JP H0459941 U JPH0459941 U JP H0459941U JP 10349890 U JP10349890 U JP 10349890U JP 10349890 U JP10349890 U JP 10349890U JP H0459941 U JPH0459941 U JP H0459941U
Authority
JP
Japan
Prior art keywords
semiconductor chip
mold
circuit board
chip removal
adhesive
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10349890U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP10349890U priority Critical patent/JPH0459941U/ja
Publication of JPH0459941U publication Critical patent/JPH0459941U/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Wire Bonding (AREA)

Description

【図面の簡単な説明】
第１図は本発明が適用された実施例の構成を模
式的に示す断面図、第２図および第３図は本考案
の他の実施例を示す金型部分の断面模式図である
。 １……金型、２……支持部、３……熱源、４…
…ＩＣ、５……電極、６……基板、７……回路、
８……接着剤、１０……回路基板、Ａ……加熱手
段。

Claims (1)

  1. 【実用新案登録請求の範囲】 １ 回路基板上に接着剤を介して接続された半導
    体チツプを回路基板から除去する半導体チツプの
    除去装置において、 除去される半導体チツプの立体形状に近似した
    凹部を有する金型と、この金型の一側に取り付け
    られて該金型にせん断応力を与える支持部とを備
    えることを特徴とする半導体チツプの除去装置。 ２ 金型内に熱源を具備することを特徴とする請
    求項１記載の半導体チツプの除去装置。
JP10349890U 1990-10-01 1990-10-01 Pending JPH0459941U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10349890U JPH0459941U (ja) 1990-10-01 1990-10-01

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10349890U JPH0459941U (ja) 1990-10-01 1990-10-01

Publications (1)

Publication Number Publication Date
JPH0459941U true JPH0459941U (ja) 1992-05-22

Family

ID=31848400

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10349890U Pending JPH0459941U (ja) 1990-10-01 1990-10-01

Country Status (1)

Country Link
JP (1) JPH0459941U (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012121139A (ja) * 2012-03-08 2012-06-28 Lintec 21:Kk 剥離工具及び剥離方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012121139A (ja) * 2012-03-08 2012-06-28 Lintec 21:Kk 剥離工具及び剥離方法

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