JPH0163145U - - Google Patents
Info
- Publication number
- JPH0163145U JPH0163145U JP15826487U JP15826487U JPH0163145U JP H0163145 U JPH0163145 U JP H0163145U JP 15826487 U JP15826487 U JP 15826487U JP 15826487 U JP15826487 U JP 15826487U JP H0163145 U JPH0163145 U JP H0163145U
- Authority
- JP
- Japan
- Prior art keywords
- island
- bonded
- lead frame
- metal lead
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000002184 metal Substances 0.000 claims description 3
- 239000000463 material Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Description
第1図は本考案の一実施例を示す図、第2図は
従来技術を示す図である。 1,1′……回路基板、2,2′……金属製リ
ードフレーム、3……ダミー基板。
従来技術を示す図である。 1,1′……回路基板、2,2′……金属製リ
ードフレーム、3……ダミー基板。
Claims (1)
- 金属製リードフレームのアイランドの表面に、
回路基板を接着した混成集積回路装置において、
前記回路基板を接着した金属製リードフレームの
アイランドの裏面に、該回路基板と同じ材質のダ
ミー基板を接着することを特徴とする混成集積回
路装置。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15826487U JPH0163145U (ja) | 1987-10-16 | 1987-10-16 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP15826487U JPH0163145U (ja) | 1987-10-16 | 1987-10-16 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH0163145U true JPH0163145U (ja) | 1989-04-24 |
Family
ID=31438434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP15826487U Pending JPH0163145U (ja) | 1987-10-16 | 1987-10-16 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0163145U (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06295970A (ja) * | 1993-04-08 | 1994-10-21 | Seiko Epson Corp | 半導体装置及び半導体装置製造方法 |
-
1987
- 1987-10-16 JP JP15826487U patent/JPH0163145U/ja active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06295970A (ja) * | 1993-04-08 | 1994-10-21 | Seiko Epson Corp | 半導体装置及び半導体装置製造方法 |
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