JPH0456254A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To make an interlaminar connection hole tapered to improve a second metal film in step coverage and to improve a fine two-layered metal wiring in yield by a method wherein a plasma oxynitride film is formed as an upper interlaminar film, and then an interlaminar connection hole is provided through wet etching and dry etching performed in succession. CONSTITUTION:In the formation of the metal multilayer wiring layer of a semiconductor device, a first metal film 3 is formed on the surface of a certain region of a semiconductor substrate 1 and formed into a pattern through dry etching, an oxide film 4 is formed on the first metal film 3 through a CVD method and flattened through an inorganic coating film 5, an oxynitride film 6 is formed through a plasma CVD method, the plasma oxynitride film 6 and the plasma oxide film 4 are subjected to a selective wet etching using a resist 7 as a mask, in succession a second metal film 8 is formed through a dry etching method, and a pattern is formed through dry etching to form a multilayered wiring layer.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to a method for forming multilayer wiring layers of a semiconductor integrated circuit.

Conventional Technology In response to the increasing integration and speed of MO8 integrated circuits, aluminum two-layer wiring technology is being widely used mainly in gate arrays and ASICs.

FIGS. 2(A) to 2(F) show cross-sectional views in the order of steps for forming a conventional two-layer aluminum wiring. When forming two-layer wiring for semiconductor elements built into a single semiconductor substrate 11,
After forming an aluminum alloy film 13 on the silicon oxide film 12, a first layer of metal wiring is formed using a resist as a mask and using a reactive ion etching method (see FIG. 2).
A>). Next, an oxide film 1 is formed using a known plasma CVD method.
4 (Fig. 2 (B)) and inorganic coating film (SOG)
After planarization using a method (FIG. 2(C)), a plasma oxide film is grown to form an interlayer film (FIG. 2(D)).

Next, a resist 17 is applied to form a via hole.
Using the mask as a mask, the plasma oxide film, which is an interlayer insulating film, is etched using the reactive ion etching method (second step).
Figure (E)). After removing the resist and removing the alumina film on the surface of the first aluminum alloy film by RF sputtering, an aluminum alloy film 18 is formed by sputtering, and using the resist as a mask, using reactive ion etching, By forming a second layer of gold layer wiring, a desired two-layer aluminum wiring pattern is formed (see Fig. 2 (F)).
)).

Problems to be Solved by the Invention In miniaturized multilayer wiring, the aspect ratio of interlayer connection holes increases, and when depositing wiring metal thereon, it is difficult to deposit a metal film uniformly within the interlayer connection holes. This makes it difficult to connect wires at the ends of interlayer connection holes, or the thickness of the metal film becomes thinner, resulting in deterioration of reliability due to electromigration or stress migration.

Means for Solving the Problems The present invention involves growing a plasma oxide film as an interlayer film after wiring patterning of a first layer metal film on a semiconductor substrate,
After planarization with an inorganic coating film, a plasma oxynitride film is grown with a composition change so that its composition starts to approach that of plasma nitride, and as it grows, it approaches the composition of a plasma oxide film. After the formation, interlayer connection holes are formed by wet etching followed by dry etching, and the wiring of the second layer metal film is patterned to form a two-layer metal wiring.

Effect: According to this method, the etch rate during wet etching is different due to the difference in the composition of plasma oxynitride, so the surface is etched more and the ends of the interlayer connecting holes are tapered. The step coverage of the metal film is improved, and the yield and reliability of fine two-layer metal wiring can be easily improved.

EXAMPLES Below, examples of the present invention will be explained in detail with reference to step-by-step cross-sectional views of FIGS. 1(A) to (G).

As shown in FIG. 1(A), a semiconductor substrate 1 with a predetermined region formed thereon is coated with a film having a film thickness of 0.8 μm and a weight ratio of S
An aluminum alloy film 3 containing 1% i is formed and patterned (FIG. 1(A)).

Next, after growing a plasma oxide film 4 having a refractive index of about 1.53 to a thickness of 300 nm using the plasma CVD method (FIG. 1(B)), an inorganic coating film 5 is formed using the spin coating method, and annealing is performed. Vitrification and flattening (Fig. 1 (
C)). The film thickness is approximately 190 nm on a flat surface.

Next, by plasma CVD method, S i H4, N Hs
A plasma oxynitride film 6 is grown to a thickness of 500 nm using N20-based gas (FIG. 1(D)).

At the beginning of growth, this oxynitride film has a refractive index of approximately 2.
The composition is close to that of a plasma nitride film of 0, and as it grows, the refractive index gradually decreases to about 1 by increasing the N20 flow rate ratio.
．． The composition of the plasma oxide film should be close to that of No. 5.

Next, in order to form interlayer connection holes, a photoresist 7 is applied.
Pattern formation is performed by. After the resist pattern is formed, etching is performed for about 7 minutes with 20:1 buffered hydrofluoric acid, and then the remaining glabellar insulating film is etched using reactive ion etching, the resist is removed, and interlayer connection holes are formed. (Fig. 1 (E), (F)).

After removing the alumina film on the surface of the first aluminum alloy film by RF sputtering, an aluminum alloy film 8 containing 1% Si by weight was formed, and using a resist as a mask, reactive ion etching was performed, By forming a second layer of metal wiring, a desired two-layer aluminum wiring pattern is formed (FIG. 1(G)).

Effects of the Invention According to the present invention, by wet-etching the plasma oxynitride film, which is a two-layer metal interlayer insulating film, and whose composition is continuously changed, it is possible to taper the interlayer connection hole. The step coverage of the second layer metal film is improved, and the yield and reliability of fine two-layer metal wiring can be improved.

[Brief explanation of the drawing]

1(A) to 1(G) are step-by-step sectional views of an embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIG. 2(A)
-(F) are step-by-step cross-sectional views of a conventional method for forming a two-layer metal wiring layer. 1... Semiconductor substrate, 2... Silicon oxide film, 3... Aluminum alloy film, 4...
...Plasma oxide film, 5...SOG coating film, 6
... Oxynitride film, 7 ... Resist, 8 ... Aluminum alloy film. Name of agent: Patent attorney Shigetaka Awano and one other person

Claims (2)

[Claims] (1) A step of forming a first layer of metal film on the surface of a predetermined region of a semiconductor substrate in forming a metal multilayer wiring layer of a semiconductor device, and forming a pattern by dry etching;
An oxide film is formed on the metal film of the second layer by plasma CVD method, and after flattening with an inorganic coating film, plasma C
A step of forming an oxynitride film by a VD method,
selectively wet-etching the plasma oxynitride film and the plasma oxide film using a resist as a mask;
A method for manufacturing a semiconductor device, comprising: forming a second metal film through a step of etching using a dry etching method, forming a pattern using dry etching, and forming a multilayer wiring layer. (2) A claim in which the composition of the plasma oxynitride film is changed so that the composition of the lower part is close to that of the plasma nitride film and the composition of the upper part is close to that of the plasma oxide film. 1) The method for manufacturing a semiconductor device according to item 1).