JPS5893255A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To obtain an electrode wiring layer having a flat surface by covering a semiconductor substrate with an insulating film, opening a hole, forming a conductor film made of Si, high melting point metal on the overall surface including the hole, etching the allowing the conductor film to remain only on the opened side wall, and burying a metal film thereat. CONSTITUTION:An SiO2 film 2 is covered on an Si substrate 1, a photoresist film 3 of the prescribed pattern is covered on the film 2, and with the film 3 as a mask it is etched with fluoric acid series aqueous solution or CF4-H2 series gas, thereby opening holes at the film 2. Then the film 3 is removed, a polycrystalline Si film 4 is accumulated on the overall surface, the film 4 is allowed to remain by reactive ion etching with BBr3-Cl2 gas only on the side surfaces of the holes of the film 2, and the other portion is removed. Thereafter, the interior of the holes of the film 2 in which the film 4 adhered only to the side surfaces of the holes is buried by a pressure reduction method with W metal film 5 and is used as the electrode wiring layer. Subsequently, the Al-Si wiring film 6 which is contacted with the film 5 is covered, a window is opened corresponding to the part of the film 5, and an oxidized film 7 is covered over the entire surface including the window.

Description

DETAILED DESCRIPTION OF THE INVENTION (1) Technical field to which the invention pertains The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device in which a method for forming electrode wiring is improved.

(2) Prior art and its problems Polycrystalline silicon (Poly-Si) and aluminum (A-1) have traditionally been used as electrode and wiring materials for semiconductor devices.
has been used. In particular, Al has been widely used as a wiring material, but in recent years, new wiring materials are desired as semiconductor integrated circuit elements become smaller and more highly integrated, and circuits change rapidly. Materials that are currently attracting attention in response to this demand are high-melting point metals and their silicides. Although high melting point metal has a slightly higher specific resistance value than M,
It has the advantage that it is sufficiently lower than Poly-Si and can be processed at high temperatures, and can also be used for multilayer wiring structures applied to self-alignment methods of MOS type devices. Furthermore, by forming a compound with a high melting point metal and silicon, acid resistance can be achieved. There are already high melting point metal silicides.

It has been put into practical use as a replacement for Poly-St. However, the vapor deposition method is mainly used to form these high melting point metals and their silicides, but recently the CVD method has been used to selectively form high melting point metal films. Formation methods have been developed. According to this method, as shown in FIG.
) The eC high melting point metal film is formed only on the exposed surface. With this technology, it is possible to form a high melting point metal wiring layer on I- without matching the mask, and it is also possible to embed this wiring layer, which plays a major role in planarization, which is important for the high integration of semiconductor devices 1d. I can do it. Currently, this technology is mainly used as a filler to reduce the level difference in contact holes, and to prevent breakage in the polarization wiring.

The technology of forming a high-melting point metal film using the CVl method has the above-mentioned characteristics and is considered promising.
There are still some problems left.

One Um1 is the shape of the part shown in Figure (A). As shown,
The high-melting metal film 5 cannot fill in the space between the insulating films 2, and worse, it creates large grooves (like the oil in ~), causing breaks in the electrode wiring layer to be formed next. .

In addition, the thickness of the high melting point metal film 5 has only grown to about 2000 Å, and it still needs to be improved in order to fill the depth of contact holes and flatten the electrode wiring layer as semiconductor devices become more highly integrated in the future. is essential.

(3) Purpose of the Invention The present invention has been made in order to solve the various problems currently encountered in the current method of forming a high melting point metal film by the CV I) method.
The shape of the high melting point metal film to be formed can be made smoother, the film can be made thicker, it can be buried flat, it can prevent breakage in the electrode wiring layer, and it can increase the reliability of the wiring layer.
This also enables miniaturization that accompanies higher integration.

(4) Summary of the invention: This invention is an improvement 1- by utilizing the coating properties of the film formed by the CvD method and the anisotropy of reactive ion etching (RIE).

II.

When it is formed by CVD, it has the property that it is deposited to the same thickness on any surface of the underlying layer, and reactive ion etching is anisotropic etching.

From these, for example, as shown in FIG. 2(a), a silicon substrate l
After forming and processing the silicon dioxide film 2 on the silicon dioxide film 2, a polycrystalline silicon film (Poly-8i) 4 is deposited by the CVD method, and when viewed from the surface (from above in the figure), the side surface (B ), the Po1y-8i film 4 has a flat surface (
It can be seen that the thickness is twice that of C). When reactive ion etching is performed in this state, the Po1y-8i film 4 is formed on the side surface of the 21 atomized silicon layer 2 by anisotropic etching.
remains as shown in FIG. 2(h), and this shape is very gentle. After this, when a high melting point metal is formed by the CVD method, the growth of the high melting metal film starts from three directions simultaneously as shown in Figure 2 (C), so the film grows quickly and the film thickness can be increased. (5) Examples of the Invention Examples of the present invention will be described below.

As shown in FIG. 3(a), a silicon dioxide film 2 with a thickness of, for example, ~1 μm is formed on a silicon substrate 1, a pattern of a photoresist film 3 is formed thereon by photolithography, and using this as a mask, a hydrofluoric acid film 2 is formed. Etching is performed using an aqueous solution or a CF4-H2 gas to form an insulating layer. After removing the photoresist film 3, as shown in FIG. 3(b), a PO1y-8i film 4 with a thickness of, for example, 0.5 μm is formed (7) and reactive ion etching is performed using BBr3-C12 gas. . Then, l'oly-8i 4 remains on the side surface of the insulating layer 2, as shown in FIG. 3(C). Then WF
6 is used to form tungsten (5) 5 under reduced pressure as shown in FIG. 3(d). Then, as shown in FIG. Then, using a resist film formed by photolithography as a mask, C
After forming a wiring layer by etching with C14-C12 gas, the resist film is removed, and an oxide film 7 with a thickness of about 1.0 μm is completely formed on the surface of the element using, for example, 5iH4-N20 gas to form an element protective film. do.

(6) Effects of the invention In the tungsten film thus obtained, the growth of the film is inhibited by the poly-8i left on the side surface of the insulating layer (Fig. 2).
As shown in C), since the growth occurs simultaneously from three directions, the film grows quickly and the film thickness is uniform.
It is possible to solve the problem of the reduction in film thickness and shape as shown in Figure (A), and the breakage of the wiring layer caused by this, thereby reducing the difference in height of the wiring layer due to the increase in integration density, and improving the reliability of the wiring layer. can be increased.

[Brief explanation of drawings]

FIG. 1 is a cross-sectional view for explaining problems in the conventional semiconductor device manufacturing method, FIGS. 2(a) to (C) are process cross-sectional views for explaining the basic structure of the present invention, and FIG. (a)～
(e) is a cross-sectional view showing a manufacturing process of a semiconductor device in an embodiment of the present invention. 1. Silicon substrate, 2. Silicon dioxide film, 3.. Photoresist, 4.. Po1y-8i. 5...Tungsten, 6...kl-8i, 7...Oxide film (protective film) Agent: Patent attorney Noriyuki Chika (and 1 other person) (Figure 1, Figure 2, 275-

Claims (4)

[Claims] (1) A step of forming an insulating film with an opening on a semiconductor substrate, a step of forming a conductive film on this insulating film and the opening, and then etching the conductive film on the side wall of the insulating film in the opening. 1. A method for manufacturing a semiconductor device, comprising: a step of causing the insulating film to remain; and a step of selectively embedding a metal film into the opening of the insulating film. (2) The method for manufacturing a semiconductor device according to Patent No. 1, wherein the conductor film is made of silicon, a high melting point metal, or a silicide thereof. (3) The above-mentioned claim characterized in that the etching is reactive ion etching. i@ A method for manufacturing a semiconductor device 1t according to item 1. (4) The method for manufacturing a semiconductor device according to claim 1, wherein the method for forming the metal film is a vapor phase growth method.