JPH0453125B2 - - Google Patents

Info

Publication number
JPH0453125B2
JPH0453125B2 JP59183163A JP18316384A JPH0453125B2 JP H0453125 B2 JPH0453125 B2 JP H0453125B2 JP 59183163 A JP59183163 A JP 59183163A JP 18316384 A JP18316384 A JP 18316384A JP H0453125 B2 JPH0453125 B2 JP H0453125B2
Authority
JP
Japan
Prior art keywords
transistors
circuit
differential amplifier
resistors
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59183163A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6159908A (ja
Inventor
Hisao Nagao
Masato Onda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP18316384A priority Critical patent/JPS6159908A/ja
Publication of JPS6159908A publication Critical patent/JPS6159908A/ja
Publication of JPH0453125B2 publication Critical patent/JPH0453125B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
    • H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
    • H03K5/2409—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using bipolar transistors
    • H03K5/2418—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude using bipolar transistors with at least one differential stage

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Manipulation Of Pulses (AREA)
JP18316384A 1984-08-30 1984-08-30 コンパレ−タ回路 Granted JPS6159908A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18316384A JPS6159908A (ja) 1984-08-30 1984-08-30 コンパレ−タ回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18316384A JPS6159908A (ja) 1984-08-30 1984-08-30 コンパレ−タ回路

Publications (2)

Publication Number Publication Date
JPS6159908A JPS6159908A (ja) 1986-03-27
JPH0453125B2 true JPH0453125B2 (US20100012521A1-20100121-C00001.png) 1992-08-25

Family

ID=16130890

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18316384A Granted JPS6159908A (ja) 1984-08-30 1984-08-30 コンパレ−タ回路

Country Status (1)

Country Link
JP (1) JPS6159908A (US20100012521A1-20100121-C00001.png)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5000308B2 (ja) * 2007-01-09 2012-08-15 ローム株式会社 電圧比較回路およびそれを用いた電源管理回路
JP5545751B2 (ja) * 2010-11-25 2014-07-09 三菱電機株式会社 ピークホールド回路及びボトムホールド回路

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58194412A (ja) * 1982-05-08 1983-11-12 Matsushita Electric Ind Co Ltd 制御回路

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58127894U (ja) * 1982-02-18 1983-08-30 ソニー株式会社 波形整形回路

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58194412A (ja) * 1982-05-08 1983-11-12 Matsushita Electric Ind Co Ltd 制御回路

Also Published As

Publication number Publication date
JPS6159908A (ja) 1986-03-27

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term