JPH0451977B2 - - Google Patents
Info
- Publication number
- JPH0451977B2 JPH0451977B2 JP58146299A JP14629983A JPH0451977B2 JP H0451977 B2 JPH0451977 B2 JP H0451977B2 JP 58146299 A JP58146299 A JP 58146299A JP 14629983 A JP14629983 A JP 14629983A JP H0451977 B2 JPH0451977 B2 JP H0451977B2
- Authority
- JP
- Japan
- Prior art keywords
- silicon layer
- nitride film
- photoresist
- silicon
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
- H01L21/76205—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO in a region being recessed from the surface, e.g. in a recess, groove, tub or trench region
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Element Separation (AREA)
- Recrystallisation Techniques (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14629983A JPS6038830A (ja) | 1983-08-12 | 1983-08-12 | 半導体装置の製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP14629983A JPS6038830A (ja) | 1983-08-12 | 1983-08-12 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS6038830A JPS6038830A (ja) | 1985-02-28 |
JPH0451977B2 true JPH0451977B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) | 1992-08-20 |
Family
ID=15404534
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP14629983A Granted JPS6038830A (ja) | 1983-08-12 | 1983-08-12 | 半導体装置の製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6038830A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0391081A3 (en) * | 1989-04-06 | 1991-08-07 | International Business Machines Corporation | Fabrication and structure of semiconductor-on-insulator islands |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5831552A (ja) * | 1981-08-18 | 1983-02-24 | Seiko Epson Corp | 半導体装置の製造方法 |
JPS5861641A (ja) * | 1981-10-09 | 1983-04-12 | Hitachi Ltd | 半導体装置の製造方法 |
-
1983
- 1983-08-12 JP JP14629983A patent/JPS6038830A/ja active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6038830A (ja) | 1985-02-28 |