JPH0450619B2 - - Google Patents

Info

Publication number
JPH0450619B2
JPH0450619B2 JP58127610A JP12761083A JPH0450619B2 JP H0450619 B2 JPH0450619 B2 JP H0450619B2 JP 58127610 A JP58127610 A JP 58127610A JP 12761083 A JP12761083 A JP 12761083A JP H0450619 B2 JPH0450619 B2 JP H0450619B2
Authority
JP
Japan
Prior art keywords
buffer memory
memory
address
request
intermediate buffer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58127610A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6020266A (ja
Inventor
Makoto Kishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58127610A priority Critical patent/JPS6020266A/ja
Publication of JPS6020266A publication Critical patent/JPS6020266A/ja
Publication of JPH0450619B2 publication Critical patent/JPH0450619B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
JP58127610A 1983-07-15 1983-07-15 メモリ制御方式 Granted JPS6020266A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58127610A JPS6020266A (ja) 1983-07-15 1983-07-15 メモリ制御方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58127610A JPS6020266A (ja) 1983-07-15 1983-07-15 メモリ制御方式

Publications (2)

Publication Number Publication Date
JPS6020266A JPS6020266A (ja) 1985-02-01
JPH0450619B2 true JPH0450619B2 (enrdf_load_stackoverflow) 1992-08-14

Family

ID=14964339

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58127610A Granted JPS6020266A (ja) 1983-07-15 1983-07-15 メモリ制御方式

Country Status (1)

Country Link
JP (1) JPS6020266A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6020266A (ja) 1985-02-01

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